Texas Instruments LP3470M5-4.63/NOPB
- Part No.:
- LP3470M5-4.63/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- SC-74A, SOT-753
- Datasheet:
-
LP3470M5-4.63/NOPB.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL SOT23-5
- Quantity:
- Payment:

- Shipping:

Inventory:7,336
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Product details
Overview
LP3470M5-4.63/NOPB from Texas Instruments is a micropower voltage supervisor IC with 4.63 V ±1% reset threshold, open-drain active-low reset output, programmable reset timeout via external capacitor (tRP = 2000 × C1), 16 µA typical quiescent current, and valid reset assertion down to VCC = 0.5 V. It monitors microprocessor supply rails in battery-powered systems to ensure reliable power-on reset and brownout protection.
For engineers reviewing the LP3470M5-4.63/NOPB datasheet, LP3470M5-4.63/NOPB pinout, LP3470M5-4.63/NOPB application, or LP3470M5-4.63/NOPB equivalent, key selection criteria include reset threshold accuracy over temperature, immunity to short VCC transients, SOT-23-5 package compatibility, and external capacitor-based timing adjustability for POR sequencing.
Technical Context
The LP3470M5-4.63/NOPB implements a precision bandgap-based voltage reference with hysteresis (VHYST = 15–65 mV) to prevent chatter during threshold crossing. Its internal comparator continuously monitors VCC against the factory-programmed 4.63 V threshold and asserts the open-drain Reset output low when VCC falls below VRTH − VHYST.
Reset remains asserted for a user-defined time interval after VCC recovers above VRTH, determined solely by the external capacitor on the SRT pin (tRP = 2000 × C1, where C1 in µF yields tRP in ms). The device operates across 0°C to 85°C ambient and draws only 30 µA max over full temperature range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Threshold | 4.63 V ±1% over temperature - ensures precise power-rail monitoring without calibration |
| Quiescent Current | 16 µA typical at 25°C - enables multi-year operation in coin-cell–powered devices |
| Reset Output Type | Open-drain, active-low - supports wired-OR reset buses and flexible pullup voltage selection |
| Minimum Operating VCC | 0.5 V - guarantees valid reset assertion even during deep brownout or battery depletion |
| Reset Timeout Range | 1–3.5 ms (with 1 nF capacitor) - provides adjustable POR hold time for slow-ramping supplies |
| Hysteresis Voltage | 15–65 mV - prevents oscillation during noisy or slowly recovering supply conditions |
| VCC Transient Immunity | Immune to short negative-going glitches - eliminates false resets from switching noise or ESD coupling |
Pinout & Package
LP3470M5-4.63/NOPB is housed in a 5-pin SOT-23 (DBV) package measuring 1.60 mm × 2.90 mm, optimized for space-constrained PCB layouts and compatible with standard pick-and-place assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - SRT | Reset timeout programming input | Connects to external capacitor (C1) to set tRP; floating disables timeout delay |
| 2 - GND | Ground reference | Primary return path for internal circuitry and reset output sink current |
| 3 - VCC1 | Internal supply tie | Must be connected directly to VCC (Pin 4); no external connection required |
| 4 - VCC | Supply and monitor input | Monitored voltage rail; powers internal circuitry and defines reset trigger point |
| 5 - Reset | Open-drain reset output | Active-low signal requiring external pullup; sinks up to 10 mA during assertion |
Key Features
| Feature | Design Value |
|---|---|
| ±1% reset threshold accuracy | Eliminates need for external trimming or system-level recalibration across –20°C to 85°C |
| Programmable reset timeout | Enables precise POR hold time tuning (1–3.5 ms typical) without changing IC or firmware |
| 0.5 V minimum VCC operation | Guarantees fail-safe reset during ultra-low-voltage battery discharge or cold-start conditions |
| 16 µA typical ICC | Reduces standby power budget impact in always-on IoT sensors and wearables |
| Open-drain Reset output | Supports mixed-voltage systems and shared reset busses without level-shifting components |
Applications
| Microprocessor Power Monitoring | Portable Medical Devices |
|---|---|
Use Scenario: Ensuring clean boot sequence for ARM Cortex-M microcontrollers in industrial PLCs during mains power recovery. IC Role / Device Role / Timing Role: Voltage supervisor asserting active-low reset until 4.63 V rail stabilizes and holds for ≥2 ms. Use Value: Prevents CPU lockup or corrupted register initialization caused by marginal VCC during grid fluctuations. | Use Scenario: Supervising lithium-ion battery–fed supply in handheld glucose meters with strict low-power requirements. IC Role / Device Role / Timing Role: Monitoring 4.63 V LDO output to guarantee MCU reset before firmware execution begins. Use Value: Extends usable battery life by enabling sub-20 µA sleep mode while maintaining guaranteed reset integrity. |
| Industrial Sensor Nodes | Smart Metering Modules |
Use Scenario: Detecting undervoltage events in LoRaWAN edge nodes powered by energy-harvesting sources. IC Role / Device Role / Timing Role: Providing hysteresis-stabilized reset signal to wake microcontroller only when VCC exceeds 4.63 V ±1%. Use Value: Avoids spurious wakeups from transient dips, reducing false data transmissions and radio duty cycle. | Use Scenario: Securing power-up sequence of metrology ASICs and communication SoCs in electricity meters. IC Role / Device Role / Timing Role: Generating synchronized reset pulse with 2 ms timeout to align digital subsystem initialization. Use Value: Meets IEC 62056 compliance for deterministic startup behavior under varying AC line conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3808G33DBVR | Fixed 3.3 V threshold; 350 ms min timeout; 2.9 µA IQ | Designed for lower-voltage logic rails; longer fixed timeout limits fast-recovery use cases | Select when 3.3 V rail supervision and ultra-low IQ dominate over threshold flexibility |
| MAX6326UR31+T | 4.63 V threshold; 140 ms min timeout; 1.6 µA IQ; push-pull output | Higher minimum timeout and push-pull drive limit bus-sharing capability and POR timing granularity | Choose when lowest possible quiescent current is critical and open-drain topology is not required |
Compared with TPS3808G33DBVR and MAX6326UR31+T, LP3470M5-4.63/NOPB offers unique adjustability of reset timeout via external capacitor while maintaining ±1% threshold accuracy and open-drain compatibility - making it optimal for designs requiring precise, application-tuned POR timing on 4.63 V rails.
Availability
LP3470M5-4.63/NOPB is available at Aetrix Electronics and suitable for microprocessor power monitoring, portable medical devices, industrial sensor nodes, and smart metering modules requiring stable component supply and long-term manufacturability.
Supply support for LP3470M5-4.63/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in power management, signal chain, and high-reliability ICs.
The LP3470 series was designed specifically for micropower voltage supervision in battery-operated and space-constrained systems, emphasizing precision threshold accuracy, low IQ, and flexible reset timing.
FAQ
What is the exact reset threshold voltage of the LP3470M5-4.63/NOPB?
The LP3470M5-4.63/NOPB has a factory-programmed reset threshold of 4.63 V with ±1% accuracy over the full operating temperature range (0°C to 85°C). This value is specified in the Electrical Characteristics table under VRTH and confirmed in the Mechanical, Packaging, and Orderable Information section of the datasheet.
How do I calculate the reset timeout period for the LP3470M5-4.63/NOPB?
The reset timeout period (tRP) is calculated using tRP (ms) = 2000 × C1 (µF), where C1 is the capacitor connected between the SRT pin and GND. For example, a 100 nF capacitor yields tRP = 0.2 ms. The LP3470M5-4.63/NOPB datasheet specifies this relationship in Section 7.3.1 and Table 6.5.
Does the LP3470M5-4.63/NOPB require an external pullup resistor on the Reset pin?
Yes, the LP3470M5-4.63/NOPB features an open-drain Reset output and requires an external pullup resistor (0.68 kΩ to 68 kΩ, typically 20 kΩ) connected between the Reset pin and VCC. This is explicitly stated in Section 7.3.3 and Figure 10 of the LP3470M5-4.63/NOPB datasheet.
Can the LP3470M5-4.63/NOPB operate with supply voltages below 1 V?
Yes, the LP3470M5-4.63/NOPB guarantees valid reset assertion down to VCC = 0.5 V, as documented in Section 6.3 (Recommended Operating Conditions) and Section 6.5 (Electrical Characteristics) of its datasheet. This enables reliable operation during deep brownout or battery end-of-life conditions.
What is the package type and pin configuration of the LP3470M5-4.63/NOPB?
The LP3470M5-4.63/NOPB uses a 5-pin SOT-23 (DBV) package with standardized pinout: Pin 1 = SRT, Pin 2 = GND, Pin 3 = VCC1, Pin 4 = VCC, Pin 5 = Reset. This is confirmed in Section 5 (Pin Configuration and Functions) and the Package Option Addendum of the LP3470M5-4.63/NOPB datasheet.
LP3470M5-4.63/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- SC-74A, SOT-753
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.63V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 1ms Minimum
- Operating Temperature:
- -20°C ~ 85°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-5
LP3470M5-4.63/NOPB FAQ
1.How can I place an order for LP3470M5-4.63/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LP3470M5-4.63/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LP3470M5-4.63/NOPB reliable?
The price and inventory of LP3470M5-4.63/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP3470M5-4.63/NOPB is usually 5 days.
3.What payment methods are accepted for LP3470M5-4.63/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP3470M5-4.63/NOPB transactions.
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LP3470M5-4.63/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LP3470M5-4.63/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LP3470M5-4.63/NOPB?
For technical support, including LP3470M5-4.63/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP3470M5-4.63/NOPB requirements.
6.How does Aetrix verify that LP3470M5-4.63/NOPB is sourced from the original manufacturer or authorized distributors?
All LP3470M5-4.63/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP3470M5-4.63/NOPB meets industry standards.
7.What is the process for return or replacement of LP3470M5-4.63/NOPB?
All LP3470M5-4.63/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LP3470M5-4.63/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LP3470M5-4.63/NOPB part is unused and in its original packaging.
Return procedure for LP3470M5-4.63/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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