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Texas Instruments LP3907SQ-BJX6X/NOPB
- Part No.:
- LP3907SQ-BJX6X/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
LP3907SQ-BJX6X/NOPB.pdf
- Description:
- IC REG QUAD BUCK/LNR SYNC 24WQFN
- Quantity:
- Payment:
- Shipping:
Inventory:6,000
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Product details
Overview
LP3907SQ-BJX6X/NOPB from Texas Instruments is a programmable power management IC integrating two synchronous buck converters (1 A and 600 mA), two 300-mA LDOs, and an I²C interface for dynamic voltage scaling and sequencing control in low-power processors. It operates from 2.8 V to 5.5 V input, delivers ±3% output voltage accuracy, supports 2.1-MHz PWM switching with automatic PWM-to-PFM mode transition, and features thermal/overcurrent protection.
For engineers reviewing the LP3907SQ-BJX6X/NOPB datasheet, LP3907SQ-BJX6X/NOPB pinout, LP3907SQ-BJX6X/NOPB application, or LP3907SQ-BJX6X/NOPB equivalent, this device is selected for FPGA core/I/O rail management, battery-powered DSP systems requiring multi-rail sequencing, and space-constrained portable electronics needing high-efficiency, software-configurable power delivery with integrated POR and UVLO.
Technical Context
The LP3907SQ-BJX6X/NOPB implements dual synchronous buck regulators with internal PFET/NFET switches (RDSON(P) = 200 mΩ, RDSON(N) = 180 mΩ), programmable output voltages (Buck1: 0.8–2 V; Buck2: 1–3.5 V), and 400-kHz I²C interface supporting address 0x60 (WQFN package). Its LDOs use PMOS pass devices with 30-mV typical dropout and support 1–3.5 V outputs except for JJ11/FX6W/JX6X variants - confirming LP3907SQ-BJX6X/NOPB's compatibility with full LDO programmability.
Power-on sequencing is controlled via EN_T, nPOR (open-drain, 100-kΩ pullup), and independent enable pins (ENSW1/ENSW2/ENLDO1/ENLDO2). The device includes precision internal reference, undervoltage lockout (2.7–2.9 V), thermal shutdown (160°C), and soft-start circuitry - all verified for operation across −40°C to +125°C junction temperature range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.8 V to 5.5 V - supports single-cell Li-ion, USB, and regulated 3.3/5 V rails without external pre-regulation. |
| Buck1 Output | 0.8 V–2 V at 1 A - configurable for FPGA core voltage with ±3% accuracy and 2.1-MHz switching for compact filter design. |
| Buck2 Output | 1 V–3.5 V at 600 mA - independently programmable for I/O or peripheral rails with automatic PWM-to-PFM mode below light load. |
| LDO1/LDO2 Output | 1 V–3.5 V at 300 mA each - low-dropout (30 mV typ.) PMOS regulators for noise-sensitive analog or logic supplies. |
| I²C Interface | 400-kHz standard-mode - enables host processor to configure outputs, monitor status, and control sequencing via register map access. |
| Thermal Protection | 160°C shutdown with 20°C hysteresis - prevents permanent damage during sustained overload or poor PCB thermal design. |
| Package | 24-pin WQFN (RTW), 4.00 mm × 4.00 mm - exposes DAP for enhanced thermal dissipation; RθJA = 32.7°C/W on 2-layer board. |
Pinout & Package
LP3907SQ-BJX6X/NOPB uses the 24-pin WQFN (RTW) package with exposed thermal pad (DAP). Pin numbering follows top-view layout; DAP must be connected to GND for optimal thermal performance but is not electrically required.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VINLDO12 | Analog power supply | Provides 2.8–5.5 V to internal reference, bias, I²C, and logic blocks; always powered if VIN present. |
| EN_T | Sequencing enable input | Active-high logic input controlling preset power-on sequence timing; tied HIGH or driven by system controller. |
| nPOR | Open-drain reset output | Signals valid Buck1/Buck2 output (94% rising / 85% falling threshold); requires external 100-kΩ pullup. |
| GND_SW1 / GND_SW2 | Switching ground returns | Separate low-impedance paths for Buck1/Buck2 NMOS sources - critical for EMI reduction and stability. |
| SW1 / SW2 | Switch node outputs | Connect to external inductors; high dv/dt nodes requiring tight layout and ground shielding. |
| FB1 / FB2 | Voltage feedback inputs | Resistive divider inputs setting Buck1/Buck2 output; high-impedance nodes sensitive to noise coupling. |
| ENSW1 / ENSW2 | Buck enable inputs | Independent active-high controls enabling/disabling Buck1/Buck2; allow dynamic rail shutdown. |
| VIN1 / VIN2 | Buck input supplies | Accept 2.8–5.5 V input; VIN1 powers Buck1, VIN2 powers Buck2 - supports dual-input source configurations. |
| VINLDO1 / VINLDO2 | LDO input supplies | Accept 1.74–5.5 V; compatible with buck outputs or battery rails; minimum 1.74 V enables low-voltage operation. |
| LDO1 / LDO2 | LDO regulated outputs | Deliver 1–3.5 V at 300 mA; low-noise (80 µVrms), high PSRR (45 dB @ 10 kHz) for analog/RF subsystems. |
| ENLDO1 / ENLDO2 | LDO enable inputs | Active-high digital controls permitting software-defined power gating of individual LDO rails. |
| SDA / SCL | I²C bidirectional data/clock | 400-kHz interface for register read/write; supports multiple devices on shared bus with address 0x60. |
| AVDD | Analog converter supply | Provides clean 2.8–5.5 V to buck controllers; decoupling required near AVDD pin to suppress switching noise. |
| GND_C / GND_L / GND_S | Dedicated ground terminals | Separate analog core, LDO, and switching grounds minimize noise coupling between domains. |
Key Features
| Feature | Design Value |
|---|---|
| Dynamic voltage scaling (DVS) | Independent I²C-programmable output voltage adjustment for Buck1/Buck2 enables real-time power optimization in processors. |
| Programmable power-on sequencing | EN_T pin and internal delay registers allow precise startup order control across all four regulators - critical for FPGA configuration integrity. |
| Synchronous buck architecture | Integrated PFET/NFET switches eliminate external diode losses, achieving up to 96% efficiency and reducing thermal load. |
| Flexible reset signaling | nPOR open-drain output with user-configurable delay provides system-level power-good indication synchronized to both buck outputs. |
| Low-quiescent-current PFM mode | 33 µA operating current in light-load PFM mode extends battery life in portable applications without sacrificing regulation. |
Applications
| FPGA Core & I/O Power | DSP/Microprocessor Multi-Rail Supply |
|---|---|
|
Use Scenario: Powering Xilinx Spartan or Intel Cyclone FPGA banks requiring separate 1.2-V core and 3.3-V I/O rails with strict sequencing. IC Role / Device Role / Timing Role: LP3907SQ-BJX6X/NOPB delivers sequenced, I²C-adjustable voltages while monitoring rail health via nPOR and UVLO. Use Value: Eliminates discrete regulators and sequencing ICs; reduces BOM count by 4+ components and enables runtime voltage tuning for dynamic power management. |
Use Scenario: Supplying TI C6000 DSP or ARM Cortex-A series SoCs with core, memory, and peripheral rails from a single Li-ion cell. IC Role / Device Role / Timing Role: LP3907SQ-BJX6X/NOPB acts as central PMU managing buck/LDO outputs, sequencing, and thermal safety under variable load conditions. Use Value: Achieves >90% efficiency at 500-mA loads while maintaining <±3% output accuracy across temperature - extending runtime and simplifying thermal design. |
| Battery-Powered Hearing Aids | Electronic Measurement Units |
|
Use Scenario: Ultra-low-power hearing aid with ASIC requiring 1.8-V digital, 2.6-V analog, and 3.3-V RF rails from coin-cell or rechargeable battery. IC Role / Device Role / Timing Role: LP3907SQ-BJX6X/NOPB provides low-noise LDO outputs (80 µVrms) and efficient bucks with 0.01-µA shutdown current. Use Value: Enables 14-day battery life via PFM mode and ultra-low IQ; dedicated analog/digital grounds prevent signal corruption in audio path. |
Use Scenario: Portable multimeter or oscilloscope front-end requiring isolated, low-noise analog supplies and stable digital rails. IC Role / Device Role / Timing Role: LP3907SQ-BJX6X/NOPB generates precision LDO outputs (±3% accuracy, 45 dB PSRR) and sequenced buck rails for ADC/DAC and MCU subsystems. Use Value: Reduces measurement error by suppressing supply-induced noise; thermal shutdown protects against probe short-circuit faults. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail PMU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023RSBR | Triple buck (2×1.5 A, 1×1 A) + dual LDO (2×200 mA); no I²C, only hardware-programmed outputs. | Fixed-output configuration lacks dynamic voltage scaling; suitable for cost-sensitive, non-software-controlled systems. | Select when deterministic, pin-strapped sequencing suffices and I²C configurability is unnecessary. |
| LP87322ARHPT | Dual buck (2×1.5 A) + dual LDO (2×300 mA); I²C interface with enhanced fault reporting and spread-spectrum clocking. | Higher current capability and advanced diagnostics support automotive infotainment; requires different register mapping. | Choose for next-gen designs needing higher buck current, diagnostic logging, or EMI reduction features. |
Compared with TPS65023RSBR and LP87322ARHPT, the LP3907SQ-BJX6X/NOPB offers balanced 1-A/600-mA buck capability, full LDO programmability, and proven integration for FPGA/DSP platforms - making it optimal where software-defined sequencing and moderate current requirements align.
Availability
LP3907SQ-BJX6X/NOPB is available at Aetrix Electronics and suitable for FPGA power delivery, portable medical electronics, and industrial measurement equipment requiring stable component supply with long-term lifecycle assurance.
Supply support for LP3907SQ-BJX6X/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in high-reliability power solutions.
The LP3907 product line targets low-power, multi-rail applications in FPGAs, DSPs, and portable electronics - delivering integrated sequencing, I²C configurability, and thermal robustness in compact WQFN packages.
FAQ
What is the default I²C address for LP3907SQ-BJX6X/NOPB?
The LP3907SQ-BJX6X/NOPB uses the 24-pin WQFN (RTW) package, which has a default I²C address of 0x60 per TI documentation. This address is hardwired and cannot be changed via pins or registers. System firmware must initialize the I²C master to communicate at this address to configure LP3907SQ-BJX6X/NOPB's buck/LDO outputs, sequencing, and fault responses.
Does LP3907SQ-BJX6X/NOPB support dynamic voltage scaling for both buck converters?
Yes, LP3907SQ-BJX6X/NOPB supports independent dynamic voltage scaling for Buck1 and Buck2 via its 400-kHz I²C interface. Registers allow real-time adjustment of output voltages within their respective ranges (Buck1: 0.8–2 V; Buck2: 1–3.5 V), enabling adaptive power management in processors and FPGAs without hardware changes.
What is the maximum allowable junction temperature for LP3907SQ-BJX6X/NOPB?
The maximum operating junction temperature for LP3907SQ-BJX6X/NOPB is 125°C, with thermal shutdown engaging at 160°C (typical) and releasing at 140°C (typical). Its WQFN package has RθJA = 32.7°C/W on a 2-layer board; proper copper pour and DAP grounding are essential to maintain safe operation under full 1-A Buck1 load.
Can LP3907SQ-BJX6X/NOPB operate with input voltage below 2.8 V?
No - LP3907SQ-BJX6X/NOPB requires a minimum input voltage of 2.8 V for buck operation per its Recommended Operating Conditions. However, LDO inputs (VINLDO1/VINLDO2) accept as low as 1.74 V, allowing them to be powered from a buck output or low-voltage source while bucks remain disabled.
How does the nPOR function work on LP3907SQ-BJX6X/NOPB?
The nPOR pin on LP3907SQ-BJX6X/NOPB is an open-drain output that signals valid Buck1 and Buck2 regulation. It pulls low when either output falls below 85% of target or rises above 94%; external 100-kΩ pullup ensures logic HIGH when both rails are in specification. This provides system-level power-good indication synchronized to both buck converters.
LP3907SQ-BJX6X/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Topology:
- Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
- Number of Outputs:
- 4
- Frequency - Switching:
- 2.1MHz
- Voltage/Current - Output 1:
- 1.2V, 1A
- Voltage/Current - Output 2:
- 3.3V, 600mA
- Voltage/Current - Output 3:
- 2.65V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-WQFN (4x4)
LP3907SQ-BJX6X/NOPB FAQ
1.How can I place an order for LP3907SQ-BJX6X/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LP3907SQ-BJX6X/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LP3907SQ-BJX6X/NOPB reliable?
The price and inventory of LP3907SQ-BJX6X/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP3907SQ-BJX6X/NOPB is usually 5 days.
3.What payment methods are accepted for LP3907SQ-BJX6X/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP3907SQ-BJX6X/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LP3907SQ-BJX6X/NOPB?
LP3907SQ-BJX6X/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LP3907SQ-BJX6X/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LP3907SQ-BJX6X/NOPB?
For technical support, including LP3907SQ-BJX6X/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP3907SQ-BJX6X/NOPB requirements.
6.How does Aetrix verify that LP3907SQ-BJX6X/NOPB is sourced from the original manufacturer or authorized distributors?
All LP3907SQ-BJX6X/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP3907SQ-BJX6X/NOPB meets industry standards.
7.What is the process for return or replacement of LP3907SQ-BJX6X/NOPB?
All LP3907SQ-BJX6X/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LP3907SQ-BJX6X/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LP3907SQ-BJX6X/NOPB part is unused and in its original packaging.
Return procedure for LP3907SQ-BJX6X/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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