Texas Instruments LP3907TLX-PLNTO/NOPB
- Part No.:
- LP3907TLX-PLNTO/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 25-WFBGA
- Datasheet:
-
LP3907TLX-PLNTO/NOPB.pdf
- Description:
- IC REG QUAD BUCK/LNR SYNC 25USMD
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LP3907TLX-PLNTO/NOPB from Texas Instruments is a programmable power management IC integrating two synchronous buck converters (1 A and 600 mA) and two 300-mA LDOs, all controlled via 400-kHz I²C interface. It delivers 1.3 V/2.2 V buck outputs and 2.9 V/2.4 V LDO outputs, supports forced PWM mode, and targets FPGA/DSP core and I/O rail power in space-constrained portable electronics.
For engineers reviewing the LP3907TLX-PLNTO/NOPB datasheet, LP3907TLX-PLNTO/NOPB pinout, LP3907TLX-PLNTO/NOPB application, or LP3907TLX-PLNTO/NOPB equivalent, this page provides verified electrical specifications, WQFN-24 package mapping, I²C register-controlled sequencing, thermal shutdown behavior, and validated alternative PMUs for multi-rail embedded power design.
Technical Context
The LP3907TLX-PLNTO/NOPB implements dual synchronous buck regulators with 2.1-MHz fixed-frequency PWM operation and automatic PWM-to-PFM transition under light load, plus two PMOS-based LDOs with 30-mV typical dropout. Its I²C interface enables independent voltage programming, enable/disable control, and power-on reset delay configuration.
It features integrated undervoltage lockout (2.7–2.9 V), thermal shutdown at 160°C with 20°C hysteresis, and precision internal reference enabling ±3% output voltage accuracy across temperature. The device supports dynamic voltage scaling and flexible power-on sequencing via EN_T and nPOR signals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.8 V to 5.5 V - supports single-cell Li-ion, USB, or regulated 3.3 V/5 V rails without external pre-regulation |
| Buck1 Output | 1.3 V @ 1 A - configured as core voltage for low-power FPGAs or ARM Cortex-M processors |
| Buck2 Output | 2.2 V @ 600 mA - supplies memory I/O or analog subsystems requiring stable mid-range voltage |
| LDO1/LDO2 Outputs | 2.9 V / 2.4 V @ 300 mA each - low-noise, low-dropout rails for sensors or communication interfaces |
| I²C Interface | 400 kHz standard-mode - enables host MCU to reconfigure voltages, sequence timing, and monitor status in real time |
| Switching Frequency | 2.1 MHz - allows use of compact 2.2-µH inductors and 10-µF ceramic output capacitors |
| Thermal Protection | 160°C shutdown with 20°C hysteresis - prevents permanent damage during sustained overload or poor PCB thermal design |
Pinout & Package
LP3907TLX-PLNTO/NOPB is packaged in a thermally enhanced 24-pin WQFN (RTW) with 4.00 mm × 4.00 mm body and exposed thermal pad (DAP). The DAP must be soldered to PCB ground plane for optimal thermal performance (RθJA = 32.7°C/W).
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| VINLDO12 | Analog power input | Supplies internal reference, bias, I²C logic, and control circuitry; must be decoupled with 1 µF ceramic |
| EN_T | Power-on sequence enable | Active-high input that initiates preset startup timing for all regulators; tied high for default sequencing |
| nPOR | Open-drain power-good output | Signals valid regulation of Buck1/Buck2; pulled low until both reach ≥94% of target, then released after 50-ms delay |
| SW1/SW2 | Buck switch node outputs | Connect to external 2.2-µH inductor and 10-µF output capacitor; require tight layout to minimize EMI |
| FB1/FB2 | Buck feedback inputs | Resistive divider inputs setting output voltage; support programmable VOUT from 0.8 V to 3.5 V |
| LDO1/LDO2 | Linear regulator outputs | Deliver low-noise, low-ripple power; each requires ≥0.47 µF ceramic output capacitor for stability |
| SDA/SCL | I²C bidirectional data/clock | Standard 400-kHz I²C interface; SDA requires 4.7-kΩ pullup, SCL driven by host controller |
| GND_C/GND_L/GND_SW1/GND_SW2 | Dedicated ground terminals | Separate analog core, LDO, and buck power grounds reduce noise coupling between domains |
Key Features
| Feature | Design Value |
|---|---|
| Programmable dual-buck + dual-LDO | Enables full system power tree configuration via I²C-no hardware resistor changes needed for voltage tuning |
| Forced PWM mode | Eliminates frequency variation and associated EMI spread; ensures deterministic timing for noise-sensitive applications |
| Flexible power-on reset | nPOR provides synchronized, delay-adjustable power-good signal for processor reset coordination |
| Thermal and current protection | Integrated shutdown prevents failure during short-circuit, overtemperature, or excessive load conditions |
| Low-quiescent-current operation | 33 µA in PFM mode and 0.01 µA in shutdown-extends battery life in always-on portable devices |
Applications
| FPGA Core & I/O Power | DSP Processor Supply |
|---|---|
Use Scenario: Powering Xilinx Spartan-7 or Intel MAX 10 FPGA with separate 1.2 V core and 2.5 V I/O rails. IC Role / Device Role / Timing Role: LP3907TLX-PLNTO/NOPB delivers tightly regulated, sequenced voltages with I²C-configurable timing and margining. Use Value: Eliminates discrete DC-DC + LDO combinations; reduces BOM count by 4+ components while enabling runtime voltage adaptation. |
Use Scenario: Supplying TI C55x or Analog Devices SHARC DSP with 1.3 V core, 2.2 V memory interface, and 2.9 V/2.4 V peripheral rails. IC Role / Device Role / Timing Role: LP3907TLX-PLNTO/NOPB acts as centralized PMU managing dynamic voltage scaling and safe power-down sequences. Use Value: Achieves >94% peak efficiency at 500 mA load and maintains <±3% output accuracy across –40°C to +85°C ambient. |
| Portable Medical Instrumentation | Battery-Powered Test Equipment |
Use Scenario: Powering hearing aid SoCs or portable ECG monitors requiring ultra-low-noise, low-quiescent-current rails. IC Role / Device Role / Timing Role: LP3907TLX-PLNTO/NOPB supplies clean 2.4 V/2.9 V LDO outputs and efficient 1.3 V/2.2 V bucks from single Li-ion cell. Use Value: 80 µVRMS LDO output noise and 33 µA light-load quiescent current extend battery runtime beyond 72 hours. |
Use Scenario: Providing stable, sequenced power to handheld oscilloscope front-end ADCs, amplifiers, and microcontroller subsystems. IC Role / Device Role / Timing Role: LP3907TLX-PLNTO/NOPB generates precise 1.3 V analog core, 2.2 V digital I/O, and auxiliary LDO rails with programmable startup delays. Use Value: Integrated UVLO (2.7 V) and thermal shutdown prevent malfunction during brownout or thermal stress in field-deployed units. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail PMU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023RSBR | Triple 600-mA bucks + dual 260-mA LDOs; 2.25–6 V input; no I²C, uses hardware pins for configuration | Fixed-output variant; lacks dynamic voltage scaling and software sequencing capability | Choose when firmware control is unnecessary and cost sensitivity outweighs flexibility |
| LP87332D0RGER | Dual 1-A bucks + dual 300-mA LDOs; 2.5–5.5 V input; I²C interface; supports spread-spectrum clocking | Higher integration (integrated watchdog, GPIOs); newer process with lower RDS(on) and improved light-load efficiency | Prefer for new designs requiring enhanced diagnostics, lower EMI, or extended temperature range (–40°C to +125°C) |
Compared with TPS65023RSBR and LP87332D0RGER, LP3907TLX-PLNTO/NOPB offers I²C-programmable outputs within a mature, production-proven platform optimized for low-noise portable systems-but lacks integrated fault reporting or spread-spectrum modulation found in newer alternatives.
Availability
LP3907TLX-PLNTO/NOPB is available at Aetrix Electronics and suitable for FPGA power delivery, DSP processor supply, portable medical instrumentation, battery-powered test equipment, and hearing aid electronics requiring stable component supply and long-term manufacturability.
Supply support for LP3907TLX-PLNTO/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog and embedded processing solutions, with over 50 years of power management innovation and broad distribution through authorized channels.
The LP3907 series was designed as a compact, I²C-configurable PMU for low-power FPGAs, microprocessors, and DSPs-emphasizing integration density, sequencing flexibility, and efficiency across light-to-full load conditions.
FAQ
What is the input voltage range supported by the LP3907TLX-PLNTO/NOPB?
The LP3907TLX-PLNTO/NOPB operates from 2.8 V to 5.5 V, making it compatible with single-cell Li-ion batteries (2.8–4.2 V), USB 5 V supplies, and regulated 3.3 V rails. Input below 2.8 V triggers undervoltage lockout; above 5.5 V risks absolute maximum rating violation. This range ensures robust operation across common portable power sources without external pre-regulation.
Does the LP3907TLX-PLNTO/NOPB support dynamic voltage scaling (DVS)?
Yes, the LP3907TLX-PLNTO/NOPB supports dynamic voltage scaling via its 400-kHz I²C interface. Engineers can reprogram Buck1 and Buck2 output voltages on-the-fly-e.g., lowering Buck1 from 1.3 V to 1.0 V during low-activity states-enabling real-time power optimization in FPGAs and DSPs without hardware changes or power cycle interruption.
What package type and thermal characteristics does the LP3907TLX-PLNTO/NOPB use?
The LP3907TLX-PLNTO/NOPB uses a 24-pin WQFN (RTW) package measuring 4.00 mm × 4.00 mm with an exposed thermal pad (DAP). Its junction-to-ambient thermal resistance is 32.7°C/W with proper PCB copper pour, and thermal shutdown activates at 160°C with 20°C hysteresis-critical for reliability in sealed portable enclosures.
How does the nPOR pin function on the LP3907TLX-PLNTO/NOPB?
The nPOR pin on the LP3907TLX-PLNTO/NOPB is an open-drain output signaling valid regulation of Buck1 and Buck2. It remains low until both outputs reach ≥94% of their target voltages, then releases after a factory-programmed 50-ms delay. This provides a synchronized, glitch-free reset signal for host processors-eliminating need for external POR ICs.
Can the LP3907TLX-PLNTO/NOPB operate in forced PWM mode, and why is that important?
Yes, the LP3907TLX-PLNTO/NOPB is configured in forced PWM mode per its PLNTO option code. This disables automatic PWM-to-PFM transition, maintaining constant 2.1-MHz switching frequency regardless of load. That ensures predictable EMI profile and eliminates low-frequency beat notes-essential for noise-sensitive analog circuits like ADCs and audio codecs.
LP3907TLX-PLNTO/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 25-WFBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Topology:
- Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
- Number of Outputs:
- 4
- Frequency - Switching:
- 2.1MHz
- Voltage/Current - Output 1:
- 1.3V, 1A
- Voltage/Current - Output 2:
- 2.2V, 600mA
- Voltage/Current - Output 3:
- 2.9V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 25-uSMD
LP3907TLX-PLNTO/NOPB FAQ
1.How can I place an order for LP3907TLX-PLNTO/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LP3907TLX-PLNTO/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LP3907TLX-PLNTO/NOPB reliable?
The price and inventory of LP3907TLX-PLNTO/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP3907TLX-PLNTO/NOPB is usually 5 days.
3.What payment methods are accepted for LP3907TLX-PLNTO/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP3907TLX-PLNTO/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LP3907TLX-PLNTO/NOPB?
LP3907TLX-PLNTO/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LP3907TLX-PLNTO/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LP3907TLX-PLNTO/NOPB?
For technical support, including LP3907TLX-PLNTO/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP3907TLX-PLNTO/NOPB requirements.
6.How does Aetrix verify that LP3907TLX-PLNTO/NOPB is sourced from the original manufacturer or authorized distributors?
All LP3907TLX-PLNTO/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP3907TLX-PLNTO/NOPB meets industry standards.
7.What is the process for return or replacement of LP3907TLX-PLNTO/NOPB?
All LP3907TLX-PLNTO/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LP3907TLX-PLNTO/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LP3907TLX-PLNTO/NOPB part is unused and in its original packaging.
Return procedure for LP3907TLX-PLNTO/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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