Texas Instruments LP3982IMMX-ADJ
- Part No.:
- LP3982IMMX-ADJ
- Manufacturer:
- Texas Instruments
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
LP3982IMMX-ADJ.pdf
- Description:
- IC REG LIN POS ADJ 300MA 8VSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LP3982IMMX-ADJ from Texas Instruments (formerly National Semiconductor) is an adjustable-output, micropower ultra low-dropout CMOS linear regulator delivering 300mA output current with 120mV typical dropout at full load, 90µA typical quiescent current, and 37µV RMS output noise (10Hz–100kHz). It operates from 2.5V to 6.0V input and supports output voltage adjustment from 1.25V to 6.0V via external resistor divider - ideal for DSP core power and battery-powered portable electronics requiring stable low-noise bias.
For engineers reviewing the LP3982IMMX-ADJ datasheet, LP3982IMMX-ADJ pinout, LP3982IMMX-ADJ application, or LP3982IMMX-ADJ equivalent, key selection criteria include its PMOS pass transistor architecture enabling ultra-low IQ and shutdown current (1nA), ceramic-capacitor stability (≥2.2µF), FAULT pin for regulation monitoring, and MSOP-8 package compatibility with MAX8860.
Technical Context
The LP3982IMMX-ADJ implements a PMOS-based LDO topology with internal 1.25V bandgap reference and error amplifier, enabling high open-loop gain and precise output regulation. Its feedback loop incorporates an internally generated zero to ensure stability with low-ESR ceramic capacitors as small as 2.2µF - eliminating reliance on capacitor ESR for compensation.
It integrates fault detection (open-drain FAULT pin active low during dropout, overcurrent, or thermal shutdown), logic-controlled shutdown (SHDN pin with 0.4V max low threshold), and fast 120µs turn-on time using an internal 500µA charge current source. The SET pin accepts external resistive divider for output voltage programming while maintaining ±2% tolerance across load (100µA–300mA) and temperature (−40°C to +85°C).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 300mA guaranteed - supports moderate-power digital loads like DSP cores without thermal derating under typical PCB layout. |
| Dropout Voltage | 120mV typical @ 300mA - enables >95% battery energy utilization down to end-of-life voltage in single-cell Li-ion or multi-cell alkaline systems. |
| Quiescent Current | 90µA typical - minimizes standby power loss in always-on subsystems such as real-time clock or RAM keep-alive circuits. |
| Shutdown Current | 1nA typical - ensures negligible battery drain during extended storage or deep sleep modes. |
| Output Noise | 37µV RMS (10Hz–100kHz) - meets stringent analog supply requirements for ADC references or RF front-end biasing. |
| Input Voltage Range | 2.5V to 6.0V - compatible with Li-ion (2.7–4.2V), LiFePO₄ (2.5–3.65V), and dual-AA/AAA (3.0–4.5V) battery stacks. |
| Output Voltage Range | 1.25V to 6.0V (adjustable) - programmable via external R1/R2 divider; R2 = 100kΩ recommended for optimal PSRR and accuracy. |
| PSRR | 60dB typical @ 1kHz - suppresses switching noise from upstream DC/DC converters feeding the LDO input. |
Pinout & Package
LP3982IMMX-ADJ is packaged in an 8-pin MSOP (NSC drawing MUA08A), 3.0mm × 3.0mm × 1.0mm body, exposed pad optional for thermal enhancement. Pinout validated per National Semiconductor DS200369 (March 2006) and TI replacement documentation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (VIN) | Input Supply | Accepts 2.5V–6.0V unregulated input; requires ≥1µF ceramic bypass capacitor near pin. |
| 2 (GND) | Power Ground | Common return for VIN, VOUT, SHDN, FAULT, and SET; must connect to low-impedance ground plane. |
| 3 (VOUT) | Main Output | Regulated output node; connects to 2.2µF minimum ceramic capacitor and load. |
| 4 (FAULT) | Open-Drain Fault Indicator | Active-low signal indicating dropout, overcurrent, or thermal shutdown; requires external 100kΩ pull-up to system rail. |
| 5 (SHDN) | Logic-Controlled Enable | Active-high enable; <0.4V = shutdown (1nA IQ), >2V = active; tolerates up to 6.5V absolute max. |
| 6 (CC) | Noise Bypass Capacitor Terminal | Connects to 33nF NPO/COG capacitor to reduce output noise; directly ties to internal bandgap reference. |
| 7 (SET) | Feedback Reference Input | Accepts voltage divider from VOUT to GND; sets output as VO = 1.25V × (1 + R1/R2); internal 1.25V reference. |
| 8 (VOUT) | Secondary Output Terminal | Dual VOUT pins reduce trace resistance and improve current sharing; both must connect to same output node. |
Key Features
| Feature | Design Value |
|---|---|
| PMOS Pass Transistor | Eliminates base-drive current loss - unlike PNP LDOs - enabling 90µA IQ and 1nA shutdown without sacrificing output drive capability. |
| Ceramic-Capacitor Stability | Stable with ≥2.2µF X5R/X7R ceramics - avoids costly tantalum or aluminum electrolytics and saves board space in portable designs. |
| Integrated Fault Detection | Single open-drain FAULT pin reports dropout, thermal shutdown, and current limit - simplifies system-level health monitoring without external comparators. |
| Fast Turn-On Time | 120µs typical to 90% of final output - supports rapid power sequencing in multi-rail embedded systems without external delay circuitry. |
| Adjustable Output Architecture | SET pin accepts standard resistor divider - enables one BOM item to support multiple voltage rails (e.g., 1.8V, 2.5V, 3.3V) with no mask change. |
| Thermal Protection with Hysteresis | Shuts down at 160°C junction temperature and re-enables after 10°C cooldown - prevents thermal runaway during sustained overload or poor heatsinking. |
Applications
| Wireless Handset Power | DSP Core Bias |
|---|---|
Use Scenario: Powering baseband processor I/O and RF transceiver analog sections in GSM/UMTS handsets with single-cell Li-ion battery. IC Role / Device Role / Timing Role: Primary low-noise, low-quiescent LDO supplying clean 2.82V or 3.0V to sensitive RF blocks and mixed-signal interfaces. Use Value: 37µV RMS noise and 60dB PSRR prevent AM-to-PM distortion and phase noise degradation in transmit paths. |
Use Scenario: Delivering tightly regulated 1.2V–1.8V core voltage to DSPs (e.g., TI C5000, ADI SHARC) during burst-mode processing. IC Role / Device Role / Timing Role: Adjustable LDO providing dynamic core voltage scaling in response to performance mode changes. Use Value: 120mV dropout allows operation down to 1.32V input - extending usable battery life by >15 minutes per charge cycle. |
| Battery-Powered Instrumentation | Portable Information Appliance |
Use Scenario: Powering precision ADCs, op-amps, and sensor signal chains in handheld multimeters or gas analyzers. IC Role / Device Role / Timing Role: Low-noise analog supply rail decoupled from noisy digital domains using separate LDO stage. Use Value: 90µA quiescent current and 1nA shutdown enable >1-year shelf life on coin-cell batteries without compromising measurement integrity. |
Use Scenario: Supplying 3.3V logic and 1.8V memory rails in e-readers, barcode scanners, and portable POS terminals. IC Role / Device Role / Timing Role: Dual-VOUT LDO delivering simultaneous regulated outputs to microcontroller and NAND flash interface. Use Value: Dual output pins reduce IR drop and improve transient response during high-current read/write bursts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar adjustable-output LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX8860EUB+T | Pin- and package-compatible; identical 8-pin µMAX footprint but requires 4.7µF min output cap and lacks CC pin for noise filtering. | No integrated noise bypass terminal - higher output noise (≈55µV RMS) limits use in RF/analog-sensitive designs. | Preferred only when legacy MAX8860 footprint reuse is mandatory and noise budget permits. |
| TLS850F0TESA1 | Automotive-grade AEC-Q100 qualified; wider temp range (−40°C to +150°C) but higher IQ (50µA typ) and no FAULT pin. | Designed for engine control modules - lacks regulation fault reporting needed for portable battery management. | Select only for automotive under-hood applications where extended temperature and qualification outweigh feature trade-offs. |
Compared with LP3982IMMX-ADJ, MAX8860EUB+T offers mechanical compatibility but sacrifices noise performance and fault visibility, while TLS850F0TESA1 provides automotive robustness at the cost of programmability and system-level diagnostics - making LP3982IMMX-ADJ the optimal choice for portable, battery-constrained, noise-sensitive designs requiring full status monitoring.
Availability
LP3982IMMX-ADJ is available at Aetrix Electronics and suitable for wireless handset power, DSP core bias, and portable instrumentation requiring stable component supply, long-term lifecycle continuity, and RoHS-compliant packaging.
Supply support for LP3982IMMX-ADJ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired National Semiconductor in 2011 and maintains full technical and supply chain support for legacy National products including the LP3982 series.
The LP3982IMMX-ADJ belongs to National's micropower LDO family designed specifically for battery-powered portable electronics demanding ultra-low IQ, low-noise regulation, and ceramic-capacitor compatibility in space-constrained MSOP packages.
FAQ
What is the minimum output capacitance required for stable operation of the LP3982IMMX-ADJ?
The LP3982IMMX-ADJ is stable with a minimum 2.2µF ceramic output capacitor (X5R or X7R dielectric). This value is validated across temperature and load conditions per DS200369. Using smaller capacitors risks instability due to insufficient phase margin, while larger values (e.g., 10µF) are acceptable but offer diminishing returns in noise suppression. The 2.2µF requirement enables compact, low-cost designs without tantalum or electrolytic components.
How does the FAULT pin on the LP3982IMMX-ADJ function, and what conditions trigger it?
The FAULT pin on the LP3982IMMX-ADJ is an open-drain output that pulls low during three conditions: (1) input-to-output differential falls below the tracked dropout threshold, (2) thermal shutdown activates at ~160°C junction temperature, or (3) current limit is reached (~330–770mA). It remains low until all fault conditions clear and the regulator re-stabilizes. A 100kΩ pull-up resistor to system rail is required for proper logic-level interfacing with microcontrollers or PMICs.
Can the LP3982IMMX-ADJ be used with a 1.5V input supply?
No - the LP3982IMMX-ADJ has a minimum input voltage rating of 2.5V per Absolute Maximum Ratings and Operating Conditions tables. Operation below 2.5V violates guaranteed specifications and may result in unregulated output, increased dropout, or failure to start. For sub-2.5V inputs, consider dedicated ultra-low-input LDOs such as TPS7A05 (1.8V min VIN) or AP2204 (1.8V min VIN), which are not pin-compatible with LP3982IMMX-ADJ.
What is the purpose of the CC pin (Pin 6) on the LP3982IMMX-ADJ, and what capacitor value is recommended?
The CC pin on the LP3982IMMX-ADJ connects directly to the internal bandgap reference and accepts a noise-bypass capacitor to reduce output voltage noise. A 33nF NPO or COG ceramic capacitor is specified as optimal in DS200369 - this value reduces RMS noise from 37µV to <25µV while maintaining fast 120µs turn-on time. Larger values increase turn-on delay; smaller values provide less noise attenuation. Leakage current must remain below 1nA to avoid reference loading and output voltage error.
Is the LP3982IMMX-ADJ RoHS compliant and lead-free?
Yes - the LP3982IMMX-ADJ is RoHS compliant and lead-free per National Semiconductor's Banned Substances Specification (CSP-9-111S2) and TI's current product declarations. The MSOP-8 package uses matte tin lead finish and conforms to JEDEC J-STD-020 moisture sensitivity level 1 (MSL-1), allowing unlimited floor life at ≤30°C/60% RH. Full compliance documentation is available through TI's product page for SNPS3982 (TI's cross-reference part number).
LP3982IMMX-ADJ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Adjustable
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 1.25V
- Voltage - Output (Max):
- 6V
- Voltage Dropout (Max):
- 220mV
- Current - Output:
- 300mA
- Current - Quiescent (Iq):
- 270 µA
- Current - Supply (Max):
- -
- PSRR:
- -
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-VSSOP
LP3982IMMX-ADJ FAQ
1.How can I place an order for LP3982IMMX-ADJ through Aetrix?
Please submit a Request for Quotation (RFQ) for LP3982IMMX-ADJ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LP3982IMMX-ADJ reliable?
The price and inventory of LP3982IMMX-ADJ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP3982IMMX-ADJ is usually 5 days.
3.What payment methods are accepted for LP3982IMMX-ADJ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP3982IMMX-ADJ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LP3982IMMX-ADJ?
LP3982IMMX-ADJ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LP3982IMMX-ADJ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LP3982IMMX-ADJ?
For technical support, including LP3982IMMX-ADJ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP3982IMMX-ADJ requirements.
6.How does Aetrix verify that LP3982IMMX-ADJ is sourced from the original manufacturer or authorized distributors?
All LP3982IMMX-ADJ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP3982IMMX-ADJ meets industry standards.
7.What is the process for return or replacement of LP3982IMMX-ADJ?
All LP3982IMMX-ADJ units undergo pre-shipment inspection (PSI). If there is an issue with LP3982IMMX-ADJ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LP3982IMMX-ADJ part is unused and in its original packaging.
Return procedure for LP3982IMMX-ADJ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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