Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Part Number*
Quantity*
Message
Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Upload My List
Message

Texas Instruments LP3991TL-2.0/NOPB

Part No.:
LP3991TL-2.0/NOPB
Manufacturer:
Texas Instruments
Category:
Voltage Regulators - Linear, Low Drop Out (LDO) Regulators
Package:
4-WFBGA, DSBGA
Datasheet:
AetrixLP3991TL-2.0/NOPB.pdf
Description:
IC REG LINEAR 2V 300MA 4DSBGA
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,250

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Part Number
Quantity*
Price
Name*
Company
Email*
Comments

Product details

Overview

LP3991TL-2.0/NOPB from Texas Instruments is a fixed 2.0-V, 300-mA low-dropout linear regulator in a 4-pin DSBGA package (1.43 mm × 0.96 mm), designed for post-DC/DC regulation in space-constrained digital systems. It delivers ±1% output accuracy at room temperature, 125-mV dropout at full load, and operates from 1.65 V to 4 V input with only 50 µA quiescent current at 1 mA load - ideal for battery-powered handheld devices requiring clean, stable core voltage.

For engineers reviewing the LP3991TL-2.0/NOPB datasheet, LP3991TL-2.0/NOPB pinout, LP3991TL-2.0/NOPB application, or LP3991TL-2.0/NOPB equivalent, key selection criteria include its ultra-low 0402-compatible ceramic capacitor support (2.2 µF min for ≤1.3 V, 4.7 µF for 2.0 V), 65 dB PSRR at 1 kHz, 100-µs startup time, thermal/short-circuit protection, and enable-controlled shutdown drawing <1 µA.

Technical Context

The LP3991TL-2.0/NOPB integrates a PMOS pass transistor with internal biasing and error amplifier, enabling operation down to 1.65 V input while maintaining regulation at 2.0 V output. Its EN pin features a 1.2-MΩ internal pulldown resistor and logic-level thresholds (VIH = 0.95 V, VIL = 0.4 V), supporting direct connection to microcontroller GPIOs without external pullups.

Stability is guaranteed with 4.7 µF X7R/X5R ceramic output capacitors (ESR 5–500 mΩ) and 1 µF input capacitance. The device remains stable under no-load conditions and exhibits controlled inrush current (600–1000 mA), minimizing input rail disturbance during power-up.

Key Specifications

Parameter Value and Actual Design Meaning
Output Voltage Fixed 2.0 V ±1% at 25°C; ±2.5% over –40°C to +85°C ambient - ensures reliable core supply for 2.0-V I/O or memory interfaces.
Max Output Current 300 mA continuous - sufficient for powering DSP cores, FPGA I/O banks, or multi-core SoCs in portable applications.
Dropout Voltage 125 mV at 300 mA load - enables regulation from 2.125 V input, critical for Li-ion battery discharge tail-end operation.
PSRR 65 dB at 1 kHz - suppresses switching noise from upstream DC-DC converters, reducing need for additional filtering.
Quiescent Current 50 µA at 1 mA load - extends battery life in always-on subsystems such as real-time clocks or sensor hubs.
Startup Time 100 µs to 95% of 2.0 V - supports fast wake-up sequences in low-power microcontrollers and wearables.
Noise (10 Hz–100 kHz) 280 µVRMS - meets low-noise requirements for ADC reference supplies and RF front-end biasing.

Pinout & Package

LP3991TL-2.0/NOPB uses a 4-pin DSBGA (YZR) package measuring 1.43 mm × 0.96 mm with bottom-side solder bumps - optimized for ultra-compact PCB layouts in mobile and wearable electronics.

Pin/Terminal Circuit Role Design Meaning
A1 GND Power ground reference; must be connected directly to PCB ground plane via thermal pad for optimal thermal performance and noise immunity.
A2 EN Active-high enable input with 1.2-MΩ internal pulldown; drives regulator ON when ≥0.95 V, OFF when ≤0.4 V - enables system-level power sequencing.
B1 OUT Regulated 2.0-V output; requires 4.7 µF ceramic capacitor (X7R/X5R, ESR 5–500 mΩ) placed within 1 cm for stability and transient response.
B2 IN Input supply (1.65–4 V); requires 1 µF ceramic capacitor placed ≤1 cm from pin to suppress high-frequency noise and ensure loop stability.

Key Features

Feature Design Value
Ultra-low input voltage operation Starts regulation at 1.65 V - enables use after buck converters with tight output tolerances (e.g., 1.8 V ±5%) across full battery range.
Ceramic capacitor compatibility Stable with 0402-size 4.7 µF X7R/X5R capacitors - eliminates need for larger case sizes, saving >0.5 mm² board area per channel.
Inrush current limiting Controlled to 600–1000 mA - prevents input rail collapse during cold start, avoiding brownout resets in multi-rail systems.
Thermal & short-circuit protection Auto-shutdown at 160°C junction temperature with 20°C hysteresis - ensures robustness in sealed enclosures or high-ambient environments.
No-load stability Maintains regulation with zero output current - supports always-on backup rails for RTCs, SRAM retention, or wake-on-event circuits.

Applications

Mobile Application Processor Core Supply Wearable Sensor Hub Power

Use Scenario: Powers 2.0-V I/O domain of application processors (e.g., Qualcomm Snapdragon, MediaTek MT-series) in smartphones and tablets.

IC Role / Device Role / Timing Role: Post-regulator cleaning ripple from primary buck converter; provides low-noise, fast-transient 2.0-V rail synchronized to processor sleep/wake cycles via EN pin.

Use Value: Enables 65 dB PSRR suppression of 1–2 MHz switching noise, reducing EMI emissions by >10 dB and eliminating need for ferrite beads on core rails.

Use Scenario: Supplies 2.0-V analog front-end and digital logic in compact wearable health monitors (ECG, SpO₂, motion sensors).

IC Role / Device Role / Timing Role: Primary LDO delivering regulated 2.0-V from single-cell Li-ion (3.0–4.2 V); enabled only during sensor acquisition bursts to minimize average current draw.

Use Value: 50 µA quiescent current and 100-µs startup allow sub-10 µA system standby with <100 µs wake latency - extending battery life to >7 days on 100 mAh cell.

Post-Buck Regulation for RF Modules Low-Power MCU I/O Rail

Use Scenario: Clean 2.0-V supply for Wi-Fi/BT transceiver I/O interfaces following a 3.3-V buck converter in IoT edge nodes.

IC Role / Device Role / Timing Role: Noise-filtering LDO decoupling RF module digital control lines from switching noise; EN pin tied to host MCU GPIO for coordinated power gating.

Use Value: 280 µVRMS output noise and 125-mV dropout preserve signal integrity on high-speed SDIO/UART lines, preventing packet errors under dynamic load.

Use Scenario: Powers 2.0-V GPIO and peripheral interface of ARM Cortex-M0+/M4 microcontrollers in industrial sensor nodes.

IC Role / Device Role / Timing Role: Fixed-output LDO supplying MCU I/O bank; leverages EN pin for deep-sleep mode entry/exit with <1 µA shutdown current.

Use Value: ±1% output accuracy ensures reliable level-shifting between 2.0-V MCU and 3.3-V legacy peripherals, eliminating need for external voltage translators.

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Alternative Part Technical Difference Application Difference Selection Advice
TPL720F20-DBVR 2.0-V fixed output, 200-mA max, 60-mV dropout at 150 mA, 25 µA IQ - smaller dropout but lower current rating and no EN pin. Suitable for lower-current peripherals (I²C, SPI) but not 300-mA processor cores; lacks enable control for power sequencing. Select TPL720F20-DBVR only when load current ≤200 mA and enable functionality is unnecessary.
MCP1826-2002E/DB 2.0-V fixed output, 300-mA max, 350-mV dropout at 300 mA, 120 µA IQ - higher dropout and quiescent current than LP3991TL-2.0/NOPB. Acceptable for cost-sensitive industrial designs where 1.65-V minimum input is not required and 280 µV noise is non-critical. Choose MCP1826-2002E/DB only if board space allows larger SOT-23-5 package and thermal design accommodates higher power dissipation.

Compared with TPL720F20-DBVR and MCP1826-2002E/DB, LP3991TL-2.0/NOPB uniquely balances ultra-low input voltage (1.65 V), low dropout (125 mV), low noise (280 µVRMS), and integrated enable - making it the only option suitable for high-efficiency, space-constrained, battery-operated digital systems demanding precise 2.0-V regulation.

Availability

LP3991TL-2.0/NOPB is available at Aetrix Electronics and suitable for mobile processor core supplies, wearable sensor hubs, post-buck RF regulation, and low-power MCU I/O rails requiring stable component supply across production lifecycles.

Supply support for LP3991TL-2.0/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management IC design and manufacturing.

The LP3991 series was developed specifically for ultra-low-voltage, high-density digital applications - targeting post-regulation of DC-DC converters in battery-powered handheld devices where board space, efficiency, and noise performance are critical.

FAQ

What is the minimum input voltage required for LP3991TL-2.0/NOPB to regulate 2.0 V output?

The LP3991TL-2.0/NOPB requires a minimum input voltage of 2.125 V to maintain regulation at 2.0 V output under 300-mA load, based on its 125-mV dropout specification. However, the device can operate down to 1.65 V input - it simply cannot sustain 2.0 V output below VIN = VOUT + VDO. For reliable 2.0-V operation across temperature and load, TI recommends VIN ≥ 2.2 V.

Can LP3991TL-2.0/NOPB use a 2.2-µF output capacitor instead of 4.7 µF?

No - LP3991TL-2.0/NOPB requires a minimum 4.7-µF ceramic output capacitor (X7R/X5R, ESR 5–500 mΩ) for stable operation at 2.0 V output. The 2.2-µF option is explicitly permitted only for VOUT ≤ 1.3 V per TI's datasheet. Using 2.2 µF at 2.0 V risks instability, excessive load transient deviation (>140 mV), and potential oscillation.

Does LP3991TL-2.0/NOPB require an external pullup resistor on the EN pin?

No - LP3991TL-2.0/NOPB includes a built-in 1.2-MΩ pulldown resistor on the EN pin. To enable the device, drive EN ≥ 0.95 V (e.g., from a 1.8-V or 3.3-V GPIO). To disable, leave EN floating (it will default to GND via internal resistor) or drive ≤ 0.4 V. No external pullup is needed unless active-low logic control is implemented with an inverter.

What is the thermal performance of LP3991TL-2.0/NOPB in its DSBGA package?

LP3991TL-2.0/NOPB in the YZR (DSBGA) package has a junction-to-ambient thermal resistance (RθJA) of 189.7°C/W on a high-K PCB. At 300 mA load and 3.6 V input, power dissipation is ~480 mW, resulting in ~91°C junction rise above ambient. Derating is required above 85°C ambient; TI specifies operation up to +125°C junction temperature with proper PCB copper area and thermal vias under the die pad.

Is LP3991TL-2.0/NOPB suitable for powering analog circuits like ADC references?

Yes - LP3991TL-2.0/NOPB delivers 280 µVRMS output noise (10 Hz–100 kHz) and 65 dB PSRR at 1 kHz, making it suitable for precision analog circuits including SAR ADC references and op-amp bias rails. For ultra-low-noise applications (<100 µVRMS), TI recommends adding a 10-nF ceramic bypass capacitor between OUT and GND, which further reduces noise without degrading transient response.

LP3991TL-2.0/NOPB Specifications

Product attributes
Attribute value
Manufacturer:
Texas Instruments
Series:
-
Package/Case:
4-WFBGA, DSBGA
Packaging:
Tape & Reel (TR)
Product Status:
Active
Output Configuration:
Positive
Output Type:
Fixed
Number of Regulators:
1
Voltage - Input (Max):
4V
Voltage - Output (Min/Fixed):
2V
Voltage - Output (Max):
-
Voltage Dropout (Max):
0.16V @ 300mA
Current - Output:
300mA
Current - Quiescent (Iq):
100 µA
Current - Supply (Max):
225 µA
PSRR:
65dB (1kHz)
Control Features:
Enable
Protection Features:
Over Temperature, Short Circuit
Operating Temperature:
-40°C ~ 85°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
4-DSBGA (1x1)

LP3991TL-2.0/NOPB FAQ

1.How can I place an order for LP3991TL-2.0/NOPB through Aetrix?

Please submit a Request for Quotation (RFQ) for LP3991TL-2.0/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LP3991TL-2.0/NOPB reliable?

The price and inventory of LP3991TL-2.0/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP3991TL-2.0/NOPB is usually 5 days.

3.What payment methods are accepted for LP3991TL-2.0/NOPB?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP3991TL-2.0/NOPB transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LP3991TL-2.0/NOPB?

LP3991TL-2.0/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LP3991TL-2.0/NOPB order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LP3991TL-2.0/NOPB?

For technical support, including LP3991TL-2.0/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP3991TL-2.0/NOPB requirements.

6.How does Aetrix verify that LP3991TL-2.0/NOPB is sourced from the original manufacturer or authorized distributors?

All LP3991TL-2.0/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP3991TL-2.0/NOPB meets industry standards.

7.What is the process for return or replacement of LP3991TL-2.0/NOPB?

All LP3991TL-2.0/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LP3991TL-2.0/NOPB, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LP3991TL-2.0/NOPB part is unused and in its original packaging.

Return procedure for LP3991TL-2.0/NOPB:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

LP3991TL-2.0/NOPB Tags

  • LP3991TL-2.0/NOPB
  • LP3991TL-2.0/NOPB PDF
  • LP3991TL-2.0/NOPB Datasheet
  • LP3991TL-2.0/NOPB Specifications
  • LP3991TL-2.0/NOPB Images
  • Texas Instruments
  • Texas Instruments LP3991TL-2.0/NOPB
  • Buy LP3991TL-2.0/NOPB
  • LP3991TL-2.0/NOPB Price
  • LP3991TL-2.0/NOPB Distributor
  • LP3991TL-2.0/NOPB Supplier
  • LP3991TL-2.0/NOPB Wholesale
Related Products
MIC5504-1.8YM5-TR
MIC5504-1.8YM5-TR

Microchip Technology

MIC5504-3.3YM5-TR
MIC5504-3.3YM5-TR

Microchip Technology

MIC5365-3.0YC5-TR
MIC5365-3.0YC5-TR

Microchip Technology

MIC5365-1.8YC5-TR
MIC5365-1.8YC5-TR

Microchip Technology

MIC5365-2.5YC5-TR
MIC5365-2.5YC5-TR

Microchip Technology

MIC5365-3.3YC5-TR
MIC5365-3.3YC5-TR

Microchip Technology

MIC5365-3.3YD5-TR
MIC5365-3.3YD5-TR

Microchip Technology

MIC5317-3.3YM5-TR
MIC5317-3.3YM5-TR

Microchip Technology

TLV1117LV33DCYR
TLV1117LV33DCYR

Texas Instruments

MIC5317-3.3YMT-TZ
MIC5317-3.3YMT-TZ

Microchip Technology

MIC5528-3.3YMT-TR
MIC5528-3.3YMT-TR

Microchip Technology

TLV75801PDRVR
TLV75801PDRVR

Texas Instruments

Tech Hub

Search

Search

PRODUCT

PRODUCT

PHONE

PHONE

USER

USER