Texas Instruments LP3996QSD-1833/NOPB

Overview

LP3996QSD-1833/NOPB from Texas Instruments is an automotive-grade dual LDO regulator delivering fixed 1.8 V (150 mA) and 3.3 V (300 mA) outputs with independent enable control, power-on-reset (POR) functionality, and ultra-low 35 µA quiescent current. It operates from 2.0 V to 6.0 V input and is used in automotive infotainment power sequencing and microcontroller core/peripheral rail generation.

For engineers reviewing the LP3996QSD-1833/NOPB datasheet, LP3996QSD-1833/NOPB pinout, LP3996QSD-1833/NOPB application, or LP3996QSD-1833/NOPB equivalent, key selection considerations include output voltage pairing, POR delay adjustability via external capacitor on SET pin, thermal shutdown at 160°C, stability with 1 µF ceramic output capacitors, and AEC-Q100 Grade 1 qualification for –40°C to +125°C operation.

Technical Context

The LP3996QSD-1833/NOPB integrates two independent low-dropout regulators: LDO1 (150 mA, 1.8 V) and LDO2 (300 mA, 3.3 V), each with dedicated active-high enable pins (EN1, EN2). Its POR circuit monitors LDO2 output and asserts an open-drain low-active flag when VOUT2 drops below 88% of nominal, with delay programmable via capacitor on SET pin using ISET = 1.3 µA and VTH(SET) = 1.25 V.

Stability is ensured with ≥1 µF ceramic output capacitors (ESR 5–500 mΩ) and a 10 nF CBYP capacitor for reference bypass, improving PSRR (70 dB @ 1 kHz for LDO2) and reducing output noise (75 µVRMS @ 3.3 V). The device uses internal thermal shutdown (160°C) and short-circuit protection (550–840 mA for LDO2).

Key Specifications

Pinout & Package

LP3996QSD-1833/NOPB is housed in a thermally enhanced 10-pin WSON (DSC) package measuring 3 mm × 3 mm with exposed thermal pad (Pin 6 and underside GND). The package supports lead-free reflow (MSL Level-1, 260°C peak) and delivers θJA = 55°C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-LDO with POR applications.

Compared with TPS74901RGWR and TLV7071833PDQNR, LP3996QSD-1833/NOPB uniquely integrates matched dual outputs, automotive-grade POR, and ultra-low IQ in a single AEC-Q100-compliant package - eliminating three components and enabling compact, reliable automotive power sequencing.

Availability

LP3996QSD-1833/NOPB is available at Aetrix Electronics and suitable for automotive infotainment, ADAS camera modules, and telematics control units requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for LP3996QSD-1833/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of automotive qualification expertise and broad power management portfolio.

LP3996QSD-1833/NOPB belongs to TI's automotive LDO family designed specifically for power sequencing, rail generation, and reset management in safety-critical vehicle subsystems operating from –40°C to +125°C.

FAQ

What is the purpose of the SET pin on the LP3996QSD-1833/NOPB?

The SET pin on the LP3996QSD-1833/NOPB sources a precise 1.3 µA current to charge an external capacitor to a 1.25 V threshold, determining the POR delay time. For example, a 0.1 µF capacitor yields ~100 ms delay. This eliminates external timing components and enables programmable reset hold-off for microcontrollers during power ramp-up.

Does the LP3996QSD-1833/NOPB require external compensation components?

No, the LP3996QSD-1833/NOPB is internally compensated and stable with 1 µF ceramic output capacitors (X7R/X5R, ESR 5–500 mΩ). No external resistors or capacitors are needed for loop stability - simplifying layout and reducing BOM count compared to adjustable LDOs.

How does the POR function behave during input voltage brownout?

During brownout, the POR pin on the LP3996QSD-1833/NOPB goes low when VOUT2 falls below 88% of 3.3 V (≈2.9 V) and returns high only after VOUT2 rises above 96% (≈3.17 V), providing 8% hysteresis. This prevents chatter during marginal supply conditions and ensures clean reset assertion for connected MCUs.

Can the LP3996QSD-1833/NOPB operate with a 2.5 V input supplying the 3.3 V output?

No - the LP3996QSD-1833/NOPB requires VIN ≥ VOUT + dropout voltage. With 210 mV dropout at 300 mA, minimum VIN for 3.3 V output is 3.51 V. At 2.5 V input, LDO2 cannot regulate; however, LDO1 (1.8 V) remains functional if VIN ≥ 2.01 V (110 mV dropout).

Is the LP3996QSD-1833/NOPB pin-compatible with other variants in the LP3996-Q1 family?

Yes - all LP3996-Q1 variants (e.g., LP3996QSD-1825/NOPB, LP3996QSD-3333/NOPB) share identical WSON-10 (DSC) pinout and footprint. Only output voltages differ; EN1, EN2, SET, POR, and GND functions remain consistent across the family, enabling drop-in replacement for voltage reconfiguration.