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Texas Instruments LP5952LC-1.2

Part No.:
LP5952LC-1.2
Manufacturer:
Texas Instruments
Category:
Voltage Regulators - Linear, Low Drop Out (LDO) Regulators
Package:
6-UFDFN
Datasheet:
AetrixLP5952LC-1.2.pdf
Description:
IC REG LINEAR 1.2V 350MA 6USON
Quantity:
Payment:
Payment
Shipping:
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Inventory:3,536

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Product details

Overview

LP5952LC-1.2 from Texas Instruments is a dual-rail linear regulator designed for ultralow-voltage post-regulation in battery-powered systems, delivering a fixed 1.2 V output at up to 350 mA. It operates from two independent rails: VBATT (2.5 V–5.5 V) powers internal circuitry, while VIN (0.7 V–4.5 V) supplies the regulated output path. Its 100 µVRMS output noise, ±15 mV load transient response, and 0.1 µA shutdown current make it suitable for powering sensitive RF or analog baseband circuits in mobile handsets.

For engineers reviewing the LP5952LC-1.2 datasheet, LP5952LC-1.2 pinout, LP5952LC-1.2 application, or LP5952LC-1.2 equivalent, key selection considerations include dual-supply sequencing constraints (VIN ≤ VBATT), dropout voltage under 350 mA load (≤150 mV), thermal shutdown threshold (165°C), USON-6 package footprint (2.0 mm × 2.0 mm), and compatibility with ceramic output capacitors as low as 2.2 µF.

Technical Context

The LP5952LC-1.2 implements a dual-bias architecture: VBATT powers control logic and reference circuitry, while VIN feeds an NFET pass device regulating the 1.2 V output. This separation enables stable operation even when VIN drops below typical LDO input thresholds-critical for post-DC/DC regulation where VIN may be as low as 0.7 V. The device enforces strict rail sequencing: VIN must never exceed VBATT to prevent latch-up or undefined behavior.

Its fast turn-on (70–150 µs startup time) and no-load stability support always-on memory retention and burst-mode power delivery. Internal protection includes thermal shutdown (165°C trip, 20°C hysteresis), short-circuit current limiting, and undervoltage lockout-ensuring robustness across –40°C to +125°C junction temperature range without external supervision circuitry.

Key Specifications

ParameterValue and Actual Design Meaning
Output VoltageFixed 1.2 V ±2% tolerance ensures stable core supply for 1.2-V logic domains without external feedback.
Max Output Current350 mA continuous delivery supports high-efficiency PMIC companion rails or RF transceiver biasing.
VIN Range0.7 V to 4.5 V enables use after buck converters with low output voltages, e.g., 0.8-V intermediate bus.
VBATT Range2.5 V to 5.5 V accommodates single Li-ion (2.7–4.2 V) or 3-cell NiMH/NiCd (3.6–4.5 V) batteries directly.
Dropout Voltage (350 mA)≤150 mV at VIN ensures minimal headroom loss-critical for extending battery runtime in portable devices.
Quiescent Current (VBATT)50 µA typical enables >1-year shelf life in always-on IoT sensors powered by coin cells or small Li-ion packs.
Output Noise100 µVRMS (10 Hz–100 kHz) meets stringent RF PLL and ADC reference supply requirements.
PSRR (1 kHz, VIN)95 dB suppresses switching noise from upstream DC-DC converters, preserving signal integrity in mixed-signal SoCs.

Pinout & Package

LP5952LC-1.2 is packaged in a 6-pin USON (NKH) package measuring 2.00 mm × 2.00 mm with 0.5-mm pitch, optimized for space-constrained mobile PCBs.

Pin/TerminalCircuit RoleDesign Meaning
BATT (Pin 1)Bias supply inputMust be ≥2.5 V and ≥VIN; powers internal reference, error amplifier, and EN logic-no current sourcing to load.
GND (Pin 2)Analog/digital groundSingle ground return for both rails; requires low-inductance connection to minimize PSRR degradation.
IN (Pin 3)Regulated power inputFeeds NFET pass device; VIN ≤ VBATT mandatory-violation risks functional failure or damage.
NC (Pin 5)No internal connectionUnbonded pad; must remain unconnected and unstubbed to avoid parasitic coupling or EMI.
OUT (Pin 4)Regulated outputDelivers 1.2 V at up to 350 mA; requires ≥2.2 µF X7R ceramic capacitor with ≤300 mΩ ESR for stability.
EN (Pin 6)Enable logic inputActive-high control: VIH ≥1 V enables regulation; VIL ≤0.4 V forces 0.1 µA shutdown-tie to VBATT if unused.

Key Features

FeatureDesign Value
Dual-rail architectureSeparates bias (VBATT) and power (VIN) paths-enables stable regulation down to 0.7 V input without compromising reference accuracy.
No-load stabilityMaintains regulation with zero output current-essential for CMOS RAM keep-alive and standby mode applications.
Fast startup70–150 µs enable-to-95% VOUT transition with controlled 120 mA inrush-prevents system brownout during wake-up.
Thermal protection165°C shutdown with 20°C hysteresis delivers self-recovering fault handling-no external thermal sensor required.
Reverse current blockingParasitic body diode limits reverse conduction to ≤50 mA; external Schottky needed only if VOUT > VIN exceeds this threshold.
Low-noise design100 µVRMS noise and 95 dB PSRR at 1 kHz enable direct use in RF synthesizer and high-resolution ADC reference paths.

Applications

Mobile Handset BasebandWearable Sensor Hub

Use Scenario: Powers 1.2-V ARM Cortex-M core and embedded SRAM in LTE/5G smartphones during active data transmission.

IC Role / Device Role / Timing Role: Dual-rail LDO providing clean, sequenced VDD_CORE with <150 mV dropout to maximize battery utilization.

Use Value: Enables 350 mA peak current delivery with ±15 mV load transient response-preventing core voltage collapse during burst processing.

Use Scenario: Supplies ultra-low-power MCU and MEMS accelerometer in fitness tracker operating from single 3.7-V Li-ion cell.

IC Role / Device Role / Timing Role: Post-regulator converting buck converter output (e.g., 1.8 V) to precise 1.2 V for digital logic and sensor interface.

Use Value: 50 µA quiescent current extends battery life beyond 14 days in continuous monitoring mode.

Portable Medical MonitorIndustrial Handheld Terminal

Use Scenario: Delivers noise-sensitive 1.2-V supply to ECG front-end ADC and low-jitter clock generator in battery-operated patient monitor.

IC Role / Device Role / Timing Role: Low-noise LDO ensuring <100 µVRMS ripple on analog supply rail for sub-µV biomedical signal fidelity.

Use Value: 95 dB PSRR at 1 kHz rejects switching noise from adjacent DC-DC converters-eliminating need for additional LC filtering.

Use Scenario: Regulates 1.2-V I/O voltage for FPGA configuration and secure element communication in ruggedized barcode scanner.

IC Role / Device Role / Timing Role: Dual-supply LDO supporting wide-input battery range (2.7–5.5 V) while maintaining 125°C junction rating.

Use Value: Thermal shutdown with 20°C hysteresis allows safe operation in sealed enclosures without forced airflow.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-rail linear regulator applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
TPL7407LPGEDRSingle-rail 1.2-V LDO (no VBATT bias rail); 200-mA max output; 120 µVRMS noise; requires ≥1.7-V input.Lacks dual-rail architecture-cannot operate with VIN < 1.7 V or accept separate bias supply.Select only if system uses single-input supply and load current ≤200 mA.
TPS7A1633DRVRSingle-input, adjustable-output LDO; 150-mA max; 30-µVRMS noise; 1.8–6.5-V input range; no EN pin.No enable control or dual-rail support; lower noise but insufficient current for 350-mA loads.Choose for ultra-low-noise analog rails where current demand is <150 mA and sequencing simplicity is prioritized.

Compared with TPL7407LPGEDR and TPS7A1633DRVR, the LP5952LC-1.2 uniquely supports ultralow VIN (0.7 V) via dedicated VBATT bias, enabling true post-DC/DC regulation in space-constrained portable designs where other LDOs fail to start or regulate.

Availability

LP5952LC-1.2 is available at Aetrix Electronics and suitable for mobile handsets, wearable health monitors, portable medical instruments, and industrial handheld terminals requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for LP5952LC-1.2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog and embedded processing solutions, with leadership in power management ICs for portable and industrial applications.

The LP5952 product line targets ultralow-voltage, dual-rail regulation in battery-powered systems-designed specifically to extend runtime and simplify power architecture in next-generation mobile and IoT edge devices.

FAQ

What is the minimum required input voltage on the IN pin for LP5952LC-1.2 to regulate properly?

The LP5952LC-1.2 requires a minimum VIN of 0.7 V to maintain regulation. However, for full 350 mA output capability at 1.2 V, VIN must be ≥1.35 V (VOUT + dropout). At 25°C and 350 mA load, typical dropout is 128 mV in USON package-so VIN ≥1.328 V ensures specification compliance. Operation below 0.7 V is not guaranteed and may result in loss of regulation or increased noise.

Can the EN pin of LP5952LC-1.2 be left floating, or does it require a pull-up?

The EN pin of LP5952LC-1.2 must not be left floating-it is an active-high logic input with VIH ≥1 V and VIL ≤0.4 V. If enable functionality is unused, TI specifies tying EN directly to VBATT to ensure reliable turn-on. A floating EN pin may cause erratic output behavior due to noise susceptibility or undefined logic state, risking intermittent regulation or unintended shutdown.

What is the maximum allowable voltage difference between VBATT and VIN on LP5952LC-1.2?

The LP5952LC-1.2 datasheet mandates that VIN must never exceed VBATT under any condition. While absolute maximum ratings list "BATT pin to IN pin" as 0.2 V, TI's functional specification explicitly requires VIN ≤ VBATT at all times-including during power-up, transient events, and fault conditions. Exceeding this violates the dual-rail architecture and may cause permanent damage or unpredictable regulation failure.

Does LP5952LC-1.2 require external capacitors, and what are the recommended values?

Yes, LP5952LC-1.2 requires external capacitors for stability. A minimum 2.2 µF X7R ceramic capacitor with ≤300 mΩ ESR is required on OUT; 1 µF is recommended on IN if used standalone (not post-DC/DC). Capacitors must be placed within 1 cm of their respective pins and connected to a clean analog ground. No capacitor is required on VBATT unless trace length exceeds 5 cm from battery source.

How does thermal shutdown behave on LP5952LC-1.2 during sustained overload?

When junction temperature reaches 165°C (typical), LP5952LC-1.2 triggers thermal shutdown, turning off the NFET pass device. After cooling by 20°C (hysteresis), it automatically resumes regulation-resulting in pulsed output during continuous overload. This self-recovering behavior protects the device without external intervention, but sustained operation above 125°C junction temperature degrades reliability and is outside recommended conditions.

LP5952LC-1.2 Specifications

Product attributes
Attribute value
Manufacturer:
Texas Instruments
Series:
-
Package/Case:
6-UFDFN
Packaging:
Tape & Reel (TR)
Product Status:
Obsolete
Output Configuration:
Positive
Output Type:
Fixed
Number of Regulators:
1
Voltage - Input (Max):
4.5V
Voltage - Output (Min/Fixed):
1.2V
Voltage - Output (Max):
-
Voltage Dropout (Max):
0.25V @ 350mA
Current - Output:
350mA
Current - Quiescent (Iq):
28 µA
Current - Supply (Max):
100 µA
PSRR:
80dB ~ 64dB (10Hz ~ 100kHz)
Control Features:
Enable
Protection Features:
Over Current, Over Temperature, Short Circuit, Under Voltage Lockout (UVLO)
Operating Temperature:
-40°C ~ 85°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
6-USON (2x2)

LP5952LC-1.2 FAQ

1.How can I place an order for LP5952LC-1.2 through Aetrix?

Please submit a Request for Quotation (RFQ) for LP5952LC-1.2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LP5952LC-1.2 reliable?

The price and inventory of LP5952LC-1.2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP5952LC-1.2 is usually 5 days.

3.What payment methods are accepted for LP5952LC-1.2?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP5952LC-1.2 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LP5952LC-1.2?

LP5952LC-1.2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LP5952LC-1.2 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LP5952LC-1.2?

For technical support, including LP5952LC-1.2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP5952LC-1.2 requirements.

6.How does Aetrix verify that LP5952LC-1.2 is sourced from the original manufacturer or authorized distributors?

All LP5952LC-1.2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP5952LC-1.2 meets industry standards.

7.What is the process for return or replacement of LP5952LC-1.2?

All LP5952LC-1.2 units undergo pre-shipment inspection (PSI). If there is an issue with LP5952LC-1.2, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LP5952LC-1.2 part is unused and in its original packaging.

Return procedure for LP5952LC-1.2:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

LP5952LC-1.2 Tags

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