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Texas Instruments LP5952LC-1.3

Part No.:
LP5952LC-1.3
Manufacturer:
Texas Instruments
Category:
Voltage Regulators - Linear, Low Drop Out (LDO) Regulators
Package:
6-UFDFN
Datasheet:
AetrixLP5952LC-1.3.pdf
Description:
IC REG LINEAR 1.3V 350MA 6USON
Quantity:
Payment:
Payment
Shipping:
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Inventory:2,715

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Product details

Overview

LP5952LC-1.3 from Texas Instruments is a dual-rail linear regulator designed for ultralow-voltage post-regulation in battery-powered systems, accepting 0.7 V–4.5 V on VIN and 2.5 V–5.5 V on VBATT to deliver a fixed 1.3 V output at up to 350 mA. It features 100 µVRMS output noise, ±1 mV line transient response, and 50 µA typical quiescent current from VBATT - enabling stable power for RF transceivers, PMIC core rails, and low-power microcontrollers in mobile handsets.

For engineers reviewing the LP5952LC-1.3 datasheet, LP5952LC-1.3 pinout, LP5952LC-1.3 application, or LP5952LC-1.3 equivalent, key selection criteria include dual-supply rail sequencing (VIN ≤ VBATT), dropout voltage under 1.3 V at 350 mA, thermal shutdown at 165°C, and compatibility with 2.2 µF ceramic output capacitance without external compensation.

Technical Context

The LP5952LC-1.3 implements a dual-bias architecture: VBATT powers internal control circuitry and protection logic, while VIN supplies the NFET pass device delivering regulated 1.3 V output. This separation enables operation from a single Li-Ion cell (2.7–4.2 V) or 3-cell NiMH/NiCd (3.6–4.5 V), with VIN sourced from an upstream DC-DC converter's output.

Its functional block includes integrated thermal-overload, overcurrent, and undervoltage protection; fast turn-on (70–150 µs startup time); and reverse-current path management via the NFET body diode - requiring external Schottky clamping only if output-to-input reverse bias exceeds 50 mA.

Key Specifications

Parameter Value and Actual Design Meaning
Output Voltage Fixed 1.3 V ±2% tolerance; ensures stable supply for 1.3-V I/O domains and low-voltage logic cores.
Max Output Current 350 mA continuous; supports high-pulse-load applications like GSM transmit bursts without dropout.
VIN Range 0.7 V to 4.5 V; compatible with buck converter outputs down to sub-1-V levels in multi-stage regulation.
VBATT Range 2.5 V to 5.5 V; accepts full discharge profile of Li-Ion (2.7–4.2 V) and 3-cell NiMH (3.6–4.5 V).
Dropout Voltage (VBATT) ≤1.3 V at 150 mA (DSBGA); enables regulation even as battery voltage drops near end-of-discharge.
Quiescent Current (VBATT) 50 µA typical; minimizes standby drain in always-on subsystems such as RTC or sensor wake-up circuits.
Output Noise 100 µVRMS (10 Hz–100 kHz); suitable for noise-sensitive analog blocks including PLLs and ADC references.
PSRR (VIN, 1 kHz) 95 dB; suppresses switching ripple from upstream DC-DC converters feeding the VIN rail.

Pinout & Package

LP5952LC-1.3 is available in a 5-pin DSBGA (YZR) package measuring 1.326 mm × 0.96 mm, optimized for space-constrained portable designs. The package uses bottom-side ball terminations and requires standard PCB reflow profiles per JEDEC J-STD-020.

Pin/Terminal Circuit Role Design Meaning
BATT Bias supply input Connects to battery or main system rail (2.5–5.5 V); powers internal reference, error amplifier, and protection logic.
IN Power input to pass device Supplies NFET gate drive and source; must be ≤ VBATT at all times; range 0.7–4.5 V.
GND Analog/digital ground Common return for all currents; must be low-impedance and tied directly to clean ground plane.
EN Enable logic input Active-high control: VIH ≥ 1 V enables regulation; VIL ≤ 0.4 V places device in 0.1 µA shutdown mode.
OUT Regulated output Delivers fixed 1.3 V to load; requires 2.2 µF ceramic capacitor (3–300 mΩ ESR) for stability.

Key Features

Feature Design Value
Dual-rail supply architecture Separates bias (VBATT) and power (VIN) paths to enable ultra-low VIN operation while maintaining robust internal functionality.
No-load stability Maintains regulation with zero output current - critical for CMOS RAM keep-alive and always-on monitoring circuits.
Fast startup time 70–150 µs from EN assertion to 95% VOUT - reduces wake-up latency in duty-cycled wireless sensors.
Thermal shutdown with hysteresis Triggers at 165°C (typ), releases at 145°C (typ); prevents latch-up during sustained overload or poor heatsinking.
Reverse current limiting Allows up to 50 mA reverse conduction through internal NFET body diode; eliminates need for external diode in most use cases.
Low-noise LDO topology 100 µVRMS integrated noise and 95 dB PSRR at 1 kHz support precision analog signal chains without additional filtering.

Applications

Mobile Handset Power Management RF Transceiver Bias Supply

Use Scenario: Powering baseband processor I/O rails and memory interfaces in LTE smartphones using single-cell Li-Ion battery.

IC Role / Device Role / Timing Role: Dual-rail LDO providing clean 1.3 V supply while isolating sensitive digital loads from noisy battery and DC-DC switching artifacts.

Use Value: Enables compliance with 1.3-V I/O voltage requirements while maintaining <±2 mV load regulation across 0–350 mA and −40°C to +125°C.

Use Scenario: Supplying local bias to GaAs pHEMT driver stages and mixer LO buffers in 5G mmWave front-end modules.

IC Role / Device Role / Timing Role: Ultra-low-noise post-regulator rejecting switching noise from primary PMIC buck converters feeding RF subsystems.

Use Value: Delivers 100 µVRMS noise floor and 95 dB PSRR at 1 kHz - reducing phase noise degradation in local oscillator paths.

Wearable Sensor Hub Industrial IoT Edge Node

Use Scenario: Regulating power for ultra-low-power ARM Cortex-M0+ MCU and MEMS accelerometer/gyro in hearable devices.

IC Role / Device Role / Timing Role: Always-on LDO supplying 1.3 V core voltage with 50 µA VBATT quiescent current and no-load regulation stability.

Use Value: Extends battery life beyond 7 days in sleep-dominated operation while ensuring instant wake-up without brownout.

Use Scenario: Providing isolated 1.3 V supply for isolated CAN FD transceiver logic and microcontroller peripherals in factory automation nodes.

IC Role / Device Role / Timing Role: Secondary LDO decoupling isolated digital domain from primary 3.3 V system rail, preventing ground bounce coupling.

Use Value: Achieves ±15 mV load transient response and thermal shutdown at 165°C - ensuring reliability in unventilated enclosures.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-rail LDO applications.

Alternative Part Technical Difference Application Difference Selection Advice
TPL7407LDR Single-rail input (2.7–5.5 V), 7-channel 200-mA sink driver; no VBATT/VIN separation or 1.3-V option. Designed for LED/relay driving, not precision low-noise regulation; lacks thermal shutdown and PSRR specs. Select only if discrete load switching-not voltage regulation-is required; not a functional substitute for LP5952LC-1.3.
TPS7A1633DRBR Single-input LDO (3–60 V), 150-mA output, fixed 3.3 V; no dual-rail architecture or sub-1.5-V output options. Targeted at industrial high-voltage bias rails; incompatible with Li-Ion direct connection or ultralow-VIN use cases. Use only for high-input-voltage, higher-output-voltage applications; cannot replace LP5952LC-1.3 in battery-fed 1.3-V systems.

Compared with TPL7407LDR and TPS7A1633DRBR, the LP5952LC-1.3 uniquely supports true dual-rail operation with independent VBATT and VIN inputs, fixed 1.3-V output, and sub-200-mV dropout at full load - making it irreplaceable in compact, battery-optimized 1.3-V power domains where noise, efficiency, and sequencing matter.

Availability

LP5952LC-1.3 is available at Aetrix Electronics and suitable for mobile handset power management, RF transceiver biasing, wearable sensor hubs, and industrial IoT edge nodes requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for LP5952LC-1.3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, designing and manufacturing analog ICs, embedded processors, and connectivity solutions for industrial, automotive, and consumer markets.

The LP5952LC-1.3 belongs to TI's precision low-dropout regulator product line, engineered specifically for ultralow-voltage post-regulation in space- and power-constrained portable electronics powered by single-cell batteries.

FAQ

What is the maximum allowable voltage difference between VIN and VBATT for LP5952LC-1.3?

The LP5952LC-1.3 requires VIN ≤ VBATT at all times. Absolute maximum ratings specify that the voltage difference (VBATT – VIN) must be ≥ 0 V, with no positive margin allowed. Exceeding this condition risks damage or undefined behavior. In practice, VIN should be maintained at least 0.1 V below VBATT to ensure safe margin during transients and tolerances.

Can LP5952LC-1.3 operate with zero load current while maintaining regulation?

Yes, the LP5952LC-1.3 remains stable and in regulation with no external load - a feature explicitly documented as "No-Load Stability" in the datasheet. This capability is essential for applications like CMOS RAM keep-alive circuits or always-on sensor monitoring where output current may drop to 0 mA between wake cycles.

What output capacitor value and type are required for stable operation of LP5952LC-1.3?

The LP5952LC-1.3 requires a 2.2 µF ceramic output capacitor with ESR between 3 mΩ and 300 mΩ. X7R dielectric is recommended; X5R, Y5V, or Z5U may be used if minimum capacitance (including DC bias and temperature derating) remains ≥1.5 µF. Tantalum capacitors are discouraged due to surge-current failure risk.

Does LP5952LC-1.3 provide reverse current protection?

The LP5952LC-1.3 does not include active reverse current blocking. Its internal NFET pass device has a parasitic body diode that conducts up to 50 mA from OUT to VIN if the output is pulled above the input. For reverse currents exceeding 50 mA, an external Schottky diode (cathode on VIN, anode on OUT) is mandatory to prevent backfeed and potential damage.

What is the thermal shutdown behavior of LP5952LC-1.3 under continuous overload?

When junction temperature reaches 165°C (typical), LP5952LC-1.3 triggers thermal shutdown, turning off the NFET pass device. It remains latched off until temperature falls by ~20°C (to ~145°C), then automatically resumes regulation. This hysteresis prevents oscillation and provides pulsed output during sustained overload - a fail-safe mechanism protecting both LP5952LC-1.3 and downstream circuitry.

LP5952LC-1.3 Specifications

Product attributes
Attribute value
Manufacturer:
Texas Instruments
Series:
-
Package/Case:
6-UFDFN
Packaging:
Tape & Reel (TR)
Product Status:
Obsolete
Output Configuration:
Positive
Output Type:
Fixed
Number of Regulators:
1
Voltage - Input (Max):
4.5V
Voltage - Output (Min/Fixed):
1.3V
Voltage - Output (Max):
-
Voltage Dropout (Max):
0.25V @ 350mA
Current - Output:
350mA
Current - Quiescent (Iq):
28 µA
Current - Supply (Max):
100 µA
PSRR:
80dB ~ 64dB (10Hz ~ 100kHz)
Control Features:
Enable
Protection Features:
Over Current, Over Temperature, Short Circuit, Under Voltage Lockout (UVLO)
Operating Temperature:
-40°C ~ 85°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
6-USON (2x2)

LP5952LC-1.3 FAQ

1.How can I place an order for LP5952LC-1.3 through Aetrix?

Please submit a Request for Quotation (RFQ) for LP5952LC-1.3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LP5952LC-1.3 reliable?

The price and inventory of LP5952LC-1.3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP5952LC-1.3 is usually 5 days.

3.What payment methods are accepted for LP5952LC-1.3?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP5952LC-1.3 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LP5952LC-1.3?

LP5952LC-1.3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LP5952LC-1.3 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LP5952LC-1.3?

For technical support, including LP5952LC-1.3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP5952LC-1.3 requirements.

6.How does Aetrix verify that LP5952LC-1.3 is sourced from the original manufacturer or authorized distributors?

All LP5952LC-1.3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP5952LC-1.3 meets industry standards.

7.What is the process for return or replacement of LP5952LC-1.3?

All LP5952LC-1.3 units undergo pre-shipment inspection (PSI). If there is an issue with LP5952LC-1.3, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LP5952LC-1.3 part is unused and in its original packaging.

Return procedure for LP5952LC-1.3:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

LP5952LC-1.3 Tags

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