Texas Instruments LP5952LC-1.8/NOPB
- Part No.:
- LP5952LC-1.8/NOPB
- Manufacturer:
- Texas Instruments
- Package:
- 6-UFDFN
- Datasheet:
-
LP5952LC-1.8/NOPB.pdf
- Description:
- IC REG LINEAR 1.8V 350MA 6USON
- Quantity:
- Payment:

- Shipping:

Inventory:1,178
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Product details
Overview
LP5952LC-1.8/NOPB from Texas Instruments is a dual-rail linear regulator designed for ultralow-voltage circuits powered by a single Li-Ion cell or 3-cell NiMH/NiCd battery. It delivers a fixed 1.8 V output at up to 350 mA, with input rails VBATT (2.5–5.5 V) and VIN (0.7–4.5 V), dropout voltage as low as 88 mV (DSBGA), and 100 µVRMS output noise - used in mobile phone baseband power domains.
For engineers reviewing the LP5952LC-1.8/NOPB datasheet, LP5952LC-1.8/NOPB pinout, LP5952LC-1.8/NOPB application, or LP5952LC-1.8/NOPB equivalent, key selection criteria include dual-supply rail operation, sub-100 mV dropout at full load, shutdown quiescent current ≤0.1 µA, PSRR >90 dB at 100 Hz on VIN, and thermal shutdown at 165°C with 20°C hysteresis.
Technical Context
The LP5952LC-1.8/NOPB implements a dual-bias architecture: VBATT powers internal circuitry (bias rail), while VIN supplies the NFET pass device for regulation. VIN must never exceed VBATT - sequencing is inherently safe in post-regulation topologies where VIN derives from a DC-DC converter fed by the same battery.
It integrates thermal-overload protection (trip at 165°C, reset at 145°C), short-circuit current limiting, undervoltage lockout, and reverse-current blocking via controlled body-diode conduction (≤50 mA). Start-up time is 70–150 µs, and load transient response holds ±15 mV deviation under 0–300 mA pulsed load (300 mA/µs).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.8 V ±2% over –40°C to +125°C junction temperature |
| Max Output Current | 350 mA continuous; short-circuit current limited to 350–500 mA |
| VIN Range | 0.7 V to 4.5 V - enables direct connection to low-voltage DC-DC converter outputs |
| VBATT Range | 2.5 V to 5.5 V - supports single Li-Ion (2.7–4.2 V) and 3-cell NiMH/NiCd (3.6–4.5 V) |
| Dropout Voltage | 88 mV typical at 350 mA (DSBGA); defined at 100 mV below nominal output |
| Quiescent Current | 50 µA typical from VBATT, 10 µA typical from VIN, 0.1 µA in shutdown |
| PSRR (VIN) | 95 dB at 1 kHz - suppresses switching noise from upstream DC-DC converters |
| Noise (10 Hz–100 kHz) | 100 µVRMS - suitable for noise-sensitive analog/RF supply domains |
Pinout & Package
LP5952LC-1.8/NOPB is available in a 5-pin DSBGA (YZR) package, 1.326 mm × 0.96 mm, 0.4-mm pitch. The NC pin (Pin 5) has no internal connection and must remain unconnected.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BATT (Pin 1) | Bias supply input | Powers internal reference, control logic, and protection circuitry; must be ≥ VIN and within 2.5–5.5 V |
| GND (Pin 2) | Analog/digital ground | Common return for all rails; requires low-impedance connection to PCB ground plane |
| IN (Pin 3) | Power input to pass device | Drives NFET pass transistor; regulated output derived from this rail; max 4.5 V, must be ≤ BATT |
| OUT (Pin 4) | Regulated output | Delivers stable 1.8 V to load; requires 2.2 µF ceramic output capacitor (X7R, ≤300 mΩ ESR) |
| EN (Pin 6) | Enable logic input | Active-high control: VIH ≥1 V enables regulation; VIL ≤0.4 V forces shutdown (0.1 µA IQ) |
Key Features
| Feature | Design Value |
|---|---|
| Dual-rail bias architecture | Separates high-efficiency power path (VIN→OUT) from low-noise bias domain (VBATT), enabling stable regulation even when VIN drops near VOUT |
| Ultra-low dropout | 88 mV typical at 350 mA ensures usable headroom down to 1.888 V on VIN - critical for battery-powered systems nearing end-of-discharge |
| Sub-µA shutdown | 0.1 µA typical total current draw from VBATT in shutdown extends battery life in standby modes of portable instruments |
| Fast transient response | ±15 mV load transient deviation (0–300 mA step) minimizes need for large bulk capacitance in space-constrained handheld radios |
| Integrated thermal protection | Auto-cycling shutdown at 165°C with 20°C hysteresis prevents permanent damage during sustained overload or poor PCB thermal design |
Applications
| Mobile Baseband Power | Low-Power Sensor Node Core |
|---|---|
Use Scenario: Powers ARM Cortex-M core and SRAM in battery-operated IoT sensor node with intermittent wake-up cycles. IC Role / Device Role / Timing Role: Primary 1.8 V LDO supplying digital logic and memory; enabled only during active sensing bursts. Use Value: 0.1 µA shutdown current preserves multi-year battery life; 100 µVRMS noise avoids ADC quantization errors. | Use Scenario: Supplies 1.8 V to RF transceiver IC in Bluetooth LE wearable, co-located with switching DC-DC converter. IC Role / Device Role / Timing Role: Post-regulator filtering high-frequency ripple from upstream buck converter. Use Value: 95 dB PSRR at 1 kHz attenuates switching artifacts; 70–150 µs start-up enables rapid channel-hopping response. |
| Portable Medical Monitor ASIC | Handheld Radio Front-End Bias |
Use Scenario: Provides clean 1.8 V to mixed-signal ASIC in portable ECG monitor running from single Li-Ion cell. IC Role / Device Role / Timing Role: Low-noise analog supply rail for precision ADC and signal chain amplifiers. Use Value: 100 µVRMS noise floor maintains ENOB; no-load stability prevents brownout during standby between measurements. | Use Scenario: Delivers 1.8 V to low-noise amplifier (LNA) and mixer stages in PMR handheld radio. IC Role / Device Role / Timing Role: Local point-of-load regulator decoupling RF section from noisy main system rail. Use Value: ±15 mV load transient response prevents gain compression during TX burst; DSBGA footprint saves board area in compact front-end module. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-rail LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPL7407LPGP | Single-rail input (2.7–6 V), no VBATT pin; 250 mA max; 120 mV dropout at 250 mA | Lacks dual-rail architecture - cannot replace LP5952LC-1.8/NOPB in post-regulation topologies requiring independent VIN/VBATT | Select only if system uses single-input supply and load current ≤250 mA |
| TPS7A2018PDQNR | Single-input LDO (1.6–6 V), 300 mA, 130 mV dropout, 6.5 µVRMS noise - lower noise but higher dropout and no bias-rail isolation | No VBATT rail; unsuitable for applications needing ultra-low VIN or independent bias control | Preferable only for ultra-low-noise analog rails where VIN ≥2.5 V and dual-rail sequencing is unnecessary |
Compared with TPL7407LPGP and TPS7A2018PDQNR, LP5952LC-1.8/NOPB uniquely supports true dual-rail operation with sub-100 mV dropout at 350 mA and integrated bias-domain isolation - essential for battery-fed post-regulation architectures where VIN originates from a low-voltage DC-DC stage.
Availability
LP5952LC-1.8/NOPB is available at Aetrix Electronics and suitable for mobile phones, handheld radios, portable medical monitors, and battery-powered instrumentation requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LP5952LC-1.8/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions, with leadership in power management ICs and precision analog components.
The LP5952 product line targets ultralow-voltage, dual-rail power regulation in space-constrained portable electronics - specifically engineered to extend battery runtime while maintaining signal integrity in RF, sensor, and mixed-signal subsystems.
FAQ
What is the minimum required input voltage on the VIN pin for LP5952LC-1.8/NOPB to regulate at full 350 mA load?
The LP5952LC-1.8/NOPB requires VIN ≥ VOUT(NOM) + dropout voltage. For 1.8 V output and 350 mA load, typical dropout is 88 mV (DSBGA), so minimum VIN is 1.888 V. Per datasheet Section 6.5, VIN must be ≥0.7 V, but regulation at full load demands ≥1.888 V with proper thermal design.
Can LP5952LC-1.8/NOPB operate with VIN greater than VBATT?
No. The LP5952LC-1.8/NOPB explicitly requires VIN ≤ VBATT at all times per datasheet Section 7.3.1 and Absolute Maximum Ratings. Exceeding this violates the dual-rail architecture and may cause malfunction or damage. In typical use, VIN is sourced from a DC-DC converter powered by the same VBATT battery, ensuring natural sequencing.
What is the recommended output capacitor for LP5952LC-1.8/NOPB and why is ESR important?
TI recommends a 2.2 µF X7R ceramic capacitor with ESR between 3 mΩ and 300 mΩ for LP5952LC-1.8/NOPB. This range ensures loop stability and optimal transient response. Lower ESR improves load-step recovery but risks oscillation; higher ESR degrades PSRR and increases output ripple - both extremes compromise regulation accuracy per Section 6.11.
Does LP5952LC-1.8/NOPB require an input capacitor on the VIN pin in all applications?
No. An input capacitor on VIN is required only when LP5952LC-1.8/NOPB is used as a stand-alone regulator. In typical post-regulation applications - where VIN is supplied by a nearby DC-DC converter - the DC-DC's output capacitor suffices if distance ≤5 cm and a solid ground plane exists. Section 8.2.1.2.2 confirms no external VIN capacitor is needed in that topology.
How does the EN pin behavior affect system power sequencing for LP5952LC-1.8/NOPB?
The EN pin of LP5952LC-1.8/NOPB is active-high with VIH ≥1 V and VIL ≤0.4 V. When unused, it must be tied to VBATT to ensure always-on operation. Its 0.01–1 µA input current allows direct MCU GPIO control without additional level-shifting, and 70–150 µs start-up time supports fast wake-up sequences in portable devices using LP5952LC-1.8/NOPB.
LP5952LC-1.8/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-UFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 4.5V
- Voltage - Output (Min/Fixed):
- 1.8V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.25V @ 350mA
- Current - Output:
- 350mA
- Current - Quiescent (Iq):
- 28 µA
- Current - Supply (Max):
- 100 µA
- PSRR:
- 80dB ~ 64dB (10Hz ~ 100kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Short Circuit, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-USON (2x2)
LP5952LC-1.8/NOPB FAQ
1.How can I place an order for LP5952LC-1.8/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LP5952LC-1.8/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LP5952LC-1.8/NOPB reliable?
The price and inventory of LP5952LC-1.8/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP5952LC-1.8/NOPB is usually 5 days.
3.What payment methods are accepted for LP5952LC-1.8/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP5952LC-1.8/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LP5952LC-1.8/NOPB?
LP5952LC-1.8/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LP5952LC-1.8/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LP5952LC-1.8/NOPB?
For technical support, including LP5952LC-1.8/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP5952LC-1.8/NOPB requirements.
6.How does Aetrix verify that LP5952LC-1.8/NOPB is sourced from the original manufacturer or authorized distributors?
All LP5952LC-1.8/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP5952LC-1.8/NOPB meets industry standards.
7.What is the process for return or replacement of LP5952LC-1.8/NOPB?
All LP5952LC-1.8/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LP5952LC-1.8/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LP5952LC-1.8/NOPB part is unused and in its original packaging.
Return procedure for LP5952LC-1.8/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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