Texas Instruments LP5952LCX-1.2/NOPB
- Part No.:
- LP5952LCX-1.2/NOPB
- Manufacturer:
- Texas Instruments
- Package:
- 6-UFDFN
- Datasheet:
-
LP5952LCX-1.2/NOPB.pdf
- Description:
- IC REG LINEAR 1.2V 350MA 6USON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LP5952LCX-1.2/NOPB from Texas Instruments is a dual-rail linear regulator designed for ultralow-voltage circuits powered by single Li-Ion or 3-cell NiMH/NiCd batteries. It delivers a fixed 1.2 V output at up to 350 mA, features dual supply rails (VBATT: 2.5–5.5 V; VIN: 0.7–4.5 V), and achieves 100 µVRMS output noise with ±15 mV load transient response.
For engineers reviewing the LP5952LCX-1.2/NOPB datasheet, LP5952LCX-1.2/NOPB pinout, LP5952LCX-1.2/NOPB application, or LP5952LCX-1.2/NOPB equivalent, key selection considerations include dual-supply sequencing constraints (VIN ≤ VBATT), 0.1 µA shutdown current, thermal shutdown at 165°C, 50 µA typical quiescent current from VBATT, and USON-6 package compatibility with space-constrained portable designs.
Technical Context
The LP5952LCX-1.2/NOPB implements a dual-rail architecture where VBATT powers internal bias circuitry (2.5–5.5 V) and VIN supplies the NFET pass device (0.7–4.5 V), requiring VIN ≤ VBATT at all times. Its internal thermal-overload protection triggers at 165°C (typical) with 20°C hysteresis, and short-circuit protection limits peak output current to 500 mA.
It supports fast startup (70–150 µs), maintains regulation with zero load, and provides reverse-current path management via the NFET's parasitic body diode-limited to 50 mA forward conduction from OUT to IN unless externally clamped with a Schottky diode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.2 V; tightly regulated across –40°C to +125°C junction temperature range. |
| Max Output Current | 350 mA continuous; short-circuit current limited to 500 mA (typical). |
| Input Voltage Ranges | VBATT: 2.5–5.5 V; VIN: 0.7–4.5 V; VIN must never exceed VBATT. |
| Quiescent Current | 50 µA (typ) from VBATT; 10 µA (typ) from VIN; 0.1 µA (typ) in shutdown. |
| Noise Performance | 100 µVRMS (10 Hz–100 kHz); enables clean power for RF, ADC, and low-noise analog circuits. |
| Transient Response | ±15 mV load step (0–300 mA); ±1 mV line step on VIN; ±15 mV line step on VBATT. |
| Dropout Voltage | VDOVIN: 128–250 mV (USON-6, 350 mA); VDOVBATT: 0.97–1.3 V (USON-6, 150 mA). |
| PSRR | 95 dB at 1 kHz on VIN; 65 dB at 100 Hz on VBATT; critical for rejecting switching noise from upstream DC-DC stages. |
Pinout & Package
LP5952LCX-1.2/NOPB is packaged in a 6-pin USON (NKH) package measuring 2.00 mm × 2.00 mm, optimized for ultra-compact portable applications. The package features wettable flanks and is RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BATT (Pin 1) | Bias supply input | Supplies internal reference and control circuitry; must be ≥2.5 V and ≥VIN; not connected to pass FET. |
| GND (Pin 2) | Ground reference | Common return for both VBATT and VIN paths; requires low-impedance connection to system ground plane. |
| IN (Pin 3) | Power input to pass device | Drives the NFET pass transistor; voltage must be ≤VBATT; source of regulated output current. |
| NC (Pin 5) | No internal connection | Unbonded pad; must remain unconnected and unpopulated on PCB. |
| OUT (Pin 4) | Regulated output | Delivers stable 1.2 V to load; requires 2.2 µF ceramic output capacitor (X7R, ≤300 mΩ ESR). |
| EN (Pin 6) | Enable logic input | Active-high control: VIH ≥1 V enables regulation; VIL ≤0.4 V forces shutdown (0.1 µA IQ). |
Key Features
| Feature | Design Value |
|---|---|
| Dual-rail supply architecture | Separates bias (VBATT) and power (VIN) paths to enable operation from sub-1-V DC-DC outputs while maintaining robust internal functionality. |
| No-load stability | Maintains regulation with zero output current-essential for CMOS RAM keep-alive and standby power domains. |
| Fast startup time | 70–150 µs EN-to-95% VOUT rise enables rapid wake-up in battery-powered systems without excessive inrush (>120 mA typical). |
| Thermal shutdown with hysteresis | Shuts down at 165°C (typ), re-enables at 145°C (typ); prevents latch-up during sustained overload and allows self-recovery. |
| Reverse current management | Allows safe 50 mA reverse conduction from OUT to IN via parasitic body diode; eliminates need for external blocking diode in many use cases. |
Applications
| Mobile Phone Baseband | Hand-Held Radio RF Front-End |
|---|---|
Use Scenario: Powers baseband processor core voltage domain in slim smartphone designs using single Li-Ion cell (2.8–4.2 V). IC Role / Device Role / Timing Role: Dual-rail LDO providing clean 1.2 V supply to ARM Cortex-A series CPU cores while rejecting ripple from buck converter feeding VIN. Use Value: 95 dB PSRR at 1 kHz on VIN suppresses switching noise from upstream DC-DC, preventing digital noise coupling into sensitive analog/RF sections. | Use Scenario: Supplies 1.2 V to low-noise amplifier (LNA) and mixer stages in UHF handheld transceivers operating from 3-cell NiMH. IC Role / Device Role / Timing Role: Ultra-low-noise LDO delivering stable bias to RF ICs; VBATT tied directly to battery, VIN sourced from intermediate 1.8 V buck stage. Use Value: 100 µVRMS integrated noise ensures minimal phase noise degradation in receiver chain, preserving adjacent-channel selectivity. |
| PDA Application Processor | Portable Medical Sensor Node |
Use Scenario: Regulates 1.2 V for application processor I/O and memory interface in palm-top PC with tight thermal envelope. IC Role / Device Role / Timing Role: Dual-input LDO enabling independent sequencing: VBATT ramps first from battery, then VIN rises from DC-DC, ensuring no reverse bias on pass device. Use Value: 0.1 µA shutdown current extends shelf life in always-off storage mode; thermal hysteresis prevents oscillation during sustained high-power bursts. | Use Scenario: Powers ultra-low-power biosensor ASIC (e.g., ECG front-end) in disposable wearable patch with 3-year battery life target. IC Role / Device Role / Timing Role: Primary power regulator for mixed-signal SoC; operates in no-load regulation during sleep cycles; enabled only during measurement windows. Use Value: 50 µA typical VBATT quiescent current minimizes drain on coin-cell or thin-film battery; 125°C max junction rating supports sealed enclosure thermal profiles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-rail LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPL7407LPGEDR | Single-rail 7-channel driver; no VBATT/VIN separation; 500 mA per channel; higher IQ (250 µA). | Designed for GPIO/peripheral driving-not for precision low-noise core voltage regulation. | Select only if discrete load-switching is needed instead of regulated voltage generation. |
| TPS7A2025PDQNR | Single-input LDO; 2.5 V fixed output; 300 mA; 6.5 µA IQ; no VBATT rail; smaller 1.0 mm × 1.0 mm X2SON. | Lacks dual-rail architecture-cannot accept sub-2.5 V VIN inputs or separate bias supply. | Choose when system uses only one supply rail and 2.5 V output suffices; not suitable for <2.5 V post-regulation. |
Compared with TPL7407LPGEDR and TPS7A2025PDQNR, LP5952LCX-1.2/NOPB uniquely supports true dual-rail operation with independent VBATT and VIN inputs, enabling reliable regulation from ultralow VIN (0.7 V) while maintaining low noise and thermal resilience-critical for next-generation portable SoCs.
Availability
LP5952LCX-1.2/NOPB is available at Aetrix Electronics and suitable for mobile phones, hand-held radios, and portable medical devices requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for LP5952LCX-1.2/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, designing and manufacturing analog ICs, embedded processors, and wireless connectivity solutions for industrial, automotive, and consumer markets.
The LP5952 product line targets ultralow-voltage portable electronics, specifically addressing the need for dual-rail LDOs that operate from partially discharged batteries and post-regulated DC-DC outputs while maintaining nanoscale quiescent current and low-noise performance.
FAQ
What is the absolute maximum voltage allowed on the IN pin of LP5952LCX-1.2/NOPB?
The absolute maximum voltage on the IN pin of LP5952LCX-1.2/NOPB is VBATT − 0.2 V, as specified in the Absolute Maximum Ratings table. VIN must never exceed VBATT under any condition-including power-up sequencing-to prevent damage. This constraint is fundamental to the dual-rail architecture and is enforced by internal design, not just recommended practice.
Can LP5952LCX-1.2/NOPB operate with zero load current?
Yes, LP5952LCX-1.2/NOPB remains stable and in regulation with zero load current. This no-load stability is explicitly confirmed in the Feature Description section and is essential for applications like CMOS RAM keep-alive circuits or low-power sleep modes where the output may be disconnected or draw negligible current for extended periods.
What is the recommended output capacitor for LP5952LCX-1.2/NOPB and why?
The recommended output capacitor for LP5952LCX-1.2/NOPB is 2.2 µF ceramic (X7R dielectric) with ESR between 3 mΩ and 300 mΩ. This value ensures stability across temperature and DC bias, meets transient response requirements (±15 mV), and aligns with TI's validated design procedure-deviations risk oscillation or degraded load regulation.
Does LP5952LCX-1.2/NOPB require an input capacitor at the VIN pin?
LP5952LCX-1.2/NOPB requires a 1 µF ceramic input capacitor at VIN only when used as a stand-alone regulator. In typical post-regulation applications-where VIN is fed from a nearby DC-DC converter-the DC-DC's output capacitor suffices, provided the distance between that capacitor and the LP5952LCX-1.2/NOPB IN pin is ≤5 cm and a solid ground plane exists.
How does the thermal shutdown behavior of LP5952LCX-1.2/NOPB affect system operation?
LP5952LCX-1.2/NOPB engages thermal shutdown at 165°C (typical) and re-enables at 145°C (typical), creating controlled pulsing during sustained overload. This hysteresis prevents thermal oscillation and allows partial cooling between cycles. For continuous operation, junction temperature must stay ≤125°C (recommended max) to avoid entering this protective mode.
LP5952LCX-1.2/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-UFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 4.5V
- Voltage - Output (Min/Fixed):
- 1.2V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.2V @ 350mA
- Current - Output:
- 350mA
- Current - Quiescent (Iq):
- 28 µA
- Current - Supply (Max):
- 100 µA
- PSRR:
- 80dB ~ 64dB (10Hz ~ 100kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Short Circuit, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-USON (2x2)
LP5952LCX-1.2/NOPB FAQ
1.How can I place an order for LP5952LCX-1.2/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LP5952LCX-1.2/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LP5952LCX-1.2/NOPB reliable?
The price and inventory of LP5952LCX-1.2/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP5952LCX-1.2/NOPB is usually 5 days.
3.What payment methods are accepted for LP5952LCX-1.2/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP5952LCX-1.2/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LP5952LCX-1.2/NOPB?
LP5952LCX-1.2/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LP5952LCX-1.2/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LP5952LCX-1.2/NOPB?
For technical support, including LP5952LCX-1.2/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP5952LCX-1.2/NOPB requirements.
6.How does Aetrix verify that LP5952LCX-1.2/NOPB is sourced from the original manufacturer or authorized distributors?
All LP5952LCX-1.2/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP5952LCX-1.2/NOPB meets industry standards.
7.What is the process for return or replacement of LP5952LCX-1.2/NOPB?
All LP5952LCX-1.2/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LP5952LCX-1.2/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LP5952LCX-1.2/NOPB part is unused and in its original packaging.
Return procedure for LP5952LCX-1.2/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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