Texas Instruments LP5952LCX-1.3/NOPB
- Part No.:
- LP5952LCX-1.3/NOPB
- Manufacturer:
- Texas Instruments
- Package:
- 6-UFDFN
- Datasheet:
-
LP5952LCX-1.3/NOPB.pdf
- Description:
- IC REG LINEAR 1.3V 350MA 6USON
- Quantity:
- Payment:

- Shipping:

Inventory:4,607
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LP5952LCX-1.3/NOPB from Texas Instruments is a dual-rail linear regulator designed for ultralow-voltage post-regulation in battery-powered systems, delivering a fixed 1.3 V output at up to 350 mA. It operates with two independent supply rails: VBATT (2.5–5.5 V) powers internal circuitry, while VIN (0.7–4.5 V) supplies the regulated output path. Its 100 µVRMS output noise, ±1 mV line transient response, and 0.1 µA shutdown current make it suitable for powering sensitive RF or core logic in mobile handsets.
For engineers reviewing the LP5952LCX-1.3/NOPB datasheet, LP5952LCX-1.3/NOPB pinout, LP5952LCX-1.3/NOPB application, or LP5952LCX-1.3/NOPB equivalent, key selection criteria include dual-rail biasing constraints (VIN ≤ VBATT), dropout voltage under 150 mV at 350 mA, thermal shutdown at 165°C, and compatibility with 2.2 µF ceramic output capacitance in space-constrained DSBGA packaging.
Technical Context
The LP5952LCX-1.3/NOPB implements a dual-supply architecture where VBATT powers control circuitry and VIN feeds the NFET pass device-ensuring VIN never exceeds VBATT. This enables stable operation directly from a single Li-Ion cell (2.5–4.2 V) or 3-cell NiMH/NiCd (3.6–4.5 V) while accepting pre-regulated DC-DC outputs as VIN.
Its internal thermal-overload protection triggers at 165°C (typical) with 20°C hysteresis, and short-circuit current limiting prevents destructive overcurrent. The device maintains regulation with zero load and achieves 70–150 µs startup time from EN assertion, supporting fast power sequencing in portable instrumentation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.3 V ±2% tolerance; ensures stable core voltage for low-power microcontrollers and RF ICs. |
| Max Output Current | 350 mA continuous; supports moderate-power digital loads without external boost stages. |
| Input Voltage Ranges | VBATT: 2.5–5.5 V; VIN: 0.7–4.5 V; enforces strict VIN ≤ VBATT constraint to prevent latch-up. |
| Dropout Voltage | ≤150 mV at 350 mA (VBATT path); enables high efficiency near battery end-of-life (e.g., 2.8 V → 1.3 V). |
| Quiescent Current | 50 µA from VBATT, 10 µA from VIN (typical); minimizes standby drain in always-on subsystems. |
| Shutdown Current | 0.1 µA (typical) from both VBATT and VIN; extends shelf life in battery-backed memory retention. |
| Output Noise | 100 µVRMS (10 Hz–100 kHz); meets noise-sensitive analog/RF supply requirements without added filtering. |
Pinout & Package
LP5952LCX-1.3/NOPB is packaged in a 5-pin DSBGA (YZR) with 1.326 mm × 0.96 mm body size and 0.5-mm pitch. The package is lead-free, RoHS-compliant, and optimized for ultra-thin portable PCBs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BATT | Bias supply input | Connects to battery or main rail (2.5–5.5 V); powers internal reference, error amplifier, and EN logic. |
| IN | Power input to pass device | Supplies NFET source; must be ≤ VBATT at all times; range 0.7–4.5 V. |
| GND | Analog/digital ground | Common return for all currents; requires low-impedance connection to system ground plane. |
| EN | Enable control input | Active-high logic; VIH ≥ 1 V, VIL ≤ 0.4 V; tie to VBATT if always-on operation is required. |
| OUT | Regulated output | Delivers fixed 1.3 V to load; requires 2.2 µF ceramic capacitor (3–300 mΩ ESR) for stability. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-rail supply architecture | Separates bias (VBATT) and power (VIN) paths to enable operation from partially discharged batteries while maintaining regulation. |
| No-load stability | Maintains regulation with 0 mA load-critical for CMOS RAM keep-alive and real-time clock backup circuits. |
| Fast startup time | 70–150 µs from EN assertion to 95% VOUT; supports rapid wake-from-sleep sequences in handheld devices. |
| Thermal shutdown with hysteresis | Triggers at 165°C (typical), releases at 145°C (typical); prevents thermal runaway during sustained overload. |
| Reverse current protection | Parasitic body diode limits reverse current to 50 mA; external Schottky required only if >50 mA reverse flow is possible. |
Applications
| Mobile Handset Core Power | Portable Instrumentation Sensor Bias |
|---|---|
Use Scenario: Powers ARM Cortex-M0+ MCU core and integrated ADC in a battery-operated handheld multimeter. IC Role / Device Role / Timing Role: Dual-rail LDO providing clean 1.3 V supply; VBATT sourced from 3.7 V Li-Ion, VIN sourced from 1.8 V buck converter output. Use Value: Enables full functionality down to 2.8 V battery voltage via <150 mV dropout, while 100 µVRMS noise preserves 12-bit ADC accuracy. |
Use Scenario: Supplies precision op-amp and temperature sensor in a pocket-sized environmental monitor. IC Role / Device Role / Timing Role: Low-noise, zero-load-stable regulator delivering 1.3 V to analog front-end; VBATT = 3.6 V NiMH pack, VIN = 1.5 V DC-DC output. Use Value: Eliminates need for additional filtering components; 50 µA quiescent current extends 2-week battery life in sleep mode. |
| RF Transceiver VDDIO | Wearable BLE SoC I/O Rail |
Use Scenario: Provides I/O supply to 2.4 GHz Bluetooth transceiver IC in a compact wireless earbud. IC Role / Device Role / Timing Role: Post-regulator after primary buck converter; VBATT = 3.8 V Li-Poly, VIN = 1.8 V intermediate rail. Use Value: ±1 mV line transient response prevents RF desense during burst transmission; DSBGA footprint saves 1.3 mm² vs USON. |
Use Scenario: Powers GPIO and peripheral interface of a coin-cell–powered BLE SoC in smart jewelry. IC Role / Device Role / Timing Role: Always-on LDO with EN tied to VBATT; VBATT = 3.0 V CR2032, VIN = 1.5 V boost output. Use Value: 0.1 µA shutdown current prevents measurable battery drain during 6-month storage; 2.2 µF output cap fits tight form factor. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-rail LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPL7407LPGEDR | Single-rail 7-channel driver; no VBATT/VIN separation; 300 mA per channel; higher 250 µA IQ. | Lacks dual-rail architecture; unsuitable for battery-direct biasing; better for LED/relay drive than precision analog supply. | Select only if discrete load switching-not regulation-is required; not a functional substitute for LP5952LCX-1.3/NOPB. |
| TPS7A1633DRBR | Single-input LDO; 3.3 V fixed output; 150 mA max; 17 µA IQ; no thermal hysteresis spec. | Cannot accept sub-2.5 V inputs; incompatible with Li-Ion direct connection; lacks no-load stability guarantee. | Use only for higher-voltage, lower-current applications where dual-rail operation is unnecessary. |
Compared with TPL7407LPGEDR and TPS7A1633DRBR, LP5952LCX-1.3/NOPB uniquely supports true dual-rail biasing from a single battery, delivers 350 mA at ultralow noise and dropout, and guarantees regulation at zero load-making it irreplaceable for space-constrained, battery-critical ultralow-voltage systems.
Availability
LP5952LCX-1.3/NOPB is available at Aetrix Electronics and suitable for mobile handsets, portable instrumentation, RF transceivers, wearable BLE devices, and battery-powered medical sensors requiring stable component supply across extended temperature ranges (–40°C to +125°C).
Supply support for LP5952LCX-1.3/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, designing and manufacturing analog and embedded processing chips for industrial, automotive, and personal electronics markets.
LP5952LCX-1.3/NOPB belongs to TI's LP59xx family of dual-rail LDOs, engineered specifically for ultralow-voltage post-regulation in portable battery-powered equipment where space, efficiency, and noise performance are critical.
FAQ
What is the absolute maximum VBATT voltage rating for LP5952LCX-1.3/NOPB?
The absolute maximum VBATT voltage for LP5952LCX-1.3/NOPB is 5.5 V. Exceeding this value-even momentarily-may cause permanent damage. The recommended operating range is 2.5 V to 5.5 V, and VBATT must always remain ≥ VIN to avoid violating the device's internal biasing constraints. This limit is defined in Section 6.1 of the SNVS469F datasheet.
Can LP5952LCX-1.3/NOPB operate with VIN greater than VBATT?
No, LP5952LCX-1.3/NOPB cannot operate with VIN greater than VBATT. The datasheet explicitly states "VIN ≤ VBATT" as a hard design constraint across all operating conditions. Violating this causes improper biasing of internal circuitry and may result in loss of regulation or device failure. In typical use, VBATT connects to the battery and VIN connects to a DC-DC converter output that ramps up more slowly.
What output capacitor is required for stable operation of LP5952LCX-1.3/NOPB?
LP5952LCX-1.3/NOPB requires a 2.2 µF ceramic output capacitor with ESR between 3 mΩ and 300 mΩ for guaranteed stability. X7R dielectric is recommended; X5R, Y5V, or Z5U may be used if minimum capacitance (including DC bias and temperature effects) remains ≥1.5 µF. No input capacitor is needed when used as a post-regulator after a nearby DC-DC stage.
Does LP5952LCX-1.3/NOPB support zero-load operation without losing regulation?
Yes, LP5952LCX-1.3/NOPB is explicitly characterized for no-load stability and maintains regulation with 0 mA output current. This capability is confirmed in Section 7.3.2 ("No-Load Stability") of the datasheet and is essential for applications like CMOS RAM keep-alive, RTC backup, or always-on sensor biasing where load current may drop to zero for extended periods.
What is the thermal shutdown behavior of LP5952LCX-1.3/NOPB under continuous overload?
LP5952LCX-1.3/NOPB engages thermal shutdown at 165°C (typical) and releases at 145°C (typical), providing 20°C hysteresis. Under continuous overload, this results in pulsed output voltage as the NFET alternately turns off (to cool) and on (to regulate). The device is not rated for continuous operation above 125°C junction temperature, and layout must ensure adequate thermal dissipation per RθJA = 181.0°C/W (DSBGA).
LP5952LCX-1.3/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-UFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 4.5V
- Voltage - Output (Min/Fixed):
- 1.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.2V @ 350mA
- Current - Output:
- 350mA
- Current - Quiescent (Iq):
- 28 µA
- Current - Supply (Max):
- 100 µA
- PSRR:
- 80dB ~ 64dB (10Hz ~ 100kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Short Circuit, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-USON (2x2)
LP5952LCX-1.3/NOPB FAQ
1.How can I place an order for LP5952LCX-1.3/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LP5952LCX-1.3/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LP5952LCX-1.3/NOPB reliable?
The price and inventory of LP5952LCX-1.3/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP5952LCX-1.3/NOPB is usually 5 days.
3.What payment methods are accepted for LP5952LCX-1.3/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP5952LCX-1.3/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LP5952LCX-1.3/NOPB?
LP5952LCX-1.3/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LP5952LCX-1.3/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LP5952LCX-1.3/NOPB?
For technical support, including LP5952LCX-1.3/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP5952LCX-1.3/NOPB requirements.
6.How does Aetrix verify that LP5952LCX-1.3/NOPB is sourced from the original manufacturer or authorized distributors?
All LP5952LCX-1.3/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP5952LCX-1.3/NOPB meets industry standards.
7.What is the process for return or replacement of LP5952LCX-1.3/NOPB?
All LP5952LCX-1.3/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LP5952LCX-1.3/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LP5952LCX-1.3/NOPB part is unused and in its original packaging.
Return procedure for LP5952LCX-1.3/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LP5952LCX-1.3/NOPB Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

