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Texas Instruments LP8720TLX-B/NOPB
- Part No.:
- LP8720TLX-B/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 20-WFBGA, DSBGA
- Datasheet:
-
LP8720TLX-B/NOPB.pdf
- Description:
- IC REG 6OUT BUCK/LNR SYNC 20USMD
- Quantity:
- Payment:
- Shipping:
Inventory:1,387
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Product details
Overview
LP8720TLX-B/NOPB from Texas Instruments is a programmable power management IC integrating one 400 mA synchronous buck converter and five low-noise LDO regulators (LDO1–LDO5), all controlled via I²C interface. It delivers 1.2 V @ 400 mA from the buck stage and supports configurable output voltages (e.g., LDO1: 1.2–3.3 V, LDO2: 0.8–2.3 V) with ≤2% output accuracy and 200 mV typical dropout at 300 mA - optimized for cellular handset baseband and application processor power domains.
For engineers reviewing the LP8720TLX-B/NOPB datasheet, LP8720TLX-B/NOPB pinout, LP8720TLX-B/NOPB application, or LP8720TLX-B/NOPB equivalent, this page provides verified technical context on dynamic voltage scaling (DVS), programmable startup sequencing, thermal shutdown early warning (125°C), and 2.0 MHz internal oscillator timing - critical for portable handheld product power architecture validation.
Technical Context
The LP8720TLX-B/NOPB implements auto-mode PFM/PWM switching in its buck regulator, enabling high efficiency (88% at 5 mA, 90% at 200 mA) across load ranges while maintaining 1.2 V ±1.5% regulation in PFM mode. Its 2.2 µH inductor and 10 µF output capacitor support compact layout at 2 MHz switching frequency.
Five LDOs feature independent enable control, programmable startup delays (0–6 × 25 µs steps), and configurable default voltages per DEFSEL pin state (VBATT/GND/Hi-Z). The I²C interface (7-bit slave address selectable via IDSEL) enables real-time DVS, sleep mode entry, and interrupt monitoring (IRQ_N) for thermal events (TSD_EW = 125°C, TSD = 160°C).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck Output | 1.2 V @ 400 mA (PWM mode); programmable to 0.8–2.3 V via register or external resistor divider) |
| LDO Output Range | LDO1–LDO4: 0.8–3.3 V; LDO5: 1.35–3.3 V; all adjustable in 50–100 mV steps via I²C registers |
| Output Accuracy | ±2% (typ) for LDOs; ±1.5% (typ) for buck in PFM mode relative to PWM regulation |
| Dropout Voltage | 200 mV (typ) at 300 mA load for LDOs; enables stable operation with low VIN headroom |
| Thermal Protection | Early-warning interrupt at 125°C (TSD_EW); hard shutdown at 160°C (TSD); hysteresis = 10°C |
| I²C Interface | 400 kHz compatible; slave address set by IDSEL (7h'7C/7h'7D/7h'7F); open-drain SDA/SCL with 1.5 kΩ pull-ups |
| Quiescent Current | 0.7 µA (standby); 100–270 µA (sleep mode, dependent on enabled rails) |
Pinout & Package
LP8720TLX-B/NOPB uses a 20-bump, 2.5 mm × 2.0 mm DSBGA package (YZR002011A) with 0.4 mm pitch and bottom-side thermal pad. Pin assignment is fixed and validated per TI SNVS575B datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A4 | VBATT | Main battery input for LDO1 and internal circuitry; accepts 2.7–4.5 V |
| E4 | VINB | Dedicated battery input for buck regulator; decoupled with 10 µF capacitor |
| A2 | VIN1 | Input for LDO2 and LDO3; requires 2.5 V to VBATT |
| D1 | VIN2 | Input for LDO4 and LDO5; requires 2.5 V to VBATT |
| B4 | LDO1 | Analog output (300 mA max); default 3.0 V when DEFSEL = VBATT |
| A3 | LDO2 | Analog output (300 mA max); programmable 0.8–2.3 V; 200 mV dropout |
| A1 | LDO3 | Analog output (300 mA max); default 1.8 V; used for core logic or memory I/O |
| C1 | LDO4 | Analog output (300 mA max); default 1.0 V; supports low-voltage digital rails |
| E1 | LDO5 | Analog output (300 mA max); default OFF; configurable up to 3.3 V |
| E3 | SW | Buck switch node; connects to 2.2 µH inductor and 10 µF output capacitor |
| D2 | FB | Buck feedback input; sets output via external resistor divider (VFB = 0.5 V) |
| D4 | GNDB | Power ground for buck stage; separate from main GND to reduce noise coupling |
| B1 | GND | Main IC ground reference; connects to system PCB ground plane |
| C4 | SDA | I²C data line (open-drain); requires external 1.5 kΩ pull-up to VBATT |
| C3 | SCL | I²C clock input; requires external 1.5 kΩ pull-up to VBATT |
| B3 | IRQ_N | Active-low interrupt output (open-drain); signals thermal warning/shutdown events |
| E2 | EN | Enable input (active-high); internal 500 kΩ pull-down; rising edge triggers startup |
| B2 | DEFSEL | Startup configuration select; hardwired to VBATT/GND/Hi-Z to define default voltages and sequence |
| C2 | IDSEL | I²C slave address select; sets address to 7h'7C/7h'7D/7h'7F |
| D3 | DVS | Dynamic voltage scale control; selects between two buck voltage sets (BUCK_V1/BUCK_V2) |
Key Features
| Feature | Design Value |
|---|---|
| Programmable Power-On Sequencing | Configurable startup order and delay (0–6 × 25 µs steps) per rail via I²C registers - ensures safe boot of multi-rail SoCs |
| Dynamic Voltage Scaling (DVS) | Hardware- or software-controlled dual-buck voltage sets (e.g., 1.2 V / 1.3 V) to match processor performance states |
| Low-Noise LDO Architecture | High PSRR (>60 dB at 1 kHz) and <10 µVRMS output noise - suitable for RF and analog sensor supplies |
| Thermal Early Warning System | Dedicated 125°C interrupt (TSD_EW) enables firmware throttling before hard shutdown at 160°C |
| Ultra-Low Standby Consumption | 0.7 µA quiescent current in STANDBY mode preserves battery life during system idle |
| Flexible I²C Control | Full register access (0x00–0x0C) for real-time rail enable/disable, voltage update, sleep entry, and status readback |
Applications
| Cellular Baseband Power | Application Processor Core Supply |
|---|---|
|
Use Scenario: Powering GSM/UMTS baseband ICs requiring multiple clean, sequenced rails (e.g., 1.8 V for RF, 2.8 V for analog front-end, 3.0 V for I/O). IC Role / Device Role / Timing Role: LP8720TLX-B/NOPB delivers five independently controllable LDO outputs with synchronized startup and I²C-configurable voltage levels. Use Value: Eliminates discrete LDOs and sequencing logic; reduces BOM count by ≥4 components while meeting ETSI radiated emission limits. |
Use Scenario: Supplying ARM-based application processors (e.g., OMAP, MSM) with dynamic core voltage scaling during DVFS transitions. IC Role / Device Role / Timing Role: LP8720TLX-B/NOPB's buck regulator provides the main core voltage (1.2 V @ 400 mA), while DVS pin toggles between 1.2 V and 1.3 V under OS control. Use Value: Enables sub-100 µs voltage transitions without external intervention, supporting Linux CPUfreq governors and reducing active power by up to 22%. |
| Portable Media Player Audio Subsystem | Smartphone Camera Module Power |
|
Use Scenario: Delivering ultra-low-noise bias to audio codecs, DACs, and headphone amplifiers in battery-powered media players. IC Role / Device Role / Timing Role: LP8720TLX-B/NOPB's LDO3 (1.8 V) and LDO4 (1.0 V) supply analog and digital sections with <10 µVRMS noise and 60+ dB PSRR. Use Value: Achieves >95 dB SNR in 24-bit audio playback without additional LC filtering or ferrite beads. |
Use Scenario: Powering CMOS image sensors and ISP cores requiring precise, low-ripple voltage (e.g., 2.8 V for analog, 1.2 V for digital core). IC Role / Device Role / Timing Role: LP8720TLX-B/NOPB sequences LDO2 (2.8 V) and buck (1.2 V) with 25 µs resolution to meet MIPI CSI-2 startup timing requirements. Use Value: Guarantees frame-sync power delivery within 150 µs of EN assertion, preventing sensor initialization failure during rapid camera launch. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023RSBR | Three buck + six LDOs; 2.25 MHz switching; no DVS pin; I²C address fixed at 0x2D | Higher integration but lacks hardware DVS control; requires full software control for voltage transitions | Choose for designs needing >1 buck rail or where I²C address conflict must be avoided |
| LP87322ARHPT | Two buck + four LDOs; 2.4 MHz switching; integrated watchdog timer; SPI interface only | No I²C support; requires SPI host; includes reset supervision not present in LP8720TLX-B/NOPB | Choose when system-level reset coordination is required and SPI is preferred over I²C |
Compared with TPS65023RSBR and LP87322ARHPT, the LP8720TLX-B/NOPB uniquely combines hardware DVS control, 20-bump DSBGA footprint, and I²C-address flexibility - making it optimal for space-constrained cellular handsets requiring fast, deterministic voltage scaling without firmware overhead.
Availability
LP8720TLX-B/NOPB is available at Aetrix Electronics and suitable for cellular handsets, portable media players, and smartphone camera modules requiring stable component supply, long-term lifecycle support, and qualified automotive-grade alternatives.
Supply support for LP8720TLX-B/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of experience in power management IC design for mobile and portable electronics.
The LP8720TLX-B/NOPB belongs to TI's LP87xx family of highly integrated PMUs targeting sub-block power delivery in battery-powered handheld devices - designed specifically to replace discrete LDO/buck solutions while enabling advanced power-state coordination.
FAQ
What is the maximum output current capability of the buck regulator in LP8720TLX-B/NOPB?
The buck regulator in LP8720TLX-B/NOPB delivers up to 400 mA continuous output current in PWM mode. Peak switch current limit is 900 mA (min 500 mA), and efficiency reaches 90% at 200 mA load with 1.2 V output. Operation above 400 mA risks thermal shutdown unless board-level thermal design exceeds θJA = 45°C/W.
How does the DEFSEL pin affect default voltage settings in LP8720TLX-B/NOPB?
The DEFSEL pin on LP8720TLX-B/NOPB selects among three predefined startup configurations: DEFSEL = VBATT sets LDO1 to 3.0 V ON, LDO2 to 2.6 V ON; DEFSEL = GND disables LDO1/LDO2 by default; DEFSEL = Hi-Z configures LDO1 to 2.8 V ON and LDO2 to 2.6 V ON. These defaults are loaded at power-on-reset before I²C access.
Can LP8720TLX-B/NOPB operate without an external I²C controller?
Yes - LP8720TLX-B/NOPB supports autonomous operation using hardware pins: EN enables/disables all rails, DVS toggles between two buck voltages, and DEFSEL/IDSEL configure defaults and I²C address. However, full programmability (voltage fine-tuning, sequencing, sleep control) requires I²C host interaction.
What is the purpose of the GNDB pin on LP8720TLX-B/NOPB?
GNDB is the dedicated power ground for the buck regulator stage in LP8720TLX-B/NOPB. It must be routed separately from the main GND (B1) to minimize switching noise coupling into sensitive analog LDO outputs and I²C lines - critical for maintaining PSRR >60 dB and signal integrity in RF subsystems.
Does LP8720TLX-B/NOPB support thermal shutdown recovery without host intervention?
Yes - after thermal shutdown at 160°C, LP8720TLX-B/NOPB automatically restarts once junction temperature cools to ≤115°C, provided EN remains high. Register contents are preserved if APU_TSD = 1 (register 0x09), enabling seamless resumption; if APU_TSD = 0, registers reset to POR defaults before restart.
LP8720TLX-B/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-WFBGA, DSBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (5)
- Number of Outputs:
- 6
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- 0.8V ~ 2.3V, 400mA
- Voltage/Current - Output 2:
- 1.2V ~ 3.3V, 300mA
- Voltage/Current - Output 3:
- 1.2V ~ 3.3V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 4.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-DSBGA
LP8720TLX-B/NOPB FAQ
1.How can I place an order for LP8720TLX-B/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LP8720TLX-B/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LP8720TLX-B/NOPB reliable?
The price and inventory of LP8720TLX-B/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP8720TLX-B/NOPB is usually 5 days.
3.What payment methods are accepted for LP8720TLX-B/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP8720TLX-B/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LP8720TLX-B/NOPB?
LP8720TLX-B/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LP8720TLX-B/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LP8720TLX-B/NOPB?
For technical support, including LP8720TLX-B/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP8720TLX-B/NOPB requirements.
6.How does Aetrix verify that LP8720TLX-B/NOPB is sourced from the original manufacturer or authorized distributors?
All LP8720TLX-B/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP8720TLX-B/NOPB meets industry standards.
7.What is the process for return or replacement of LP8720TLX-B/NOPB?
All LP8720TLX-B/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LP8720TLX-B/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LP8720TLX-B/NOPB part is unused and in its original packaging.
Return procedure for LP8720TLX-B/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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