Texas Instruments LP8720TLX/NOPB
- Part No.:
- LP8720TLX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 20-WFBGA, DSBGA
- Datasheet:
-
LP8720TLX/NOPB.pdf
- Description:
- IC REG 6OUT BUCK/LNR SYNC 20USMD
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LP8720TLX/NOPB from Texas Instruments is a programmable power management IC integrating one 400 mA synchronous buck converter with dynamic voltage scaling (DVS) and five low-noise LDO regulators (LDO1–LDO5), all controlled via I²C-compatible interface. It delivers 0.8V–2.3V buck output and 0.8V–3.3V LDO outputs, each rated for up to 300 mA, and targets compact portable systems requiring precise sequencing and ultra-low quiescent current.
For engineers reviewing the LP8720TLX/NOPB datasheet, LP8720TLX/NOPB pinout, LP8720TLX/NOPB application, or LP8720TLX/NOPB equivalent, key selection considerations include its 20-bump 2.5 × 2.0 mm DSBGA package, programmable startup sequencing via DEFSEL, dual-buck voltage sets (BUCK_V1/BUCK_V2), thermal shutdown with early warning interrupt (IRQ_N), and support for both PFM/PWM auto-mode operation at 2 MHz switching frequency.
Technical Context
The LP8720TLX/NOPB implements a synchronous step-down DC-DC converter with internal 2 MHz oscillator, auto PFM/PWM mode selection, and external resistor feedback (VFB = 0.5 V). Its five LDOs feature high PSRR, 2% typical output voltage accuracy, and individually programmable enable timing (0–6 × 25 µs steps) via register-controlled startup sequencing.
Control logic includes I²C slave address selection (IDSEL), default configuration selection (DEFSEL), dynamic voltage scaling (DVS pin or register), sleep mode activation, and interrupt reporting for thermal events (TSD_EW at 125°C, TSD at 160°C). All registers are accessible over 400 kHz I²C interface with open-drain SDA/SCL and 10 kΩ pull-up recommended on IRQ_N.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck Output Current | 400 mA max - supports core voltage rail for ARM-based processors or DSPs with dynamic scaling. |
| LDO Output Current | 300 mA per LDO - sufficient for analog sensors, RF front-ends, or memory I/O supplies. |
| Output Voltage Range | Buck: 0.8V–2.3V (programmable); LDOs: 0.8V–3.3V - covers DDR I/O, core, and peripheral rails. |
| Quiescent Current | 0.7 µA in STANDBY - enables long battery life in always-on subsystems. |
| Thermal Protection | TSD at 160°C with 10°C hysteresis and early warning at 125°C - prevents damage during sustained high-load operation. |
| Switching Frequency | 2.0 MHz typ (1.9–2.1 MHz) - allows use of small 2.2 µH inductor and compact 10 µF output capacitor. |
| I²C Interface Speed | 400 kHz - compatible with standard microcontroller I²C peripherals without clock stretching. |
Pinout & Package
LP8720TLX/NOPB uses a 20-bump, 2.5 mm × 2.0 mm DSBGA package with 0.5 mm pitch and bottom-side ball layout. Thermal performance is optimized for PCB copper pour under GNDB and GND balls.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A4 VBATT | Battery input supply | Primary power source for LDO1 and internal bias circuitry; accepts 2.7–4.5 V. |
| E4 VINB | Buck input supply | Dedicated input for buck converter; decoupled with 10 µF ceramic capacitor. |
| A2 VIN1 | LDO2/LDO3 input | Shared input rail for two LDOs; requires 1 µF local decoupling. |
| D1 VIN2 | LDO4/LDO5 input | Shared input rail for two LDOs; requires 1 µF local decoupling. |
| B4 LDO1 | LDO1 output | Analog output pin; default 3.0 V when DEFSEL = VBATT; 300 mA capable. |
| A3 LDO2 | LDO2 output | Analog output pin; default 2.6 V when DEFSEL = VBATT; 300 mA capable. |
| A1 LDO3 | LDO3 output | Analog output pin; default 1.8 V when DEFSEL = VBATT; 300 mA capable. |
| C1 LDO4 | LDO4 output | Analog output pin; default 1.0 V when DEFSEL = VBATT; 300 mA capable. |
| E1 LDO5 | LDO5 output | Analog output pin; disabled by default; configurable up to 3.3 V. |
| E3 SW | Buck switch node | Connection to external 2.2 µH inductor; requires careful layout to minimize EMI. |
| D2 FB | Buck feedback input | Sense point for external resistor divider; regulated to 0.5 V reference. |
| D4 GNDB | Buck power ground | Separate ground return for buck circuitry to reduce noise coupling into analog LDOs. |
| B1 GND | IC ground | Main signal and bias ground; must be connected to system ground plane. |
| C4 SDA | I²C data I/O | Open-drain bidirectional line; requires external 1.5 kΩ pull-up to VBATT. |
| C3 SCL | I²C clock input | Input-only clock line; requires external 1.5 kΩ pull-up to VBATT. |
| B3 IRQ_N | Interrupt output | Open-drain active-low interrupt; signals thermal warning/shutdown; 10 kΩ pull-up required. |
| E2 EN | Enable input | Active-high enable; internal 500 kΩ pull-down; rising edge initiates startup sequence. |
| B2 DEFSEL | Default configuration select | Hard-wired to VBATT/GND/Hi-Z to select one of three pre-programmed startup sequences and voltages. |
| C2 IDSEL | I²C slave address select | Hard-wired to VBATT/GND/Hi-Z to set I²C address to 0x7F/0x7D/0x7C respectively. |
| D3 DVS | Dynamic voltage scale control | Selects between BUCK_V1 (higher) and BUCK_V2 (lower) output voltage sets; supports CPU DVFS. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable Power-On Sequencing | Three DEFSEL-configurable startup orders with per-rail timing control (0–6 × 25 µs steps) - ensures safe boot in multi-rail SoC systems. |
| Dynamic Voltage Scaling (DVS) | Hardware pin (DVS) or register-controlled selection between two independent buck output voltages - enables real-time CPU core voltage adjustment. |
| Ultra-Low Standby Current | 0.7 µA typical IQ in STANDBY mode - extends battery life in standby or sleep states without disabling I²C interface. |
| Thermal Early Warning Interrupt | Dedicated IRQ_N assertion at 125°C (TSD_EW), before full shutdown at 160°C - allows host processor to throttle load preemptively. |
| High-Efficiency PFM Mode | 88% efficiency at 5 mA load in PFM - maintains high conversion efficiency across light-to-heavy load ranges. |
| Integrated Reference & Oscillator | Stable internal 2 MHz oscillator and precision voltage reference - eliminates need for external timing components or references. |
Applications
| Smartphone Baseband Power | Portable Media Player SoC Supply |
|---|---|
|
Use Scenario: Powering ARM9/ARM11 application processor with multiple voltage domains (core, I/O, memory, RF). IC Role / Device Role / Timing Role: Central PMU managing buck for CPU core (DVS-enabled) and five LDOs for peripherals, audio codec, and display interface. Use Value: Reduces board area vs discrete regulators; enables coordinated sequencing and thermal-aware throttling via IRQ_N. |
Use Scenario: Supplying SoC, NAND flash, stereo DAC, and backlight LED driver in handheld video player. IC Role / Device Role / Timing Role: Single-chip power solution delivering 1.2 V (core), 1.8 V (memory), 3.3 V (I/O), and 2.8 V (audio) with programmable startup order. Use Value: Eliminates six external regulators and associated passives; supports firmware-updatable voltage settings via I²C. |
| Wireless Handheld Transceiver | Low-Power Industrial Sensor Node |
|
Use Scenario: Powering GSM/GPRS transceiver chipset with strict RF noise requirements. IC Role / Device Role / Timing Role: LDOs supply sensitive RF synthesizer (LDO2), baseband (LDO3), and PA bias (LDO1); buck powers digital core. Use Value: High PSRR (>60 dB @ 100 kHz) and low noise LDOs prevent RF interference; GNDB separation isolates switching noise. |
Use Scenario: Battery-powered environmental sensor hub with MCU, ADC, BLE radio, and EEPROM. IC Role / Device Role / Timing Role: Provides 3.3 V (MCU), 2.5 V (ADC), 1.8 V (BLE), and 1.2 V (sensor interface) with ultra-low IQ in STANDBY. Use Value: 0.7 µA standby current extends 10-year battery life; I²C interface enables remote firmware updates to voltage settings. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023RSBR | Three buck converters + two LDOs; no DVS pin; 400 kHz I²C; 32-pin QFN package. | Higher integration for multi-core SoCs but larger footprint and no hardware DVS control. | Choose when needing >1 buck rail and space permits larger QFN; avoid if DVS hardware control is mandatory. |
| LP87322ARHPR | Two bucks + four LDOs; I²C + SPI; 2.2 MHz switching; 24-pin VQFN; integrated watchdog. | Supports dual-core processors with independent buck rails; adds fault monitoring not present in LP8720TLX/NOPB. | Prefer for new designs requiring higher reliability features and dual-buck flexibility; LP8720TLX/NOPB remains optimal for cost-sensitive single-buck DVS systems. |
Compared with TPS65023RSBR and LP87322ARHPR, the LP8720TLX/NOPB offers the smallest footprint (2.5 × 2.0 mm), lowest standby current (0.7 µA), and dedicated DVS pin for deterministic voltage transitions-making it uniquely suited for space-constrained, battery-critical handheld devices where single-buck DVFS suffices.
Availability
LP8720TLX/NOPB is available at Aetrix Electronics and suitable for smartphone baseband power, portable media player SoC supply, wireless transceiver power, low-power industrial sensor nodes, and wearable electronics requiring stable component supply and long-term production continuity.
Supply support for LP8720TLX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of experience in mobile and portable power solutions.
The LP8720TLX/NOPB belongs to TI's LP87xx family of highly integrated, I²C-programmable PMUs designed specifically for sub-block power delivery in space-constrained, battery-operated handheld devices.
FAQ
What is the maximum supported input voltage for LP8720TLX/NOPB?
The LP8720TLX/NOPB supports VBATT and VINB inputs up to 4.5 V (operating range), with absolute maximum rating of 6 V. Exceeding 4.5 V may cause thermal stress or premature failure, and operation above 6 V risks permanent damage. Always observe the 2.7–4.5 V operating range specified in the datasheet for reliable LP8720TLX/NOPB performance.
Does LP8720TLX/NOPB support hardware-based dynamic voltage scaling?
Yes, the LP8720TLX/NOPB supports hardware-based DVS via the DVS pin (Pin D3), allowing real-time selection between two pre-programmed buck output voltages (BUCK_V1 and BUCK_V2). When DVS = HI, BUCK_V1 is active; when DVS = LO, BUCK_V2 is active - enabling deterministic CPU core voltage transitions without I²C traffic.
How does the LP8720TLX/NOPB handle thermal protection?
The LP8720TLX/NOPB implements dual-threshold thermal protection: an early warning interrupt triggers at 125°C (TSD_EW), asserting IRQ_N to alert the host; full thermal shutdown activates at 160°C (TSD), disabling all outputs. After cooling to 115°C, automatic restart occurs only if EN remains high - ensuring safe LP8720TLX/NOPB recovery.
What is the purpose of the DEFSEL pin on LP8720TLX/NOPB?
The DEFSEL pin (Pin B2) selects one of three factory-programmed default configurations for LP8720TLX/NOPB, including startup sequence order and initial output voltages. Hard-wiring DEFSEL to VBATT, GND, or leaving it floating (Hi-Z) loads corresponding register defaults - simplifying initialization without requiring I²C programming during power-on reset.
Can LP8720TLX/NOPB operate with zero load on all outputs?
Yes, the LP8720TLX/NOPB is fully functional at zero load. Its buck converter operates in PFM mode under light loads, achieving 88% efficiency at 5 mA, and its LDOs maintain regulation and accuracy down to 0 mA. Quiescent current is 270–400 µA with all rails enabled, and drops to 0.7 µA in STANDBY mode - confirming robust LP8720TLX/NOPB behavior across full load range.
LP8720TLX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-WFBGA, DSBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (5)
- Number of Outputs:
- 6
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- 0.8V ~ 2.3V, 400mA
- Voltage/Current - Output 2:
- 1.2V ~ 3.3V, 300mA
- Voltage/Current - Output 3:
- 1.2V ~ 3.3V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 4.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-DSBGA
LP8720TLX/NOPB FAQ
1.How can I place an order for LP8720TLX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LP8720TLX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LP8720TLX/NOPB reliable?
The price and inventory of LP8720TLX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP8720TLX/NOPB is usually 5 days.
3.What payment methods are accepted for LP8720TLX/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP8720TLX/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LP8720TLX/NOPB?
LP8720TLX/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LP8720TLX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LP8720TLX/NOPB?
For technical support, including LP8720TLX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP8720TLX/NOPB requirements.
6.How does Aetrix verify that LP8720TLX/NOPB is sourced from the original manufacturer or authorized distributors?
All LP8720TLX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP8720TLX/NOPB meets industry standards.
7.What is the process for return or replacement of LP8720TLX/NOPB?
All LP8720TLX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LP8720TLX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LP8720TLX/NOPB part is unused and in its original packaging.
Return procedure for LP8720TLX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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