Texas Instruments LP87332BRHDRQ1
- Part No.:
- LP87332BRHDRQ1
- Manufacturer:
- Texas Instruments
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 28-VFQFN Exposed Pad
- Datasheet:
-
LP87332BRHDRQ1.pdf
- Description:
- IC REG QUAD BUCK/LNR 2MHZ 28VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,614
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LP87332BRHDRQ1 from Texas Instruments is an AEC-Q100 Grade 1 automotive power management IC integrating two high-current synchronous buck converters (3 A each) and two low-dropout linear regulators (300 mA each), operating from 2.8 V to 5.5 V input. It delivers precise, slew-rate-controlled outputs (0.7–3.36 V for bucks; 0.8–3.3 V for LDOs) with 2-MHz switching, spread-spectrum EMI reduction, and I²C programmability - deployed in automotive head units, camera modules, and radar ECUs.
For engineers reviewing the LP87332BRHDRQ1 datasheet, LP87332BRHDRQ1 pinout, LP87332BRHDRQ1 application, or LP87332BRHDRQ1 equivalent, key selection criteria include dual-buck + dual-LDO integration, AEC-Q100 Grade 1 qualification (−40°C to +125°C), programmable slew rate (0.5–10 mV/µs), remote voltage sensing for POL accuracy, and 28-pin VQFN wettable-flank package compatibility with automotive thermal and layout constraints.
Technical Context
The LP87332BRHDRQ1 implements two independent synchronous buck regulators with phase-interleaved operation and spread-spectrum modulation to suppress EMI peaks, while supporting external clock synchronization (1–24 MHz) for system-level timing alignment. Each buck includes programmable current limiting (1.5–4 A), soft-start control, and transient response optimization via configurable slew rate and output capacitance compensation.
Its dual LDOs feature 82 µVrms output noise, 53 dB PSRR at 10 kHz, and independent enable/control via I²C; all regulators share a common analog supply (VANA) and support remote sensing, overvoltage/undervoltage monitoring, thermal warning (115–147°C), and shutdown (140–160°C) - enabling robust power sequencing and fault handling in safety-critical automotive domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.8 V to 5.5 V for buck inputs (VIN_Bx/VANA); 2.5 V to 5.5 V for LDO inputs - supports wide automotive battery rail variation including cold-crank conditions. |
| Buck Output Current | 3 A per channel - enables direct powering of high-current SoCs, FPGAs, or image sensors without external boost stages. |
| LDO Output Current | 300 mA per channel - sufficient for auxiliary rails like camera ISP cores, display timing controllers, or CAN transceivers. |
| Switching Frequency | 1.8–2.2 MHz (typ. 2 MHz) - allows use of compact 0.47 µH inductors and reduces EMI filter size in space-constrained modules. |
| Output Voltage Accuracy | ±2% for buck (≥1 V), ±20 mV for LDO (<1 V) - ensures stable core logic and analog circuit operation across temperature and load. |
| Slew Rate Control | 0.47–10 mV/µs (7-step programmable) - minimizes inrush current and output overshoot during startup/voltage transitions. |
| Thermal Protection | Thermal warning at 115–147°C (configurable), shutdown at 140–160°C - prevents damage under sustained overload or poor PCB heatsinking. |
Pinout & Package
LP87332BRHDRQ1 uses a 28-pin, 5.0 mm × 5.0 mm VQFN package with wettable flanks for automated optical inspection (AOI) and enhanced thermal performance via exposed thermal pad connected to PCB ground plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN_B0 / VIN_B1 | Buck input power pins | Separate but externally tied inputs for Buck 0 and Buck 1; require local bypassing to PGND_Bx - enables independent input filtering and noise isolation. |
| SW_B0 / SW_B1 | Buck switch node outputs | Connect to external inductor; floating if unused - critical for EMI control and thermal dissipation path. |
| FB_B0 / FB_B1 | Buck feedback inputs | Remote sense points for closed-loop regulation; improve POL voltage accuracy by compensating IR drop in PCB traces. |
| VOUT_LDO0 / VOUT_LDO1 | LDO regulated outputs | Low-noise, low-PSRR outputs for sensitive analog circuits; each supports independent enable and voltage programming via I²C. |
| EN | Global enable input | Active-high digital control for full device power-up/down sequencing; synchronizes GPO signals and regulator start-up delays. |
| nINT | Open-drain interrupt output | Signals faults (OVP, UVP, thermal warning, PGOOD failure); programmable mask allows selective event reporting to host MCU. |
| PGOOD | Power-good status output | Push-pull or open-drain configurable signal indicating all enabled rails are within regulation tolerance (±2% for bucks, ±2% for LDOs). |
| SCL / SDA | I²C interface pins | Support Standard (100 kHz), Fast (400 kHz), Fast+ (1 MHz), and High-Speed (3.4 MHz) modes - enables real-time dynamic voltage scaling and telemetry readback. |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 Grade 1 qualification | Validated for −40°C to +125°C ambient operation - meets automotive infotainment and ADAS module reliability requirements without derating. |
| Programmable slew rate (0.47–10 mV/µs) | Reduces peak inrush current by >60% during startup and voltage transitions - eliminates need for external soft-start circuitry and eases capacitor stress. |
| Spread-spectrum + phase interleaving | Lowers peak EMI by up to 10 dB compared to fixed-frequency operation - simplifies compliance with CISPR 25 Class 5 radiated emissions limits. |
| Remote voltage sensing (FB_Bx) | Compensates for up to 150 mV IR drop between IC output and point-of-load - maintains ±1% output accuracy at SoC VDD pins despite PCB trace resistance. |
| I²C-configurable power sequencing | Enables precise start-up/shutdown delay and order control (including GPO synchronization) - eliminates external sequencer ICs in multi-rail systems. |
| Integrated thermal warning & shutdown | Provides early fault indication (115–147°C) and hard cutoff (140–160°C) with 20°C hysteresis - protects downstream components during thermal runaway events. |
Applications
| Automotive Head Unit Power | Camera Module Supply |
|---|---|
Use Scenario: Powers main SoC, audio DSP, and display controller in centralized infotainment head units with strict EMI and thermal budgets. IC Role / Device Role / Timing Role: Dual-buck supplies core logic (1.1 V/1.8 V) and I/O (3.3 V); dual-LDOs feed audio codec and touch controller; I²C enables dynamic voltage scaling during video playback. Use Value: Eliminates discrete DC/DC + LDO solutions, reducing BOM count by 40% and PCB area by 35% while meeting CISPR 25 Class 5 emissions. |
Use Scenario: Supplies image sensor, ISP, and MIPI PHY in rear-view or surround-view camera modules mounted near hot engine compartments. IC Role / Device Role / Timing Role: Buck0 powers sensor analog front-end (2.8 V); Buck1 supplies ISP core (1.2 V); LDO0/LDO1 deliver clean 1.8 V and 3.3 V to MIPI lanes and serializer. Use Value: Remote sensing maintains <±1% output accuracy at sensor die despite 120 mm PCB trace length; thermal shutdown prevents field failures above 125°C ambient. |
| Radar ECU Power Management | Automotive Display Backlight Driver Support |
Use Scenario: Provides regulated rails for 77-GHz radar SoC, CAN FD transceiver, and flash memory in front radar modules exposed to vibration and thermal cycling. IC Role / Device Role / Timing Role: Buck regulators supply RF processor (1.0 V) and digital baseband (1.8 V); LDOs power CAN FD PHY (3.3 V) and EEPROM interface (1.8 V); nINT alerts MCU on overtemperature events. Use Value: Spread-spectrum mode suppresses switching noise near 77 GHz band; AEC-Q100 qualification ensures 15-year field life under automotive shock/vibe profiles. |
Use Scenario: Generates bias voltages for TFT-LCD or OLED display panels in digital instrument clusters requiring flicker-free dimming and low EMI. IC Role / Device Role / Timing Role: LDO0/LDO1 supply display timing controller (1.2 V) and gamma correction DAC (3.3 V); buck regulators power backlight LED driver ICs (5 V/3.3 V); PGOOD enables safe panel initialization sequence. Use Value: 82 µVrms LDO noise prevents visible display artifacts; programmable PGOOD gating time (800 µs) aligns with panel power-on reset timing requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-buck + dual-LDO automotive power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LP87322BRHDRQ1 | Same pinout and register map, but lacks spread-spectrum mode and phase interleaving - lower EMI suppression capability. | Suitable for cost-sensitive infotainment modules where CISPR 25 Class 5 margin is >6 dB; not recommended for radar or camera modules near sensitive RF bands. | Select LP87322BRHDRQ1 only when EMI filtering budget allows higher conducted noise; verify thermal performance with reduced switching efficiency. |
| TPS65910A3RSLR | 10-channel PMIC with 3 bucks + 7 LDOs; larger 48-pin VQFN (7 mm × 7 mm); no remote sensing or programmable slew rate. | Better suited for complex multi-SoC platforms (e.g., telematics + infotainment fusion); requires additional layout area and lacks POL accuracy for high-speed interfaces. | Choose TPS65910A3RSLR when >4 regulated rails are needed; avoid for space-constrained camera/radar modules due to footprint and missing slew control. |
Compared with LP87322BRHDRQ1 and TPS65910A3RSLR, the LP87332BRHDRQ1 uniquely balances compact 28-pin VQFN packaging, advanced EMI mitigation (spread-spectrum + interleaving), and precision POL regulation - making it optimal for next-generation automotive vision and radar edge nodes where board space, thermal density, and electromagnetic cleanliness are co-constrained.
Availability
LP87332BRHDRQ1 is available at Aetrix Electronics and suitable for automotive head units, camera modules, and radar ECUs requiring stable component supply, AEC-Q100 compliance, and long-term production continuity.
Supply support for LP87332BRHDRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive-grade power solutions, with over 40 years of automotive qualification expertise and ISO/TS 16949-certified manufacturing.
The LP87332BRHDRQ1 belongs to TI's automotive PMIC portfolio designed specifically for infotainment, ADAS, and body electronics - emphasizing AEC-Q100 reliability, EMI robustness, and integrated power sequencing for modern vehicle architectures.
FAQ
What is the maximum junction temperature specification for LP87332BRHDRQ1?
The LP87332BRHDRQ1 has a maximum junction temperature (TJ-MAX) of 150°C, with thermal shutdown triggered between 140°C and 160°C depending on process variation. Its thermal design supports continuous operation up to 140°C junction temperature, and thermal warning is configurable between 115°C and 147°C. This ensures reliable performance in under-hood automotive environments where ambient temperatures reach +125°C.
Does LP87332BRHDRQ1 support external clock synchronization, and what frequency range is valid?
Yes, LP87332BRHDRQ1 supports external clock synchronization via the CLKIN pin, accepting nominal frequencies from 1 MHz to 24 MHz in 1-MHz steps. The external clock must be selected so that the resulting buck switching frequency remains above 1.7 MHz. This capability enables deterministic timing alignment across multiple power rails in radar or camera systems, reducing beat-frequency interference and simplifying system-level EMI filtering.
How does the remote voltage sensing function work on LP87332BRHDRQ1, and which pins implement it?
LP87332BRHDRQ1 implements remote voltage sensing through dedicated FB_B0 and FB_B1 pins, which connect directly to the point-of-load (e.g., SoC VDD pins) rather than the regulator output. This compensates for IR drop across PCB traces and connectors, maintaining ±1% output voltage accuracy at the load. The feature is active only when the corresponding buck converter is enabled and configured for remote sense mode via I²C register settings.
What protection features are integrated into LP87332BRHDRQ1, and how are they configured?
LP87332BRHDRQ1 integrates overvoltage protection (OVP), undervoltage lockout (UVLO), short-circuit detection (280–440 mV for bucks; 190–450 mV for LDOs), thermal warning/shutdown, and load current measurement. All protections are hardware-monitored and configurable via I²C registers - for example, thermal warning threshold is set using TDIE_WARN_LEVEL bits, and OVP/UVLO hysteresis is fixed per internal design. Faults trigger the nINT pin and can be masked individually.
Can LP87332BRHDRQ1 operate in forced PWM mode, and what are the efficiency trade-offs?
Yes, LP87332BRHDRQ1 supports forced PWM mode via I²C configuration, disabling automatic PFM/PWM transition. In forced PWM, efficiency drops ~5–8% at light loads (<100 mA) compared to AUTO mode but improves transient response and eliminates low-frequency switching noise. At full 3-A load, efficiency remains >90% (Vin=3.7 V, Vout=1.0 V), making forced PWM ideal for noise-sensitive analog circuits or deterministic timing-critical applications.
LP87332BRHDRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 28-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) (2), Linear (LDO) (2)
- Number of Outputs:
- 4
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- 0.7V ~ 3.36V, 3A
- Voltage/Current - Output 2:
- 0.7V ~ 3.36V, 3A
- Voltage/Current - Output 3:
- 0.8V ~ 3.3V, 300mA
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 28-VQFN (5x5)
LP87332BRHDRQ1 FAQ
1.How can I place an order for LP87332BRHDRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for LP87332BRHDRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LP87332BRHDRQ1 reliable?
The price and inventory of LP87332BRHDRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP87332BRHDRQ1 is usually 5 days.
3.What payment methods are accepted for LP87332BRHDRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP87332BRHDRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LP87332BRHDRQ1?
LP87332BRHDRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LP87332BRHDRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LP87332BRHDRQ1?
For technical support, including LP87332BRHDRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP87332BRHDRQ1 requirements.
6.How does Aetrix verify that LP87332BRHDRQ1 is sourced from the original manufacturer or authorized distributors?
All LP87332BRHDRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP87332BRHDRQ1 meets industry standards.
7.What is the process for return or replacement of LP87332BRHDRQ1?
All LP87332BRHDRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with LP87332BRHDRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LP87332BRHDRQ1 part is unused and in its original packaging.
Return procedure for LP87332BRHDRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LP87332BRHDRQ1 Tags

-
TPS6521905RHBR
Texas Instruments

-
MIC3385YHL-TR
Microchip Technology

-
A4402ELPTR-T
Allegro MicroSystems
-
LM26480SQ-AA/NOPB
Texas Instruments

-
A4402KLPTR-T
Allegro MicroSystems

-
BD71847AMWV-E2
ROHM Semiconductor

-
ADP5040ACPZ-1-R7
Analog Devices Inc.

-
LT3048IDC#TRPBF
Analog Devices Inc.

-
ADP5037ACPZ-R7
Analog Devices Inc.

-
XRP7714ILB-F
MaxLinear, Inc.

-
LTC3260EDE#TRPBF
Analog Devices Inc.

-
LTC3260EMSE#PBF
Analog Devices Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
