Texas Instruments LP87564WRNFRQ1
- Part No.:
- LP87564WRNFRQ1
- Manufacturer:
- Texas Instruments
- Package:
- 26-PowerVFQFN
- Datasheet:
-
LP87564WRNFRQ1.pdf
- Description:
- IC REG BUCK ADJ 6A 26VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LP87564WRNFRQ1 from Texas Instruments is a quad-channel, 1-phase-per-buck automotive-grade buck converter IC delivering up to 4 A per channel (16 A total), with programmable output voltage (0.6 V–3.36 V), 2 MHz switching frequency, and I²C interface supporting up to 3.4 MHz. It serves as a multi-rail power management solution for infotainment SoCs and camera modules requiring independent, tightly regulated low-voltage rails.
For engineers reviewing the LP87564WRNFRQ1 datasheet, LP87564WRNFRQ1 pinout, LP87564WRNFRQ1 application, or LP87564WRNFRQ1 equivalent, key selection criteria include per-channel current capability, phase independence, remote sensing support, slew-rate programmability (0.47–10 mV/µs), and AEC-Q100 Grade 1 qualification for under-hood automotive use.
Technical Context
The LP87564WRNFRQ1 implements four fully independent synchronous buck regulators-each with dedicated VIN_Bx, SW_Bx, FB_Bx, and PGND_Bx connections-enabling true 1-phase-per-output configuration without internal phase coupling. Each channel supports programmable current limiting (1.5–5 A peak), PFM/PWM auto-mode transition at 200 mA/600 mA thresholds, and soft-start with configurable slew rate.
Its digital control core integrates an I²C interface (100 kHz–3.4 MHz), three configurable GPIOs (EN1/EN2/EN3), interrupt reporting (nINT), and power-good monitoring (PGOOD) with adjustable debounce. Remote differential sensing on FB pins compensates for IR drop between regulator and point-of-load, ensuring ±2% DC accuracy across temperature and load.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.8 V to 5.5 V - supports direct connection to automotive battery rail with transient tolerance. |
| Output Voltage Range | 0.6 V to 3.36 V in 5–20 mV steps - covers DDR memory, processor cores, and image sensors. |
| Max Output Current | 4 A per channel (16 A total) - enables discrete rail assignment without current sharing constraints. |
| Switching Frequency | 1.8–2.2 MHz (typ. 2 MHz) - allows compact 0.47 µH inductors and reduces EMI in sensitive RF zones. |
| I²C Speed Support | Up to 3.4 MHz (High-Speed mode) - enables fast register writes during dynamic voltage scaling sequences. |
| Thermal Rating | AEC-Q100 Grade 1 (–40°C to +125°C ambient) - qualified for engine bay and dashboard mounting locations. |
| Protection Features | Overcurrent (forward/negative), overtemperature (warning + shutdown), OVP/UVLO, short-circuit - eliminates need for external fault-handling circuitry. |
Pinout & Package
VQFN-HR (RNF) package, 26-pin, 4.5 mm × 4.0 mm body size with exposed thermal pad. Designed for high-power density automotive PCB layouts with localized thermal vias to inner ground planes.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB_B0–FB_B3 | Feedback input (positive) | Per-buck voltage sense node; supports remote differential sensing to correct POL voltage drop. |
| VIN_B0–VIN_B3 | Input power supply | Independent input pins per buck - must be externally tied and locally bypassed; no internal connection. |
| SW_B0–SW_B3 | Switch node | Direct connection to external inductor; requires low-inductance layout to minimize switching losses. |
| EN1/EN2/EN3 | Enable / GPIO | Configurable as enable signals or general-purpose outputs; support sequencing of external regulators or reset lines. |
| SDA/SCL | I²C bidirectional data/clock | Support standard/fast/fast+/high-speed modes; require external pullups to VANA (1.65–3.6 V). |
| PGOOD | Power-good status output | Open-drain signal with programmable delay (4 µs–13 ms); indicates stable regulation per enabled buck. |
| nINT | Interrupt output | Open-drain alert for faults (OCP, OTP, UVLO) or events (voltage change completion, PGOOD assertion). |
| NRST | Reset input | Active-low device reset; includes internal 650–1700 kΩ pulldown for robust start-up behavior. |
Key Features
| Feature | Design Value |
|---|---|
| Four independent 1-phase buck regulators | Enables discrete rail assignment (e.g., VDD_CORE, VDD_IO, VDD_CAM, VDD_PHY) without inter-channel coupling or forced phase alignment. |
| Programmable output voltage slew rate | 0.47–10 mV/µs range - minimizes inrush current and output overshoot during startup/voltage transitions. |
| Integrated current measurement | 20 mA LSB resolution, <10% error above 1 A - eliminates need for external sense resistors and associated board area. |
| Remote differential voltage sensing | Compensates for IR drop between regulator output and point-of-load - maintains ±2% regulation accuracy at SoC pins. |
| Configurable GPIOs with sequencing support | Three ENx pins double as GPIOs and can trigger external devices (e.g., load switches, PMICs) in synchronized power-up/down sequences. |
Applications
| Infotainment Processor Core Rail | Automotive Camera Sensor Bias |
|---|---|
|
Use Scenario: Powering ARM Cortex-A7x or similar application processors in head-unit systems requiring multiple independent low-noise rails. IC Role / Device Role / Timing Role: Primary multi-rail DC/DC controller delivering VDD_CORE (0.8 V), VDD_MPU (0.9 V), VDD_GPU (1.0 V), and VDD_IO (1.8 V) with precise sequencing and dynamic voltage scaling. Use Value: Independent per-rail control ensures optimal efficiency and noise isolation; slew-rate programming prevents system reset during DVFS transitions. |
Use Scenario: Supplying image sensor arrays (e.g., Sony IMX series) in ADAS front/rear cameras where rail stability directly impacts SNR and frame consistency. IC Role / Device Role / Timing Role: Dedicated buck channel for analog sensor bias (2.8 V) and digital I/O (1.2 V), with remote sensing correcting trace resistance-induced droop. Use Value: ±2% DC accuracy and <±40 mV transient response (0.1–2 A step) maintain pixel-level voltage integrity across temperature and vibration. |
| Radar SoC Auxiliary Supplies | Digital Cluster Display Logic |
|
Use Scenario: Generating clean, low-noise auxiliary rails (1.0 V, 1.2 V, 1.8 V) for 77 GHz radar transceivers and DSPs in compact front-bumper modules. IC Role / Device Role / Timing Role: Four isolated buck outputs feed separate functional blocks (RF synth, ADC, DSP core, interface) to prevent cross-talk and ground bounce. Use Value: 2 MHz switching and integrated spread-spectrum reduce conducted EMI into sensitive RF receive paths; PGOOD per rail enables safe boot sequencing. |
Use Scenario: Powering TFT-LCD timing controllers, GPU, and touch interface in digital instrument clusters where visual artifacts must be eliminated. IC Role / Device Role / Timing Role: Simultaneous delivery of VDD_TCON (3.3 V), VDD_GPU (1.1 V), VDD_IO (1.8 V), and backlight gate drive (5 V via external boost) with coordinated enable timing. Use Value: Configurable ENx GPIOs synchronize power-up with MCU boot state; interrupt reporting flags undervoltage events before display corruption occurs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail automotive buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LP87563QRNFRQ1 | Configured as one 2-phase + two 1-phase outputs - shares inductor current between two phases for higher per-rail current (8 A max on dual-phase rail). | Better suited for hybrid loads: one high-current rail (e.g., DDR memory) plus two low-current rails (e.g., SerDes, PHY). | Select when needing >4 A on at least one rail while retaining two independent low-current outputs. |
| LP87565QRNFRQ1 | Configured as two independent 2-phase outputs - each delivers up to 8 A with interleaved switching for lower ripple and better thermal distribution. | Ideal for dual-core SoCs or redundant safety domains requiring matched, high-current rails with inherent phase balancing. | Select when system architecture mandates exactly two high-current rails (e.g., ASIL-B dual-lockstep cores) with ripple-sensitive analog sections. |
Compared with LP87564WRNFRQ1's four independent 1-phase topology, LP87563QRNFRQ1 trades per-rail flexibility for higher single-rail current, while LP87565QRNFRQ1 optimizes for dual-rail thermal and ripple performance - choice depends on SoC rail count, current asymmetry, and layout space constraints.
Availability
LP87564WRNFRQ1 is available at Aetrix Electronics and suitable for automotive infotainment, ADAS camera modules, and digital cluster designs requiring stable component supply, AEC-Q100 compliance, and long-term production continuity.
Supply support for LP87564WRNFRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive power solutions, with decades of automotive qualification expertise and broad manufacturing scale.
The LP8756x-Q1 product line was designed specifically for next-generation automotive domain controllers and ADAS platforms requiring high-efficiency, flexible, and AEC-Q100-compliant multi-rail power management with minimal external components.
FAQ
What is the maximum output current per channel on the LP87564WRNFRQ1?
The LP87564WRNFRQ1 supports up to 4 A per buck channel when configured in 1-phase mode, with total device capability of 16 A. This rating assumes VIN ≥3 V; at 2.8 V ≤VIN < 3 V, maximum per-channel current is reduced to 3 A to maintain thermal and electrical limits. The LP87564WRNFRQ1 uses programmable forward current limits (1.5–5 A) and negative current limits (1.6–2.4 A) to enforce these boundaries per phase.
Does the LP87564WRNFRQ1 support remote voltage sensing?
Yes, the LP87564WRNFRQ1 supports true remote differential voltage sensing via dedicated FB_Bx pins, allowing compensation for IR drop between the regulator output and point-of-load. Each FB pin functions as the positive feedback node for its respective buck, and certain pins (e.g., FB_B1, FB_B3) can alternatively serve as negative feedback inputs for adjacent channels - enabling Kelvin-style sensing that maintains ±2% DC output accuracy across load, line, and temperature.
Can the LP87564WRNFRQ1 operate without an external clock source?
Yes, the LP87564WRNFRQ1 operates autonomously using its internal RC oscillator and does not require an external CLKIN signal. The CLKIN pin may be tied to GND if unused. When an external clock is applied (1–24 MHz), the device synchronizes its PWM switching to that source to reduce beat frequencies and EMI - but this is optional. All timing-critical functions (I²C, sequencing, protection) remain fully operational with the internal clock.
How does the LP87564WRNFRQ1 handle power sequencing across its four outputs?
The LP87564WRNFRQ1 supports flexible power sequencing through its three configurable ENx pins (EN1/EN2/EN3), which can act as enable inputs or GPIOs. Sequencing is implemented via I²C register control: each buck has independent enable/disable, startup delay (0–100 ms), and voltage ramp settings. The LP87564WRNFRQ1 also generates PGOOD per enabled rail and asserts nINT upon sequence completion or fault - enabling tight coordination with host processors or external supervisors.
What protection features are integrated into the LP87564WRNFRQ1?
The LP87564WRNFRQ1 integrates comprehensive protection: per-phase overcurrent (programmable forward/negative limits), overtemperature warning (115–147°C) and shutdown (140–160°C), VANA overvoltage (5.45–6.1 V) and undervoltage lockout (2.5–2.75 V), output short-circuit detection, and PGOOD-based undervoltage/overvoltage monitoring. All protections trigger nINT and disable affected channels without requiring external circuitry - meeting ISO 26262 ASIL-B readiness requirements.
LP87564WRNFRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 26-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.8V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 3.36V
- Current - Output:
- 6A
- Frequency - Switching:
- 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 26-VQFN-HR (4.5x4)
LP87564WRNFRQ1 FAQ
1.How can I place an order for LP87564WRNFRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for LP87564WRNFRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LP87564WRNFRQ1 reliable?
The price and inventory of LP87564WRNFRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP87564WRNFRQ1 is usually 5 days.
3.What payment methods are accepted for LP87564WRNFRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP87564WRNFRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LP87564WRNFRQ1?
LP87564WRNFRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LP87564WRNFRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LP87564WRNFRQ1?
For technical support, including LP87564WRNFRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP87564WRNFRQ1 requirements.
6.How does Aetrix verify that LP87564WRNFRQ1 is sourced from the original manufacturer or authorized distributors?
All LP87564WRNFRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP87564WRNFRQ1 meets industry standards.
7.What is the process for return or replacement of LP87564WRNFRQ1?
All LP87564WRNFRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with LP87564WRNFRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LP87564WRNFRQ1 part is unused and in its original packaging.
Return procedure for LP87564WRNFRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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