Texas Instruments LP875650RNFRQ1
- Part No.:
- LP875650RNFRQ1
- Manufacturer:
- Texas Instruments
- Package:
- 26-PowerVFQFN
- Datasheet:
-
LP875650RNFRQ1.pdf
- Description:
- IC REG BUCK ADJ 16A QUAD 26VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LP875650RNFRQ1 from Texas Instruments is an AEC-Q100 Grade 1 automotive buck converter IC with two independent 2-phase DC/DC outputs, delivering up to 8 A per output (16 A total), 0.6 V–3.36 V programmable output voltage, 2 MHz switching frequency, and I²C-controlled phase interleaving for radar and infotainment power rails.
For engineers reviewing the LP875650RNFRQ1 datasheet, LP875650RNFRQ1 pinout, LP875650RNFRQ1 application, or LP875650RNFRQ1 equivalent, this device supports remote differential sensing, programmable slew rate (0.47–10 mV/µs), load-current measurement without external sense resistors, and synchronized multi-rail sequencing via GPIOs and enable signals.
Technical Context
The LP875650RNFRQ1 implements four synchronous buck converter cores configured exclusively as two 2-phase outputs - enabling high-current, low-ripple POL regulation with automatic phase shedding (e.g., 2→1 phase at ≤0.7 A per rail) and current balancing ≤10% mismatch. It uses internal high-side/low-side FETs (RDS(on) = 29–65 mΩ / 17–35 mΩ) and supports PWM/PFM auto-mode transition at 200 mA (PWM→PFM) and 600 mA (PFM→PWM).
Control is delivered via a 3.4 MHz I²C interface with standard/fast/fast+/high-speed modes, configurable GPIOs (EN1/EN2/EN3), interrupt masking, and programmable PGOOD thresholds (±8–20 mV). The device integrates thermal warning (115–147°C) and shutdown (140–160°C), VANA OVP/UVLO, and output short-circuit/overload protection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Configuration | Two independent 2-phase buck outputs (no 4-phase, 3+1, or 1×4 configurations supported) |
| Max Output Current | 8 A per output (16 A total), limited by input voltage: ≥3 V enables full rating; 2.8–3 V reduces to 6 A per output |
| Input Voltage Range | 2.8 V to 5.5 V - supports wide automotive battery range including cold-crank transients |
| Output Voltage Range | 0.6 V to 3.36 V in programmable steps (10 mV below 0.73 V, 5 mV up to 1.4 V, 20 mV above) |
| Switching Frequency | 1.8–2.2 MHz (typ. 2 MHz) - enables compact 0.47 µH inductors and minimizes EMI in sensitive RF zones |
| Efficiency Peak | ≥90% at 1–10 A per 2-phase rail (VIN = 3.7 V, VOUT = 1.8 V), validated under D530 test conditions |
| I²C Interface Speed | Up to 3.4 MHz (high-speed mode) - enables rapid register updates during dynamic voltage scaling sequences |
Pinout & Package
VQFN-HR (RNF) 26-pin package, 4.50 mm × 4.00 mm body size, with exposed thermal pad for enhanced junction-to-board thermal resistance (RθJB = 4.7 °C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SW_B0, SW_B1, SW_B2, SW_B3 | Buck switch nodes | Four independent high-frequency switching nodes - SW_B0/SW_B1 form first 2-phase output; SW_B2/SW_B3 form second 2-phase output |
| FB_B0–FB_B3 | Output voltage feedback inputs | Dedicated positive feedback per buck channel; FB_B1/FB_B3 also serve as negative (ground-side) feedback for adjacent rails in 2-phase configuration |
| VIN_B0–VIN_B3 | Per-phase input power pins | Electrically isolated input pins - must be externally tied together and locally bypassed to minimize noise coupling between phases |
| PGND_B01, PGND_B23 | Power ground terminals | Split ground layout: PGND_B01 serves BUCK0/BUCK1; PGND_B23 serves BUCK2/BUCK3 - critical for EMI control and current-loop separation |
| EN1 (GPIO1), EN2 (GPIO2), EN3 (GPIO3) | Configurable enable/GPIO pins | Three digital I/Os supporting enable control, dual-voltage selection, or sequencing of external regulators/loads |
| SDA, SCL, nINT, NRST, CLKIN | Digital interface & control | I²C bidirectional data/clock, open-drain interrupt, active-low reset, and optional external clock sync input for EMI reduction |
Key Features
| Feature | Design Value |
|---|---|
| Remote differential voltage sensing | Compensates IR drop between regulator output and point-of-load (POL), improving DC accuracy to ±2% (≥1 V) or ±20 mV (<1 V) |
| Programmable output slew rate | Seven settings (0.47–10 mV/µs) - prevents overshoot/in-rush during startup/voltage change; limits max COUT per phase (e.g., 500 µF at 1.9 mV/µs) |
| Integrated current measurement | 20.47 A full-scale range, 20 mA LSB resolution, <10% error (>1 A), no external sense resistor required |
| Multi-rail sequencing & timing | Start-up/shutdown delays and GPIO-assisted sequencing synchronized to ENx signals - enables controlled power-up of SoC, memory, and peripherals |
| Spread-spectrum & phase interleaving | Reduces peak EMI amplitude by distributing energy across frequency band; 90° phase shift between 2-phase outputs lowers input/output ripple |
Applications
| Radar Module Power Supply | Automotive Infotainment SoC Core Rail |
|---|---|
|
Use Scenario: High-current, low-noise 1.1 V core supply for 77 GHz radar processor requiring tight transient response and EMI compliance. IC Role / Device Role / Timing Role: Dual 2-phase buck regulator delivering 8 A @ 1.1 V with <±40 mV load-step deviation (0.1→4 A, 1 µs edge) and 2 MHz switching synchronized to system clock. Use Value: Phase interleaving cuts input ripple by 50% vs single-phase; remote sensing maintains ±1.1% output accuracy at SoC die; spread spectrum meets CISPR 25 Class 5 limits. |
Use Scenario: Dynamic voltage scaling rail for application processor in head-unit, supporting multiple operating points (0.8 V–1.3 V) during performance states. IC Role / Device Role / Timing Role: I²C-programmable dual-output regulator with independent slew-rate control per rail and GPIO-triggered sequencing for CPU/GPU domain power-up. Use Value: Programmable 0.47–10 mV/µs slew enables safe transition between DVFS states; integrated current monitor provides real-time load telemetry without board area penalty. |
| Digital Cluster Display Backlight Driver Bias | ADAS Camera Image Signal Processor (ISP) Core |
|
Use Scenario: Stable 1.8 V bias supply for high-resolution TFT display timing controller, immune to battery voltage sag during cranking. IC Role / Device Role / Timing Role: One 2-phase output (8 A) operating in AUTO mode with phase shedding below 0.7 A - maintains >85% efficiency from 10 mA to full load. Use Value: PFM operation at light load extends idle time; UVLO (2.5–2.75 V) prevents brownout during cold-start; thermal shutdown (140–160°C) protects against display enclosure overheating. |
Use Scenario: Low-noise 1.0 V core rail for ISP in surround-view camera module, where switching noise could corrupt analog pixel data. IC Role / Device Role / Timing Role: Second 2-phase output with dedicated PGND_B23 and remote sensing on FB_B2/FB_B3 - isolates noise-sensitive analog ground from digital domains. Use Value: 2 MHz fixed frequency avoids interference with image sensor readout clocks; <3 mVp-p ripple (PWM mode) ensures clean analog supply; PGOOD maskable interrupt alerts host on rail fault. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-phase buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LP875620RNFRQ1 | Configured as one 3-phase + one 1-phase output (12 A + 4 A), not two 2-phase outputs | Suitable for asymmetric loads (e.g., GPU + memory), but cannot replicate LP875650RNFRQ1's balanced dual 2-phase topology | Select when system requires unequal current distribution across rails and accepts different phase interleaving behavior |
| LP875640RNFRQ1 | Four independent 1-phase outputs (4 × 4 A), no phase-interleaved operation or current sharing between channels | Enables fully independent rail control (e.g., separate voltages/timing per subsystem), but lacks ripple cancellation and current-balancing benefits | Choose for maximum flexibility in mixed-voltage systems where cross-regulator coordination is unnecessary |
Compared with LP875620RNFRQ1 and LP875640RNFRQ1, the LP875650RNFRQ1 uniquely delivers matched dual 2-phase outputs - optimizing EMI, thermal distribution, and transient response for symmetric high-current loads like radar SoCs and dual-core processors.
Availability
LP875650RNFRQ1 is available at Aetrix Electronics and suitable for automotive radar, infotainment head-units, and digital cluster power designs requiring stable component supply, AEC-Q100 Grade 1 qualification, and long-term production continuity.
Supply support for LP875650RNFRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive-grade power management solutions with decades of automotive qualification expertise.
The LP8756x-Q1 product line was designed specifically for next-generation automotive ADAS and infotainment platforms - integrating high-efficiency multi-phase conversion, precise sequencing, and robust fault protection in compact QFN packages.
FAQ
What is the exact output configuration supported by the LP875650RNFRQ1?
The LP875650RNFRQ1 is factory-configured exclusively for two independent 2-phase buck outputs - BUCK0+BUCK1 forming the first 2-phase rail and BUCK2+BUCK3 forming the second. Unlike other variants in the LP8756x-Q1 family, it does not support 4-phase, 3+1-phase, or four 1-phase configurations. This fixed topology enables optimized current sharing, phase interleaving, and thermal distribution for symmetric high-current loads.
Does the LP875650RNFRQ1 require external current-sense resistors for load monitoring?
No, the LP875650RNFRQ1 integrates on-die current sensing and delivers 20.47 A full-scale measurement with 20 mA LSB resolution and <10% accuracy above 1 A - eliminating need for external sense resistors. This reduces BOM cost, PCB area, and thermal dissipation while enabling real-time telemetry for thermal management and diagnostics in automotive systems.
How does the LP875650RNFRQ1 handle input voltage transients during automotive cold-crank conditions?
The LP875650RNFRQ1 operates down to 2.8 V input and incorporates undervoltage lockout (UVLO) with rising threshold of 2.51–2.75 V and falling threshold of 2.5–2.7 V. During cold-crank dips, it maintains regulation until VIN falls below UVLO, then safely shuts down. Its 5.5 V absolute max input rating and internal VANA OVP (5.45–6.1 V) protect against load-dump spikes without external clamping.
Can the LP875650RNFRQ1 synchronize its switching clock to an external source?
Yes, the LP875650RNFRQ1 accepts an external clock via the CLKIN pin (1–24 MHz, ±30% accuracy) and can phase-lock its internal PLL to it. This capability allows EMI reduction through clock synchronization with system timing sources - critical in radar and camera modules where switching noise must avoid interfering with RF or image sensor sampling frequencies.
What thermal protection features are implemented in the LP875650RNFRQ1?
The LP875650RNFRQ1 includes programmable thermal warning (115–147°C depending on TDIE_WARN_LEVEL setting) with 20°C hysteresis, and thermal shutdown (140–160°C) with 20°C hysteresis. These features trigger interrupts and status flags via the nINT pin and I²C registers, enabling host MCU to throttle loads or initiate cooling before irreversible damage occurs - essential for under-hood automotive deployments.
LP875650RNFRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 26-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 4
- Voltage - Input (Min):
- 2.8V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 3.36V
- Current - Output:
- 16A
- Frequency - Switching:
- 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 26-VQFN-HR (4.5x4)
LP875650RNFRQ1 FAQ
1.How can I place an order for LP875650RNFRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for LP875650RNFRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LP875650RNFRQ1 reliable?
The price and inventory of LP875650RNFRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP875650RNFRQ1 is usually 5 days.
3.What payment methods are accepted for LP875650RNFRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP875650RNFRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LP875650RNFRQ1?
LP875650RNFRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LP875650RNFRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LP875650RNFRQ1?
For technical support, including LP875650RNFRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP875650RNFRQ1 requirements.
6.How does Aetrix verify that LP875650RNFRQ1 is sourced from the original manufacturer or authorized distributors?
All LP875650RNFRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP875650RNFRQ1 meets industry standards.
7.What is the process for return or replacement of LP875650RNFRQ1?
All LP875650RNFRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with LP875650RNFRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LP875650RNFRQ1 part is unused and in its original packaging.
Return procedure for LP875650RNFRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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