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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Voltage Regulators - DC DC Switching Regulators

Texas Instruments LP87565URNFRQ1

Name: LP87565URNFRQ1
Brand: Texas Instruments
SKU: LP87565URNFRQ1
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: LP87565URNFRQ1

Manufacturer:: Texas Instruments

Category:: Voltage Regulators - DC DC Switching Regulators

Package:: 26-PowerVFQFN

Datasheet:: LP87565URNFRQ1.pdf

Description:: IC REG BUCK ADJ 16A DL 26VQFN

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Product details

Overview

LP87565URNFRQ1 from Texas Instruments is an AEC-Q100 Grade 1 automotive buck converter IC with two independent 2-phase DC/DC outputs, delivering up to 8 A per output (16 A total), 0.6 V–3.36 V programmable output voltage, 2 MHz switching frequency, and I²C interface supporting up to 3.4 MHz. It serves as a multi-rail power management solution for infotainment SoCs and ADAS processors requiring tightly regulated, phase-interleaved POL supplies.

For engineers reviewing the LP87565URNFRQ1 datasheet, LP87565URNFRQ1 pinout, LP87565URNFRQ1 application, or LP87565URNFRQ1 equivalent, key selection criteria include its dual 2-phase configuration (distinct from LP87564-Q1's four 1-phase or LP87562-Q1's 3+1-phase), integrated current sensing, programmable slew rate (0.47–10 mV/µs), and automotive-grade thermal protection (140°C shutdown, 125°C warning).

Technical Context

The LP87565URNFRQ1 implements four synchronous buck cores configured exclusively as two independent 2-phase outputs-enabling interleaved operation per rail to reduce input/output ripple and improve transient response. Each 2-phase rail supports remote differential sensing (FBx+/FBx−) and automatic phase shedding (e.g., 2→1 phase at ≤0.7 A per rail) to maintain high efficiency across light-to-heavy loads.

Control is executed via a 3.4 MHz I²C interface with programmable GPIOs (EN1/EN2/EN3), interrupt masking, and synchronized startup/shutdown sequencing. The device integrates high-side (29–65 mΩ) and low-side (17–35 mΩ) FETs, supports external clock synchronization (1–24 MHz), and features spread-spectrum modulation to suppress EMI in safety-critical automotive environments.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Configuration	Two independent 2-phase buck rails (not 4-phase, 3+1, or 4×1); enables separate voltage domains with interleaved switching per rail.
Max Output Current	8 A per 2-phase rail (16 A total); limited by thermal design and input voltage (≥3 V required for full rating).
Input Voltage Range	2.8 V to 5.5 V; compatible with automotive 3.3 V/5 V supply rails and battery-backed systems.
Output Voltage Range	0.6 V to 3.36 V in 5–20 mV steps; supports core voltages for modern SoCs (e.g., 1.0 V, 1.1 V, 1.8 V) with ±2% DC accuracy in PWM mode.
Switching Frequency	1.8–2.2 MHz (typ. 2 MHz); enables use of small 0.47 µH inductors and <10 mV_p-p ripple in PWM mode.
I²C Interface Speed	Up to 3.4 MHz (High-Speed mode); allows rapid register access for dynamic voltage scaling and fault logging.
Thermal Protection	Overtemperature warning at 125°C (configurable), shutdown at 140°C with 20°C hysteresis; ensures safe operation under sustained load in engine bay or head unit enclosures.

Pinout & Package

VQFN-HR (RNF) 26-pin package, 4.50 mm × 4.00 mm body size, with exposed thermal pad. Pin count and layout identical across LP8756x-Q1 family; pin functions are electrically validated per TI SNVSB22 datasheet.

Pin/Terminal	Circuit Role	Design Meaning
SW_B0, SW_B1, SW_B2, SW_B3	Buck switch nodes	Four independent high-frequency switching nodes-paired as (B0+B1) for Rail A and (B2+B3) for Rail B in 2-phase configuration.
FB_B0, FB_B1, FB_B2, FB_B3	Voltage feedback inputs	Per-phase positive feedback (FB_Bx); FB_B1/FB_B3 also serve as negative feedback for adjacent rails enabling remote sensing.
VIN_B0–VIN_B3	Independent input power pins	Must be externally tied together and locally bypassed; isolation prevents cross-rail noise coupling during high di/dt transients.
EN1, EN2, EN3	Configurable enable/GPIO pins	Programmable as regulator enables or GPIOs; support synchronized power sequencing with external devices (e.g., SoC reset, load switches).
SDA, SCL, nINT, NRST	Digital interface & control	I²C bidirectional data/clock, open-drain interrupt, and active-low reset-compatible with 1.65–5.5 V logic levels and 3.4 MHz timing.
PGOOD	Power-good status output	Open-drain signal indicating all enabled rails are within ±2% (or ±20 mV) of target voltage; configurable debounce (4 µs–13 ms).

Key Features

Feature	Design Value
Configurable 2-phase dual-rail topology	Enables independent voltage domains (e.g., 1.0 V CPU + 1.8 V I/O) with interleaved phases per rail-reducing input capacitance requirements by ~50% vs. single-phase.
Programmable output slew rate (0.47–10 mV/µs)	Minimizes inrush current and output overshoot during startup/voltage transitions; critical for protecting sensitive SoC core logic.
Integrated current measurement (20 mA LSB)	Eliminates need for external sense resistors; provides real-time load monitoring up to 20.47 A with <10% accuracy above 1 A-supports dynamic power budgeting.
Phase shedding & auto PWM/PFM mode switching	Maintains >80% efficiency down to 100 mA per rail (2-phase) and >70% at 10 mA (1-phase), extending battery life in always-on automotive modules.
Automotive qualification (AEC-Q100 Grade 1)	Validated for –40°C to +125°C ambient operation, HBM ±2 kV, CDM ±500 V-meets functional safety requirements for infotainment and ADAS ECUs.

Applications

Infotainment Processor Core Supply	ADAS Radar SoC I/O & Memory Rails
Use Scenario: Powering ARM Cortex-A7x or Qualcomm SA8155P application processor cores requiring dynamically scaled 0.8–1.2 V rails with fast transient response. IC Role / Device Role / Timing Role: Dual 2-phase buck controller delivering 8 A @ 1.0 V (Rail A) and 8 A @ 1.1 V (Rail B) with synchronized soft-start and I²C-controlled DVFS. Use Value: Phase interleaving reduces output ripple to <6 mV_p-p, enabling smaller ceramic output caps (22 µF/phase) and meeting SoC voltage tolerance specs without additional LDO post-regulation.	Use Scenario: Supplying 1.8 V I/O and 3.3 V memory interfaces for TI AWR2944 or NXP S32R45 radar processors in compact front-bumper modules. IC Role / Device Role / Timing Role: Independent 2-phase regulation per rail with remote sensing (FB+/FB−) compensating for PCB IR drop between converter and SoC ball grid array. Use Value: Maintains ±1% output accuracy at point-of-load despite 150 mΩ trace resistance, eliminating need for costly 4-layer routing or external compensation networks.
Automotive Digital Cluster Display	Camera ISP Power Management
Use Scenario: Generating multiple low-noise rails (1.0 V GPU, 1.2 V DDR, 3.3 V interface) for high-resolution TFT-LCD clusters with strict EMI limits. IC Role / Device Role / Timing Role: Two 2-phase rails operating at 2 MHz with spread-spectrum modulation; EN1/EN2 sequenced to align with display controller power-up timing. Use Value: Spread spectrum reduces peak EMI by 10 dB at 100 MHz, enabling compliance with CISPR-25 Class 5 without ferrite beads or shielded inductors.	Use Scenario: Powering Sony IMX570 or ON Semiconductor AR0820 image signal processors in surround-view camera modules with thermal constraints. IC Role / Device Role / Timing Role: Dual 2-phase regulation with thermal warning (125°C) and shutdown (140°C) protecting against enclosure overheating during summer operation. Use Value: On-die temperature monitoring triggers early warning interrupts before ISP throttling occurs, preserving video frame rate stability in hot environments.

Infotainment Processor Core Supply

ADAS Radar SoC I/O & Memory Rails

Use Scenario: Powering ARM Cortex-A7x or Qualcomm SA8155P application processor cores requiring dynamically scaled 0.8–1.2 V rails with fast transient response.

IC Role / Device Role / Timing Role: Dual 2-phase buck controller delivering 8 A @ 1.0 V (Rail A) and 8 A @ 1.1 V (Rail B) with synchronized soft-start and I²C-controlled DVFS.

Use Value: Phase interleaving reduces output ripple to <6 mV_p-p, enabling smaller ceramic output caps (22 µF/phase) and meeting SoC voltage tolerance specs without additional LDO post-regulation.

Use Scenario: Supplying 1.8 V I/O and 3.3 V memory interfaces for TI AWR2944 or NXP S32R45 radar processors in compact front-bumper modules.

IC Role / Device Role / Timing Role: Independent 2-phase regulation per rail with remote sensing (FB+/FB−) compensating for PCB IR drop between converter and SoC ball grid array.

Use Value: Maintains ±1% output accuracy at point-of-load despite 150 mΩ trace resistance, eliminating need for costly 4-layer routing or external compensation networks.

Automotive Digital Cluster Display

Camera ISP Power Management

Use Scenario: Generating multiple low-noise rails (1.0 V GPU, 1.2 V DDR, 3.3 V interface) for high-resolution TFT-LCD clusters with strict EMI limits.

IC Role / Device Role / Timing Role: Two 2-phase rails operating at 2 MHz with spread-spectrum modulation; EN1/EN2 sequenced to align with display controller power-up timing.

Use Value: Spread spectrum reduces peak EMI by 10 dB at 100 MHz, enabling compliance with CISPR-25 Class 5 without ferrite beads or shielded inductors.

Use Scenario: Powering Sony IMX570 or ON Semiconductor AR0820 image signal processors in surround-view camera modules with thermal constraints.

IC Role / Device Role / Timing Role: Dual 2-phase regulation with thermal warning (125°C) and shutdown (140°C) protecting against enclosure overheating during summer operation.

Use Value: On-die temperature monitoring triggers early warning interrupts before ISP throttling occurs, preserving video frame rate stability in hot environments.

Equivalent & Alternatives

The following parts are listed as comparable options for similar multi-phase buck converter applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
LP87564URNFRQ1	Four independent 1-phase outputs (vs. LP87565URNFRQ1's two 2-phase rails); no phase interleaving per rail; higher per-rail ripple.	Better suited for distributed loads (e.g., separate sensors, CAN transceivers) requiring isolated voltage domains rather than high-current SoC rails.	Select LP87564URNFRQ1 when independent control of four low-current rails (<4 A each) is needed, not when minimizing ripple on high-current rails is critical.
TPS65917B1ZWSRQ1	Integrated PMIC with 4 buck + 5 LDO + charger; lower max buck current (3 A/rail); fixed 2.2 MHz switching; no programmable slew rate or remote sensing.	Targeted at entry-level infotainment with mixed analog/digital/USB power needs-not optimized for high-current, low-ripple SoC core supplies.	Choose TPS65917B1ZWSRQ1 for cost-sensitive designs needing integrated battery charging and LDOs, not for performance-critical 8-A SoC rails.

Compared with LP87564URNFRQ1 and TPS65917B1ZWSRQ1, the LP87565URNFRQ1 uniquely delivers dual 2-phase operation-providing superior ripple suppression, higher per-rail current capability, and precise slew control essential for next-generation automotive processors, while maintaining pin-compatible packaging and identical I²C register mapping within the LP8756x-Q1 family.

Availability

LP87565URNFRQ1 is available at Aetrix Electronics and suitable for automotive infotainment, ADAS radar, digital cluster, and camera module designs requiring stable component supply, AEC-Q100 compliance, and long-term production continuity.

Supply support for LP87565URNFRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive ICs, with decades of experience in power management solutions for safety-critical systems.

The LP8756x-Q1 product line was designed specifically for automotive SoC power delivery-addressing the high-efficiency, low-noise, and functional-safety requirements of infotainment, cluster, radar, and camera applications.

FAQ

What is the maximum output current per rail for LP87565URNFRQ1?

The LP87565URNFRQ1 supports two independent 2-phase buck rails, each capable of delivering up to 8 A continuous output current (16 A total). This rating assumes VIN ≥3 V and proper thermal management per TI SNVSB22 datasheet Section 7.5. At 2.8 V ≤VIN < 3 V, the maximum per-rail current drops to 6 A. The LP87565URNFRQ1 achieves this using integrated 29–65 mΩ high-side and 17–35 mΩ low-side FETs with phase interleaving to distribute thermal load.

How does LP87565URNFRQ1 differ from other LP8756x-Q1 variants like LP87562-Q1 or LP87564-Q1?

The LP87565URNFRQ1 is uniquely configured for two 2-phase outputs, whereas LP87562-Q1 supports one 3-phase + one 1-phase output and LP87564-Q1 provides four independent 1-phase outputs. This structural difference directly impacts ripple reduction, current sharing, and PCB layout-LP87565URNFRQ1's interleaved 2-phase per rail cuts input RMS current by ~30% versus LP87564-Q1's 1-phase rails, reducing input capacitor stress and EMI.

Does LP87565URNFRQ1 support remote voltage sensing, and how is it implemented?

Yes, LP87565URNFRQ1 supports true remote differential voltage sensing on both 2-phase rails. For Rail A (BUCK0/BUCK1), FB_B0 and FB_B1 serve as positive and negative sense inputs; for Rail B (BUCK2/BUCK3), FB_B2 and FB_B3 perform the same function. This compensates for IR drop between the regulator output and point-of-load, maintaining ±1% regulation accuracy even with 150 mΩ PCB trace resistance-critical for high-current automotive SoC applications.

What I²C speeds and timing modes does LP87565URNFRQ1 support?

The LP87565URNFRQ1 supports all standard I²C modes: Standard (100 kHz), Fast (400 kHz), Fast+ (1 MHz), and High-Speed (3.4 MHz). Its timing complies with TI SNVSB22 Section 7.6-including tLOW/tHIGH minima, setup/hold times, and rise/fall specifications-even at 3.4 MHz with 100 pF bus capacitance. This enables rapid register writes for dynamic voltage scaling and real-time fault logging in automotive systems.

Can LP87565URNFRQ1 operate without an external clock source?

Yes, LP87565URNFRQ1 operates autonomously using its internal RC oscillator when CLKIN is grounded. External clock synchronization (1–24 MHz) is optional and used primarily to reduce EMI through deterministic switching or align multiple converters. The internal oscillator maintains 2 MHz ±10% accuracy over temperature and voltage, sufficient for most automotive power rails where tight frequency tolerance is not required.

LP87565URNFRQ1 Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: -

Package/Case:: 26-PowerVFQFN

Packaging:: Tape & Reel (TR)

Product Status:: Active

Function:: Step-Down

Output Configuration:: Positive

Topology:: Buck

Output Type:: Adjustable

Number of Outputs:: 2

Voltage - Input (Min):: 2.8V

Voltage - Input (Max):: 5.5V

Voltage - Output (Min/Fixed):: 0.6V

Voltage - Output (Max):: 3.36V

Current - Output:: 16A

Frequency - Switching:: 2MHz

Synchronous Rectifier:: Yes

Operating Temperature:: -40°C ~ 125°C (TA)

Grade:: Automotive

Qualification:: AEC-Q100

Mounting Type:: Surface Mount, Wettable Flank

Supplier Device Package:: 26-VQFN-HR (4.5x4)

LP87565URNFRQ1 FAQ

1.How can I place an order for LP87565URNFRQ1 through Aetrix?

Please submit a Request for Quotation (RFQ) for LP87565URNFRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LP87565URNFRQ1 reliable?

The price and inventory of LP87565URNFRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP87565URNFRQ1 is usually 5 days.

3.What payment methods are accepted for LP87565URNFRQ1?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP87565URNFRQ1 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LP87565URNFRQ1?

LP87565URNFRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LP87565URNFRQ1 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LP87565URNFRQ1?

For technical support, including LP87565URNFRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP87565URNFRQ1 requirements.

6.How does Aetrix verify that LP87565URNFRQ1 is sourced from the original manufacturer or authorized distributors?

All LP87565URNFRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP87565URNFRQ1 meets industry standards.

7.What is the process for return or replacement of LP87565URNFRQ1?

All LP87565URNFRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with LP87565URNFRQ1, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LP87565URNFRQ1 part is unused and in its original packaging.

Return procedure for LP87565URNFRQ1:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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