NXP Semiconductors LPC1112FHN24/202,1
- Part No.:
- LPC1112FHN24/202,1
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
LPC1112FHN24/202,1.pdf
- Description:
- IC MCU 32BIT 16KB FLASH 24HVQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC1112FHN24/202 from NXP Semiconductors is a 32-bit ARM Cortex-M0 microcontroller in a 24-pin HVQFN package, featuring 16 kB flash, 4 kB SRAM, one UART with RS-485 support, one I²C-bus interface (Fast-mode Plus), one SPI, four timers, and a 10-bit ADC with six input channels - deployed in lighting control and alarm systems where compact size and low-power operation are critical.
For engineers reviewing the LPC1112FHN24/202 datasheet, LPC1112FHN24/202 pinout, LPC1112FHN24/202 application, or LPC1112FHN24/202 equivalent, this page delivers verified specifications, validated pin functions, real-world use cases, and technically grounded alternative options for embedded design and BOM optimization.
Technical Context
The LPC1112FHN24/202 implements the ARM Cortex-M0 core with NVIC and system tick timer, operating at up to 50 MHz using internal 12 MHz RC oscillator (±1 %) or external crystal (1–25 MHz). It integrates a programmable windowed watchdog timer and power management unit supporting Sleep, Deep-sleep, and Deep power-down modes.
Its peripheral set includes UART with fractional baud rate generation and FIFO, I²C-bus supporting 1 Mbit/s Fast-mode Plus, one SPI controller with SSP features, four general-purpose timers (two 32-bit, two 16-bit), and a 10-bit ADC multiplexed across six pins - all mapped to 19 GPIOs in the HVQFN24 package with configurable pull-up/pull-down and open-drain capability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M0, 32-bit RISC, up to 50 MHz operation - enables efficient C/C++ code execution and interrupt latency under 12 cycles. |
| Memory | 16 kB on-chip flash, 4 kB SRAM - sufficient for firmware with moderate RTOS or protocol stack integration. |
| ADC | 10-bit SAR ADC with 6 input channels - supports analog sensing in lighting dimming or sensor monitoring without external mux. |
| Serial Interfaces | 1 UART (RS-485 capable), 1 I²C (Fast-mode Plus, 1 Mbit/s), 1 SPI - enables multi-node industrial communication and sensor interfacing. |
| Timers | Four general-purpose timers: two 32-bit, two 16-bit, with match/capture - suitable for PWM generation, pulse counting, and time-critical event handling. |
| GPIO | 19 configurable I/O pins with pull-up/pull-down and open-drain mode - fits space-constrained PCB layouts while retaining peripheral flexibility. |
| Package | HVQFN24, 4 × 4 × 0.85 mm, 24 terminals - provides thermal efficiency and board-area savings over SO20/TSSOP20 alternatives. |
Pinout & Package
HVQFN24 package: plastic thermal enhanced very thin quad flat package, no leads, 24 terminals, body size 4 × 4 × 0.85 mm (SOT616-3).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Power supply | Single 1.8 V to 3.6 V supply rail; decoupling required per datasheet layout guidelines. |
| VSS | Ground | Dedicated ground terminal; must be connected to low-impedance PCB ground plane. |
| RESET/PIO0_0 | Reset input / GPIO | Active-low reset with internal pull-up; also serves as general-purpose I/O with interrupt capability. |
| XTALIN | Clock input | Accepts external crystal (1–25 MHz) or clock source for precise timing reference. |
| SWDIO/PIO1_3/AD4/CT32B1_MAT2 | Debug / GPIO / ADC / Timer | Multi-function pin supporting Serial Wire Debug, analog input, and timer match output - requires careful signal routing. |
| SWCLK/PIO0_10/SCK0/CT16B0_MAT2 | Debug clock / GPIO / SPI / Timer | Shared debug clock, SPI clock, and timer match output - enables in-circuit programming and synchronous peripheral control. |
| PIO0_7/CTS | UART clear-to-send | Hardware flow control input for UART; used only when RS-485 half-duplex handshake is implemented. |
| PIO1_6/RXD/CT32B0_MAT0 | UART receive / Timer | Primary UART data input; also configurable as 32-bit timer match output for precise waveform generation. |
| PIO1_7/TXD/CT32B0_MAT1 | UART transmit / Timer | Primary UART data output; doubles as 32-bit timer match output for dual-purpose signal timing. |
| PIO0_4/SCL | I²C clock | Open-drain I²C bus clock line; requires external pull-up resistor (typically 2.2 kΩ). |
| PIO0_5/SDA | I²C data | Open-drain I²C bus data line; shares same pull-up requirement as SCL for proper bus arbitration. |
| PIO0_2/SSEL0/CT16B0_CAP0 | SPI slave select / Timer capture | Active-low SPI chip select; also captures external events via 16-bit timer for timestamping or frequency measurement. |
| PIO0_9/MOSI0/CT16B0_MAT1 | SPI master out / Timer | SPI data output line; simultaneously usable as 16-bit timer match output for synchronized peripheral control. |
| PIO0_8/MISO0/CT16B0_MAT0 | SPI master in / Timer | SPI data input line; also functions as 16-bit timer match output for feedback or gating logic. |
| PIO1_4/AD5/CT32B1_MAT3/WAKEUP | ADC input / Timer / Wake-up | Analog input channel 5; also serves as wake-up source from Deep-sleep mode and 32-bit timer match output. |
Key Features
| Feature | Design Value |
|---|---|
| Power profiles in boot ROM | One function call optimizes performance vs. power consumption - eliminates manual register configuration for Sleep/Deep-sleep modes. |
| Windowed watchdog timer | Prevents runaway code by requiring service within defined time windows - critical for alarm and metering reliability. |
| Configurable open-drain mode | Enables direct I²C-bus or 1-wire interface without external level shifters - reduces component count in sensor nodes. |
| High-current GPIO drivers | 20 mA sink capability on I²C pins supports direct LED driving or relay control - avoids discrete driver ICs in simple loads. |
| UART with RS-485 support | Integrated polarity control and direction management - simplifies half-duplex bus transceiver design in lighting networks. |
Applications
| Lighting Control | Alarm System Interface |
|---|---|
Use Scenario: Dimmable LED driver with DALI or 0–10 V analog interface in commercial fixtures. IC Role / Device Role / Timing Role: Main controller executing PWM dimming algorithms, reading ambient light sensors, and managing communication protocols. Use Value: 19 GPIOs accommodate multiple sensor inputs and driver outputs; 10-bit ADC resolves fine-grained brightness adjustments. |
Use Scenario: Zone monitoring panel with door/window contact inputs, siren control, and keypad scanning. IC Role / Device Role / Timing Role: Central security processor handling interrupt-driven contact detection, buzzer timing, and serial keypad polling. Use Value: Windowed WDT ensures fail-safe behavior during intrusion events; low-power Deep-sleep extends battery life in wireless sensors. |
| eMetering Front-End | White Goods Motor Control |
Use Scenario: Smart electricity meter with pulse counting, tamper detection, and optical IR communication. IC Role / Device Role / Timing Role: Data acquisition and communication co-processor interfacing with metrology IC and IR transceiver. Use Value: UART with fractional baud rate supports legacy IR protocols; 16 kB flash hosts secure bootloader and firmware updates. |
Use Scenario: Fan speed controller in refrigerator or HVAC unit using hall-effect feedback and PWM drive. IC Role / Device Role / Timing Role: Dedicated motor timing engine generating precise PWM signals and capturing hall sensor edges. Use Value: Four timers with capture inputs enable accurate commutation timing; open-drain GPIOs simplify optocoupler isolation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC1111FHN33/202 | Same LPC1100L series, 8 kB flash, 4 kB SRAM, HVQFN33 (33-pin) package. | Fits designs needing identical peripherals but lower memory footprint and larger package for easier hand-soldering. | Select when firmware size is under 8 kB and PCB layout allows 7×7 mm footprint. |
| LPC1112FDH20/102 | Same 16 kB flash/4 kB SRAM, TSSOP20 package (20-pin, 4.4 mm width), no XTALOUT pin. | Better suited for through-hole prototyping or legacy SOIC-compatible footprints; lacks crystal output buffer. | Choose for cost-sensitive, low-complexity boards where 16 GPIOs suffice and crystal oscillator buffering is unnecessary. |
Compared with LPC1112FHN24/202, the LPC1111FHN33/202 offers reduced flash but greater pin count for expanded I/O, while the LPC1112FDH20/102 trades miniaturization for manufacturability and simplified clocking - enabling trade-offs between density, debug access, and assembly process.
Availability
LPC1112FHN24/202 is available at Aetrix Electronics and suitable for lighting control, alarm systems, and eMetering applications requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for LPC1112FHN24/202 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with headquarters in Eindhoven, Netherlands.
The LPC1100L series - including LPC1112FHN24/202 - was designed for cost-sensitive, low-power embedded applications such as smart lighting, security panels, and utility metering, emphasizing minimal BOM count and energy-efficient operation.
FAQ
What is the maximum operating frequency of the LPC1112FHN24/202?
The LPC1112FHN24/202 operates at CPU frequencies of up to 50 MHz, achievable using either the internal 12 MHz RC oscillator (trimmed to ±1 % accuracy) or an external crystal oscillator in the 1 MHz to 25 MHz range. The PLL enables scaling to the full 50 MHz without requiring a high-frequency crystal, making it suitable for timing-critical applications like motor control and communication protocols.
Does the LPC1112FHN24/202 support I²C Fast-mode Plus?
Yes, the LPC1112FHN24/202 includes an I²C-bus interface compliant with Fast-mode Plus specifications, supporting data rates up to 1 Mbit/s. This capability is confirmed for the LPC1100L series in the official datasheet and enables faster sensor communication compared to standard I²C, especially in lighting and alarm systems with multiple peripheral nodes.
How many ADC input channels does the LPC1112FHN24/202 provide?
The LPC1112FHN24/202 features a 10-bit ADC with multiplexing across six input pins (AD0–AD5), as specified in Table 2 of the datasheet for the HVQFN24 variant. This matches the pin count and peripheral mapping of the LPC1112FHN24/202 package, enabling simultaneous analog sensing for temperature, light, or voltage monitoring without external multiplexers.
Is the LPC1112FHN24/202 pin-compatible with other LPC111x HVQFN packages?
No, the LPC1112FHN24/202 is not pin-compatible with HVQFN33 variants (e.g., LPC1112FHN33/202) due to differing pin counts (24 vs. 33) and distinct signal allocations - notably, XTALOUT is omitted in the HVQFN24 package per Figure 11 and block diagram notes. Pin mappings must be verified against Table 6 and Figure 11 in the datasheet for accurate layout design.
What power-saving modes are supported by the LPC1112FHN24/202?
The LPC1112FHN24/202 supports three reduced-power modes: Sleep, Deep-sleep, and Deep power-down. It includes a Power Management Unit (PMU) and power profiles stored in boot ROM, allowing single-function calls to optimize current draw. Wake-up from Deep-sleep is possible via up to 13 functional pins, including PIO1_4/AD5/WAKEUP, making it ideal for battery-powered alarm sensors and metering endpoints.
LPC1112FHN24/202,1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 24-VFQFN Exposed Pad
- Series:
- LPC1100L
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0
- Core Size:
- 32-Bit Single-Core
- Speed:
- 50MHz
- Connectivity:
- I2C, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, WDT
- Number of I/O:
- 19
- Program Memory Size:
- 16KB (16K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 2K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 6x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC1112FHN24/202,1 FAQ
1.How can I place an order for LPC1112FHN24/202,1 through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC1112FHN24/202,1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC1112FHN24/202,1 reliable?
The price and inventory of LPC1112FHN24/202,1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC1112FHN24/202,1 is usually 5 days.
3.What payment methods are accepted for LPC1112FHN24/202,1?
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Once your LPC1112FHN24/202,1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC1112FHN24/202,1?
For technical support, including LPC1112FHN24/202,1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC1112FHN24/202,1 requirements.
6.How does Aetrix verify that LPC1112FHN24/202,1 is sourced from the original manufacturer or authorized distributors?
All LPC1112FHN24/202,1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC1112FHN24/202,1 meets industry standards.
7.What is the process for return or replacement of LPC1112FHN24/202,1?
All LPC1112FHN24/202,1 units undergo pre-shipment inspection (PSI). If there is an issue with LPC1112FHN24/202,1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC1112FHN24/202,1 part is unused and in its original packaging.
Return procedure for LPC1112FHN24/202,1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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