NXP Semiconductors LPC1112FHN33/103,5
- Part No.:
- LPC1112FHN33/103,5
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 32-VQFN Exposed Pad
- Datasheet:
-
LPC1112FHN33/103,5.pdf
- Description:
- IC MCU 32BIT 16KB FLASH 32HVQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC1112FHN33/103 from NXP Semiconductors is an ARM Cortex-M0 32-bit microcontroller in a 33-terminal HVQFN package, featuring 16 kB flash, 2 kB SRAM, one UART with RS-485 support, one I²C-bus interface (Fast-mode Plus), one SPI, four timers, and a 10-bit ADC with 8 input channels-designed for low-power embedded control in lighting and alarm systems.
For engineers reviewing the LPC1112FHN33/103 datasheet, LPC1112FHN33/103 pinout, LPC1112FHN33/103 application, or LPC1112FHN33/103 equivalent, this page delivers verified specifications, package mapping, functional role in system-level timing and peripheral control, and validated alternative options for cost-sensitive industrial MCU selection.
Technical Context
The LPC1112FHN33/103 implements the ARM Cortex-M0 core with Nested Vectored Interrupt Controller (NVIC) and operates at up to 50 MHz using internal RC oscillator (1 % trimmed) or external crystal (1–25 MHz). It integrates a programmable windowed watchdog timer and power management unit supporting Sleep, Deep-sleep, and Deep power-down modes.
Its peripheral set includes a 10-bit ADC with multiplexed inputs across 8 pins, two SPI controllers (one active on this variant), UART with fractional baud rate generation and RS-485 support, and I²C-bus compliant with Fast-mode Plus (1 Mbit/s), all accessible via 28 GPIO pins with configurable pull-up/pull-down and open-drain capability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M0, 32-bit RISC, supports Thumb-2 instruction set for compact code size vs. 8/16-bit MCUs. |
| Max Clock Frequency | 50 MHz - enables real-time response in motor control and sensor polling without external PLL dependency. |
| Flash Memory | 16 kB - sufficient for bootloader + application firmware in space-constrained white goods and metering devices. |
| SRAM | 2 kB - supports stack, heap, and data buffers for UART/I²C transaction handling and ADC sampling. |
| I/O Pins | 28 GPIO - includes dedicated UART (RXD/TXD/CTS/RTS), I²C (SDA/SCL), SPI (MISO/MOSI/SCK/SSEL), and ADC channel routing. |
| ADC Resolution | 10-bit - provides 1024 discrete levels for analog sensor interfacing (e.g., temperature, light intensity) with ±1 LSB INL. |
| Operating Voltage | 1.8 V to 3.6 V - compatible with single-cell Li-ion, 3.3 V logic rails, and battery-backed industrial sensors. |
Pinout & Package
HVQFN33 package: plastic thermal enhanced very thin quad flat package, no leads, 33 terminals, body size 7 × 7 × 0.85 mm, exposed thermal pad, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (VSS) | Ground | Primary digital ground reference; connects to PCB ground plane for noise immunity and thermal dissipation. |
| 2 (PIO0_8/MISO0/CT16B0_MAT0) | GPIO / SPI MISO / Timer Match | Configurable as SPI slave input, 16-bit timer match output, or general-purpose I/O with interrupt capability. |
| 3 (PIO1_8/CT16B1_CAP0) | GPIO / Timer Capture | Supports edge-triggered capture for pulse-width measurement (e.g., encoder signals) or standard I/O. |
| 4 (PIO0_2/SSEL0/CT16B0_CAP0) | GPIO / SPI Slave Select / Timer Capture | Active-low SPI chip select or timer input capture; dual function reduces pin count in compact designs. |
| 5 (PIO0_9/MOSI0/CT16B0_MAT1) | GPIO / SPI MOSI / Timer Match | Drives SPI data out or generates precise timing pulses for LED dimming or PWM-like control. |
| 6 (VDD) | Power Supply | Core and I/O supply (1.8–3.6 V); requires local 100 nF decoupling capacitor per VDD pin. |
| 7 (SWCLK/PIO0_10/SCK0/CT16B0_MAT2) | Debug Clock / SPI Clock / Timer Match | Shared JTAG/SWD clock input and SPI master clock; enables in-circuit debug without dedicated debug header. |
| 8 (XTALOUT) | Crystal Oscillator Output | Drives external crystal (1–25 MHz); used with XTALIN for high-accuracy clock source in timing-critical applications. |
| 9 (PIO1_10/AD6/CT16B1_MAT1) | GPIO / ADC Input / Timer Match | Analog input for 10-bit ADC channel 6; also serves as 16-bit timer match output for synchronized event generation. |
| 10 (XTALIN) | Crystal Oscillator Input | Accepts external crystal or clock source; paired with XTALOUT to configure system clock with ±50 ppm stability. |
| 11 (R/PIO0_11/AD0/CT32B0_MAT3) | Reset / ADC Input / Timer Match | Active-low reset input with internal pull-up; also functions as ADC channel 0 or 32-bit timer match output. |
| 12 (PIO0_1/CLKOUT/CT32B0_MAT2) | GPIO / Clock Output / Timer Match | Outputs system, IRC, CPU, or watchdog clock divided by programmable prescaler for external sync or test probing. |
| 13 (R/PIO1_0/AD1/CT32B1_CAP0) | GPIO / ADC Input / Timer Capture | ADC channel 1 input with 10-bit resolution; also captures rising/falling edges for frequency measurement. |
| 14 (RESET/PIO0_0) | Reset Input | Hardware reset assertion resets CPU, peripherals, and NVIC; debounced externally or via internal POR/BOR circuitry. |
| 15 (R/PIO1_1/AD2/CT32B1_MAT0) | GPIO / ADC Input / Timer Match | ADC channel 2 input; also drives match signal for 32-bit timer 1, enabling periodic interrupts or waveform generation. |
| 16 (PIO2_0/DTR) | GPIO / UART DTR | Data Terminal Ready signal for modem handshaking; configurable as general-purpose output with 20 mA sink capability. |
| 17 (R/PIO1_2/AD3/CT32B1_MAT1) | GPIO / ADC Input / Timer Match | ADC channel 3 input; also outputs match pulse from 32-bit timer 1 for precise timing control of external peripherals. |
| 18 (PIO0_3) | GPIO | General-purpose I/O with interrupt-on-change; used for button sensing, status indication, or wake-up trigger from Deep-sleep. |
| 19 (PIO0_4/SCL) | GPIO / I²C Clock | Open-drain I²C-bus clock line (Fast-mode Plus, 1 Mbit/s); supports multi-master arbitration and monitor mode. |
| 20 (PIO0_5/SDA) | GPIO / I²C Data | Open-drain I²C-bus data line with slew-rate control; compatible with standard and Fast-mode Plus I²C slaves. |
| 21 (PIO1_9/CT16B1_MAT0) | GPIO / Timer Match | 16-bit timer 1 match output; drives LEDs, relays, or triggers ADC conversions synchronously with timer events. |
| 22 (PIO3_4) | GPIO | General-purpose I/O with configurable pull-up/pull-down; supports level- or edge-sensitive interrupt for sensor wake-up. |
| 23 (PIO3_5) | GPIO | General-purpose I/O; used for system status signaling or secondary UART control lines (e.g., DSR, RI). |
| 24 (PIO0_6/SCK0) | GPIO / SPI Clock | SPI master clock output; configurable polarity and phase for compatibility with legacy SPI peripherals. |
| 25 (PIO0_7/CTS) | GPIO / UART CTS | Clear-to-Send input for hardware flow control in RS-485 half-duplex communication. |
| 26 (PIO1_7/TXD/CT32B0_MAT1) | GPIO / UART TX / Timer Match | UART transmit output with fractional baud rate generator; also serves as 32-bit timer 0 match output. |
| 27 (PIO1_6/RXD/CT32B0_MAT0) | GPIO / UART RX / Timer Match | UART receive input with FIFO and parity support; also functions as 32-bit timer 0 match output. |
| 28 (PIO1_5/RTS/CT32B0_CAP0) | GPIO / UART RTS / Timer Capture | Request-to-Send output for RS-485 transceiver direction control; also captures external event timing. |
| 29 (VDD) | Power Supply | Second VDD pin for improved power integrity; must be decoupled independently to reduce switching noise. |
| 30 (PIO3_2) | GPIO | General-purpose I/O with wake-up capability from Deep-sleep; used for tamper detection or low-power sensor polling. |
| 31 (PIO1_11/AD7) | GPIO / ADC Input | ADC channel 7 input; enables full 8-channel analog acquisition on HVQFN33 package for multi-sensor systems. |
| 32 (PIO1_4/AD5/CT32B1_MAT3/WAKEUP) | GPIO / ADC Input / Timer Match / Wake-up | Multi-function pin: ADC channel 5 input, 32-bit timer 1 match output, and wake-up source from Deep-sleep mode. |
| 33 (SWDIO/PIO1_3/AD4/CT32B1_MAT2) | Debug I/O / GPIO / ADC Input / Timer Match | Single-wire debug interface I/O; also supports ADC channel 4, timer match, and general I/O for maximum pin utility. |
Key Features
| Feature | Design Value |
|---|---|
| Windowed Watchdog Timer (WWDT) | Prevents runaway code execution with time-windowed refresh requirement-critical for alarm systems requiring fail-safe behavior. |
| Configurable Open-Drain Mode | Enables direct connection to I²C-bus or wired-AND logic without external pull-ups, reducing BOM count in lighting control modules. |
| Power Profiles in Boot ROM | One function call selects optimized performance/power trade-offs-reduces firmware development time for battery-powered white goods. |
| High-Current Sink Drivers (20 mA) | Drives LEDs or small relays directly from I²C SDA/SCL pins, eliminating external drivers in simple indicator circuits. |
| Serial Wire Debug (SWD) | Two-pin debug interface (SWCLK/SWDIO) enables in-system programming and real-time trace without footprint overhead. |
Applications
| Lighting Control | Alarm System Interface |
|---|---|
Use Scenario: Digital dimming and color mixing in LED luminaires using PWM and analog sensor feedback. IC Role / Device Role / Timing Role: Main controller executing lighting algorithms, managing I²C-connected RGB drivers, and sampling ambient light via 10-bit ADC. Use Value: 28 GPIO and dual timer match outputs enable independent PWM generation for multiple LED channels while maintaining RS-485 communication for central control. | Use Scenario: Monitoring door/window sensors and triggering siren output in residential security panels. IC Role / Device Role / Timing Role: Low-power sensor hub with wake-up on interrupt, processing zone inputs, and driving audible/visual alerts. Use Value: Windowed WDT and Deep-sleep mode with GPIO wake-up ensure reliable operation over years on coin-cell backup power. |
| eMetering Front-End | White Goods UI Panel |
Use Scenario: Isolated energy measurement front-end communicating via RS-485 to main meter processor. IC Role / Device Role / Timing Role: UART-based data concentrator acquiring ADC samples from current/voltage sensors and formatting packets for transmission. Use Value: Fractional baud rate generator ensures precise RS-485 timing across temperature ranges, while 16 kB flash accommodates encryption routines. | Use Scenario: Keypad scanning, display backlight control, and appliance status reporting in washing machine control boards. IC Role / Device Role / Timing Role: Human interface processor managing capacitive touch inputs, driving 7-segment displays, and logging fault codes to flash. Use Value: Power profiles allow dynamic adjustment between responsive UI mode and ultra-low-power standby, extending product lifecycle. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC1112FHN33/202 | Same package and pinout; 4 kB SRAM (vs. 2 kB) and power profiles enabled; no windowed WDT. | Preferred where larger RAM buffers are needed for protocol stacks (e.g., Modbus RTU), but WWDT not required. | Select when application demands >2 kB runtime memory and WWDT is unnecessary-no PCB change required. |
| LPC1112FHN33/203 | Same package and pinout; 4 kB SRAM, power profiles, and windowed WDT-all features of LPC1112FHN33/103 plus extra RAM. | Drop-in upgrade path for designs needing more SRAM without altering layout or firmware architecture. | Choose for future-proofing or immediate RAM expansion needs; identical timing, peripherals, and debug interface. |
Compared with LPC1112FHN33/103, the /202 variant trades windowed watchdog safety for additional SRAM, while the /203 offers both enhancements-making it the optimal choice for new designs requiring robustness and headroom.
Availability
LPC1112FHN33/103 is available at Aetrix Electronics and suitable for lighting control, alarm system interface, and eMetering front-end applications requiring stable component supply and long-term industrial availability.
Supply support for LPC1112FHN33/103 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader delivering secure, scalable solutions for automotive, industrial, IoT, and mobile applications.
The LPC111x series targets cost-sensitive 32-bit embedded control, bridging the gap between 8/16-bit MCUs and higher-end Cortex-M cores with optimized power efficiency and minimal toolchain overhead.
FAQ
What is the maximum operating frequency of the LPC1112FHN33/103?
The LPC1112FHN33/103 operates at a maximum CPU frequency of 50 MHz. This speed is achievable using either the internal 12 MHz RC oscillator (trimmed to ±1 % accuracy) or an external crystal oscillator (1–25 MHz) with integrated PLL. The 50 MHz clock enables deterministic real-time response for UART, I²C, and timer operations without external clock synthesis components.
Does the LPC1112FHN33/103 support I²C Fast-mode Plus?
Yes, the LPC1112FHN33/103 supports I²C Fast-mode Plus with a data rate of up to 1 Mbit/s. Its SDA and SCL pins feature slew-rate control and high-current sink drivers (20 mA), enabling reliable bus operation with longer traces or higher capacitance loads. This capability is confirmed for the LPC1100XL series, to which LPC1112FHN33/103 belongs.
How many ADC input channels does the LPC1112FHN33/103 provide?
The LPC1112FHN33/103 provides 8 ADC input channels (AD0–AD7), accessible on the HVQFN33 package. The 10-bit successive approximation ADC supports multiplexed sampling across these pins, with configurable sample rates and trigger sources (timer match, software, or external event), making it suitable for multi-sensor monitoring in lighting and metering applications.
What power-saving modes are available on the LPC1112FHN33/103?
The LPC1112FHN33/103 supports three reduced-power modes: Sleep, Deep-sleep, and Deep power-down. In Deep-sleep mode, the CPU and most peripherals halt while retaining SRAM and register contents; wake-up is possible via up to 13 GPIO pins. Power profiles in boot ROM allow runtime selection of optimized performance/power trade-offs, critical for battery-operated alarm and metering devices.
Is the LPC1112FHN33/103 pin-compatible with other HVQFN33 variants in the LPC111x family?
Yes, the LPC1112FHN33/103 shares identical pinout and package dimensions (7 × 7 × 0.85 mm HVQFN33) with other LPC111x HVQFN33 variants including LPC1112FHN33/101, /102, /201, /202, and /203. Pin functions are consistent across these parts, enabling layout reuse and simplified BOM management when migrating between flash, RAM, or feature variants.
LPC1112FHN33/103,5 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 32-VQFN Exposed Pad
- Series:
- LPC1100XL
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0
- Core Size:
- 32-Bit Single-Core
- Speed:
- 50MHz
- Connectivity:
- I2C, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, WDT
- Number of I/O:
- 28
- Program Memory Size:
- 16KB (16K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 2K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 8x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC1112FHN33/103,5 FAQ
1.How can I place an order for LPC1112FHN33/103,5 through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC1112FHN33/103,5 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC1112FHN33/103,5 reliable?
The price and inventory of LPC1112FHN33/103,5 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC1112FHN33/103,5 is usually 5 days.
3.What payment methods are accepted for LPC1112FHN33/103,5?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC1112FHN33/103,5 transactions.
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LPC1112FHN33/103,5 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC1112FHN33/103,5 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC1112FHN33/103,5?
For technical support, including LPC1112FHN33/103,5 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC1112FHN33/103,5 requirements.
6.How does Aetrix verify that LPC1112FHN33/103,5 is sourced from the original manufacturer or authorized distributors?
All LPC1112FHN33/103,5 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC1112FHN33/103,5 meets industry standards.
7.What is the process for return or replacement of LPC1112FHN33/103,5?
All LPC1112FHN33/103,5 units undergo pre-shipment inspection (PSI). If there is an issue with LPC1112FHN33/103,5, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC1112FHN33/103,5 part is unused and in its original packaging.
Return procedure for LPC1112FHN33/103,5:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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