NXP Semiconductors LPC1112LVFHN24/003
- Part No.:
- LPC1112LVFHN24/003
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
LPC1112LVFHN24/003.pdf
- Description:
- IC MCU 32BIT 16KB FLASH 24HVQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC1112LVFHN24/003 from NXP Semiconductors is a 32-bit ARM Cortex-M0 microcontroller operating at up to 50 MHz, featuring 16 kB flash, 2 kB SRAM, an 8-bit ADC with 6-channel input multiplexing, and 20 GPIO pins in HVQFN24 package. It integrates UART, SPI/SSP, Fast-mode Plus I²C (1 Mbit/s), four counter/timers, and supports ultra-low-power Deep-sleep mode (≤1.6 µA) for battery-powered portable electronics.
For engineers reviewing the LPC1112LVFHN24/003 datasheet, LPC1112LVFHN24/003 pinout, LPC1112LVFHN24/003 application, or LPC1112LVFHN24/003 equivalent, key selection criteria include its 1.65–1.95 V single-supply operation, 20 GPIO with configurable pull-up/pull-down and interrupt capability, and validated use in mobile accessories and active cables where compact size and sub-2V logic compatibility are critical.
Technical Context
The LPC1112LVFHN24/003 implements an ARM Cortex-M0 core with integrated NVIC, Serial Wire Debug, and system tick timer. Its memory subsystem includes 16 kB on-chip flash (256-byte page erase) and 2 kB SRAM, both mapped into a fixed AHB/APB peripheral architecture supporting deterministic interrupt latency and accelerated GPIO access via dedicated AHB interface.
Peripherals are tightly coupled to the core: UART uses fractional baud rate generation for precise timing across crystal frequencies ≥2 MHz; I²C supports Fast-mode Plus (1 Mbit/s) with high-current sink drivers on PIO0_4/SCL and PIO0_5/SDA; and the 8-bit ADC operates over 0–VDD range with burst conversion and pin-triggered sampling - all constrained to the HVQFN24 package's 20 usable I/O pins and thermal limits.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M0, 32-bit RISC, up to 50 MHz - enables deterministic real-time control with Thumb-2 instruction set and low code footprint vs. 8/16-bit alternatives. |
| Memory | 16 kB flash / 2 kB SRAM - sufficient for compact firmware with bootloader (ISP/IAP) and minimal runtime data storage in space-constrained designs. |
| ADC | 8-bit SAR, 6-channel input multiplexing, 10 kSamples/s max - supports basic sensor interfacing (e.g., temperature, battery voltage) without external signal conditioning. |
| I²C Interface | Fast-mode Plus compliant, 1 Mbit/s, open-drain with high-current sink on SCL/SDA - ensures robust communication with legacy and high-speed peripherals under 1.8 V supply. |
| Power Supply | 1.65 V to 1.95 V single rail - targets ultra-low-voltage applications such as coin-cell-powered accessories, eliminating level-shifting requirements. |
| Low-Power Modes | Deep-sleep mode ≤1.6 µA with 5 µs wake-up - extends battery life in intermittently active devices like smart cables or wearable sensors. |
| Package | HVQFN24, 4 × 4 × 0.85 mm, 20 I/O terminals - provides compact footprint and thermal enhancement suitable for dense PCB layouts in mobile form factors. |
Pinout & Package
HVQFN24 package (SOT616-3), 4 mm × 4 mm × 0.85 mm body, thermally enhanced no-lead quad flat construction with 24 terminals (20 functional I/O + VDD + VSS + RESET + XTALIN + XTALOUT).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RESET/PIO0_0 | Reset input / General-purpose I/O | Active-low reset with 20 ns glitch filter; dual-role pin allows boot-mode selection via LOW during reset for ISP entry. |
| XTALIN / XTALOUT | Crytal oscillator inputs | Supports 1–25 MHz external crystal; XTALIN accepts ≤1.8 V input, XTALOUT drives external load - enables precise clocking when internal RC (±2.5%) is insufficient. |
| PIO0_4/SCL & PIO0_5/SDA | I²C-bus interface | Open-drain pins with programmable high-current sink for Fast-mode Plus (1 Mbit/s); require external pull-ups - direct interface to I²C sensors and EEPROMs without buffer ICs. |
| PIO0_6/SCK0 & PIO0_8/MISO0 & PIO0_9/MOSI0 | SPI0 interface | Full-duplex 4-wire SPI master/slave capable of 25 Mbit/s (master); supports SSP, Microwire, and TI SSI protocols - interoperable with diverse serial peripherals. |
| PIO1_6/RXD & PIO1_7/TXD | UART interface | Asynchronous serial I/O with fractional baud rate generator - achieves standard rates (e.g., 115200 Bd) from any crystal ≥2 MHz, reducing BOM count. |
| SWDIO/PIO1_3 & SWCLK/PIO0_10 | Serial Wire Debug | 2-pin debug interface for programming and real-time tracing; eliminates JTAG overhead while maintaining full Cortex-M0 visibility during development. |
Key Features
| Feature | Design Value |
|---|---|
| Accelerated GPIO | Dedicated AHB-peripheral GPIO registers enable single-cycle port writes and bit-level manipulation - critical for time-sensitive bit-banging (e.g., WS2812, One-Wire). |
| Configurable I/O | All 20 GPIO support programmable pull-up/pull-down, hysteresis, and open-drain mode (except SCL/SDA which default to open-drain) - simplifies interface to varied logic families and buses. |
| ADC Trigger Flexibility | Conversion can be initiated by GPIO edge, timer match, or software - enables synchronized sampling in sensor fusion or power-monitoring applications. |
| Wake-up from Deep-sleep | 13 GPIO pins double as start logic inputs - allows selective wake-up on external events (e.g., button press, sensor alert) without CPU polling. |
| On-chip Clock Generation | Internal 12 MHz RC oscillator (±2.5% @ -20°C to +85°C), PLL, and watchdog oscillator - eliminates need for external clock sources in cost-sensitive designs. |
Applications
| Mobile Accessories | Active Cables |
|---|---|
Use Scenario: USB-C or Lightning-to-3.5mm adapter with embedded authentication and voltage regulation. IC Role / Device Role / Timing Role: Main controller managing protocol negotiation, ADC-based cable health monitoring, and low-power state transitions. Use Value: 1.65–1.95 V operation matches USB-C VCONN logic levels; 20 GPIO support multiple interface lines and status LEDs within 4×4 mm footprint. |
Use Scenario: High-speed HDMI or DisplayPort cable with built-in signal integrity compensation and EDID emulation. IC Role / Device Role / Timing Role: Embedded manager handling I²C-based EDID read/write, UART diagnostics, and thermal shutdown via ADC. Use Value: Fast-mode Plus I²C (1 Mbit/s) ensures rapid EDID updates; Deep-sleep mode (<1.6 µA) prevents parasitic drain when cable is unconnected. |
| Portable Medical Sensors | Ultra-Low-Power IoT Peripherals |
Use Scenario: Disposable pulse oximeter or glucose meter using coin-cell battery and optical analog front-end. IC Role / Device Role / Timing Role: Signal acquisition controller performing 8-bit ADC sampling, UART telemetry, and sleep/wake scheduling. Use Value: 8-bit ADC with 0–VDD range directly interfaces to op-amp outputs; 5 µs wake-up enables responsive event-driven sensing without continuous power draw. |
Use Scenario: Bluetooth LE beacon or environmental sensor node powered by energy harvesting (e.g., solar cell + supercapacitor). IC Role / Device Role / Timing Role: Power-aware coordinator managing intermittent ADC reads, I²C sensor polling, and radio wake-up triggers. Use Value: Single 1.8 V supply eliminates LDO requirement; programmable watchdog oscillator (9.4 kHz–2.3 MHz) provides flexible timing for duty-cycled operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC1114LVFHN24/103 | 32 kB flash / 4 kB SRAM / same HVQFN24 package / identical peripherals | Supports larger firmware images and more complex state machines; same pinout and voltage range | Select when firmware exceeds 16 kB or requires additional RAM for buffering or protocol stacks. |
| LPC11U12FHN24/201 | USB 2.0 device controller / 16 kB flash / 4 kB SRAM / same HVQFN24 | Enables native USB connectivity (HID, CDC) without external PHY; lacks Fast-mode Plus I²C | Choose for USB-enabled accessories where host enumeration is required and I²C speed ≤400 kHz is acceptable. |
Compared with LPC1112LVFHN24/003, the LPC1114LVFHN24/103 offers scalable memory without layout changes, while the LPC11U12FHN24/201 trades I²C performance for integrated USB - making the LPC1112LVFHN24/003 optimal for cost-sensitive, I²C-centric, sub-2V portable systems requiring minimal footprint.
Availability
LPC1112LVFHN24/003 is available at Aetrix Electronics and suitable for mobile accessories, active cables, and portable medical electronics requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for LPC1112LVFHN24/003 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and consumer applications, with deep expertise in ARM-based microcontrollers and mixed-signal integration.
The LPC111xLV family was designed specifically for ultra-low-voltage, cost-optimized 32-bit replacement of 8/16-bit MCUs in space- and power-constrained portable electronics - emphasizing single-supply operation, compact packaging, and essential peripheral integration.
FAQ
What is the maximum operating frequency of the LPC1112LVFHN24/003?
The LPC1112LVFHN24/003 operates at a maximum CPU frequency of 50 MHz, achievable via its integrated PLL driven by either the internal 12 MHz RC oscillator or an external crystal (1–25 MHz). This frequency is fully supported across the specified 1.65–1.95 V supply range and industrial temperature grade.
Does the LPC1112LVFHN24/003 support USB functionality?
No, the LPC1112LVFHN24/003 does not include a USB controller. It provides UART, SPI/SSP, and Fast-mode Plus I²C for serial communication. For USB-capable variants in the same family, consider the LPC11U12FHN24/201, which integrates a USB 2.0 device controller but omits Fast-mode Plus I²C support.
How many ADC channels does the LPC1112LVFHN24/003 support?
The LPC1112LVFHN24/003 supports 6 ADC input channels, as confirmed for the HVQFN24 package in Table 2 and Section 7.11.1 of the datasheet. These map to pins PIO0_11/AD0 through PIO1_4/AD5, with the 8-channel capability reserved for HVQFN33 variants.
What debug interface is available on the LPC1112LVFHN24/003?
The LPC1112LVFHN24/003 features Serial Wire Debug (SWD) using dedicated SWDIO/PIO1_3 and SWCLK/PIO0_10 pins. This 2-pin interface supports full programming, debugging, and real-time tracing via standard ARM-compliant tools - no JTAG header or additional pins required.
Is the LPC1112LVFHN24/003 pin-compatible with other LPC111xLV HVQFN24 variants?
Yes, the LPC1112LVFHN24/003 shares identical pinout and package (HVQFN24, SOT616-3) with LPC1114LVFHN24/103 and LPC1114LVFHN24/303. All three support the same 20 GPIO assignments, peripheral mappings, and power/ground terminal locations - enabling drop-in memory upgrades during design iteration.
LPC1112LVFHN24/003 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 24-VFQFN Exposed Pad
- Series:
- LPC1100LV
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0
- Core Size:
- 32-Bit Single-Core
- Speed:
- 50MHz
- Connectivity:
- I2C, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, WDT
- Number of I/O:
- 20
- Program Memory Size:
- 16KB (16K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 2K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.65V ~ 1.95V
- Data Converters:
- A/D 6x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC1112LVFHN24/003 FAQ
1.How can I place an order for LPC1112LVFHN24/003 through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC1112LVFHN24/003 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC1112LVFHN24/003 reliable?
The price and inventory of LPC1112LVFHN24/003 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC1112LVFHN24/003 is usually 5 days.
3.What payment methods are accepted for LPC1112LVFHN24/003?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC1112LVFHN24/003 transactions.
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4.How is shipping managed for LPC1112LVFHN24/003?
LPC1112LVFHN24/003 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC1112LVFHN24/003 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC1112LVFHN24/003?
For technical support, including LPC1112LVFHN24/003 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC1112LVFHN24/003 requirements.
6.How does Aetrix verify that LPC1112LVFHN24/003 is sourced from the original manufacturer or authorized distributors?
All LPC1112LVFHN24/003 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC1112LVFHN24/003 meets industry standards.
7.What is the process for return or replacement of LPC1112LVFHN24/003?
All LPC1112LVFHN24/003 units undergo pre-shipment inspection (PSI). If there is an issue with LPC1112LVFHN24/003, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC1112LVFHN24/003 part is unused and in its original packaging.
Return procedure for LPC1112LVFHN24/003:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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