NXP Semiconductors LPC1113JHN33/203E
- Part No.:
- LPC1113JHN33/203E
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 32-VQFN Exposed Pad
- Datasheet:
-
LPC1113JHN33/203E.pdf
- Description:
- IC MCU 32BIT 24KB FLASH 32HVQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC1113JHN33/203E from NXP Semiconductors is a 32-bit ARM Cortex-M0 microcontroller in HVQFN33 package, operating up to 50 MHz with 24 kB flash, 4 kB SRAM, 10-bit ADC (8-channel), one UART with RS-485 support, one I²C-bus interface (Fast-mode Plus, 1 Mbit/s), two SPI controllers, four general-purpose timers, and 28 GPIO pins - deployed in smart lighting control systems requiring low-power operation and compact footprint.
For engineers reviewing the LPC1113JHN33/203E datasheet, LPC1113JHN33/203E pinout, LPC1113JHN33/203E application, or LPC1113JHN33/203E equivalent, this page delivers verified technical context, validated pin functions, real-world use cases, and confirmed alternative options for industrial embedded design and volume procurement.
Technical Context
The LPC1113JHN33/203E belongs to the LPC1100XL series, featuring a windowed watchdog timer (WWDT), configurable open-drain GPIO mode, and power profiles stored in boot ROM for runtime optimization. It supports fractional baud rate generation in UART and dual SPI with FIFO and multi-protocol capability.
Its clock system integrates a 12 MHz internal RC oscillator (±1 %), crystal oscillator (1–25 MHz), programmable watchdog oscillator (9.4 kHz–2.3 MHz), and PLL for CPU frequency scaling - enabling flexible timing architecture without external high-frequency crystals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M0, 32-bit RISC processor with NVIC and SysTick timer |
| Max Clock Frequency | 50 MHz - enables real-time response in motor control and sensor fusion |
| Flash Memory | 24 kB - sufficient for firmware with bootloader, communication stack, and application logic |
| SRAM | 4 kB - supports moderate data buffering and RTOS task stacks |
| ADC | 10-bit, 8-channel - provides precision analog sensing for ambient light or temperature monitoring |
| I²C Interface | Fast-mode Plus (1 Mbit/s) with monitor mode - enables robust multi-master bus communication |
| GPIO Count | 28 pins with configurable pull-up/pull-down and edge/level interrupt capability |
| Operating Temp | −40 °C to +105 °C (J-grade) - qualified for extended-temperature industrial environments |
Pinout & Package
HVQFN33 package: plastic thermal enhanced very thin quad flat package, no leads, 33 terminals, body size 7 × 7 × 0.85 mm, exposed thermal pad, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (VSS) | Ground | Primary digital ground reference for all I/O and core logic |
| 2 (PIO0_8/MISO0/CT16B0_MAT0) | GPIO / SPI0 MISO / Timer Match | Shared function pin supporting SPI slave data input and timer output control |
| 3 (PIO1_8/CT16B1_CAP0) | GPIO / Timer Capture | Enables pulse-width measurement or event timestamping via capture input |
| 4 (PIO0_2/SSEL0/CT16B0_CAP0) | GPIO / SPI0 Slave Select / Timer Capture | Configurable as active-low chip select or timer event capture input |
| 5 (PIO0_9/MOSI0/CT16B0_MAT1) | GPIO / SPI0 MOSI / Timer Match | Supports full-duplex SPI master output and timer-controlled signal generation |
| 6 (VDD) | Power Supply | 1.8 V to 3.6 V main supply for core and I/O domains |
| 7 (SWCLK/PIO0_10/SCK0/CT16B0_MAT2) | Debug Clock / SPI0 Clock / Timer Match | Multi-function pin for SWD debugging, SPI clock, or timer output |
| 8 (XTALOUT) | Crystal Oscillator Output | Drives external crystal or connects to ceramic resonator for precise clock source |
| 9 (PIO1_10/AD6/CT16B1_MAT1) | GPIO / ADC Input / Timer Match | Simultaneous analog sensing and timer-driven output on same pin |
| 10 (XTALIN) | Crystal Oscillator Input | Accepts external crystal or clock source for system timing reference |
| 11 (R/PIO0_11/AD0/CT32B0_MAT3) | Reset / ADC Input / Timer Match | Combines hardware reset assertion with analog input and 32-bit timer output |
| 12 (PIO0_1/CLKOUT/CT32B0_MAT2) | GPIO / Clock Output / Timer Match | Provides externally accessible clock signal or timer-generated waveform |
| 13 (R/PIO1_0/AD1/CT32B1_CAP0) | Reset / ADC Input / Timer Capture | Supports analog sensing and event capture while sharing reset functionality |
| 14 (RESET/PIO0_0) | Reset Input | Active-low asynchronous reset pin with internal pull-up; initiates cold boot sequence |
| 15 (R/PIO1_1/AD2/CT32B1_MAT0) | Reset / ADC Input / Timer Match | Multi-role pin enabling analog acquisition and timer-based signal generation |
| 16 (PIO2_0/DTR) | GPIO / UART DTR | Used for modem control signaling or general-purpose output in serial applications |
| 17 (R/PIO1_2/AD3/CT32B1_MAT1) | Reset / ADC Input / Timer Match | Enables analog sensing and timer match output with shared reset path |
| 18 (PIO0_3) | GPIO | Dedicated general-purpose I/O with interrupt capability and configurable drive strength |
| 19 (PIO0_4/SCL) | GPIO / I²C Clock | Open-drain capable I²C bus clock line supporting Fast-mode Plus speeds |
| 20 (PIO0_5/SDA) | GPIO / I²C Data | Open-drain I²C bus data line with multiple address recognition and monitor mode |
| 21 (PIO1_9/CT16B1_MAT0) | GPIO / Timer Match | Generates precise timing pulses for PWM or synchronization signals |
| 22 (PIO3_4) | GPIO | General-purpose I/O with wake-up capability from Deep-sleep mode |
| 23 (PIO3_5) | GPIO | General-purpose I/O supporting level/edge-sensitive interrupt generation |
| 24 (PIO0_6/SCK0) | GPIO / SPI0 Clock | Master clock output for SPI0 peripheral; configurable as general-purpose output |
| 25 (PIO0_7/CTS) | GPIO / UART CTS | Hardware flow control input for RS-485/UART handshaking |
| 26 (PIO1_7/TXD/CT32B0_MAT1) | GPIO / UART TX / Timer Match | Transmits serial data or generates timer-synchronized waveforms |
| 27 (PIO1_6/RXD/CT32B0_MAT0) | GPIO / UART RX / Timer Match | Receives serial data or serves as timer match output |
| 28 (PIO1_5/RTS/CT32B0_CAP0) | GPIO / UART RTS / Timer Capture | Controls UART transmitter readiness or captures external event timing |
| 29 (VDD) | Power Supply | Secondary VDD connection for improved power integrity and noise immunity |
| 30 (PIO3_2) | GPIO | General-purpose I/O with configurable pull-up/pull-down resistors |
| 31 (PIO1_11/AD7) | GPIO / ADC Input | Analog input channel for 8-channel 10-bit ADC subsystem |
| 32 (PIO1_4/AD5/CT32B1_MAT3/WAKEUP) | GPIO / ADC Input / Timer Match / Wake-up | Enables analog sensing, timer output, and system wake-up from low-power states |
| 33 (SWDIO/PIO1_3/AD4/CT32B1_MAT2) | Debug I/O / GPIO / ADC Input / Timer Match | Primary debug interface pin supporting SWD programming and multi-function I/O |
Key Features
| Feature | Design Value |
|---|---|
| Windowed Watchdog Timer (WWDT) | Prevents runaway code execution with time-windowed refresh requirement - critical for safety-critical lighting and alarm systems |
| Power Profiles in Boot ROM | One function call selects optimized performance/power trade-offs - reduces firmware development effort for battery-powered devices |
| Configurable Open-Drain GPIO | Enables direct interfacing with I²C, SMBus, or wired-AND logic without external pull-ups |
| 28 GPIO with Interrupt Capability | Each pin supports edge- and level-sensitive interrupts - simplifies sensor polling and real-time event handling |
| RS-485 UART Support | Integrated driver enable control and polarity inversion - eliminates need for external transceiver in industrial bus networks |
| 10-bit ADC with 8 Channels | Simultaneous sampling across multiple sensors (e.g., ambient light, temperature, voltage) without external multiplexer |
Applications
| Smart Lighting Control | Industrial Alarm Panel |
|---|---|
Use Scenario: Dimmable LED fixture with ambient light sensing, thermal monitoring, and DALI/KNX bus interface. IC Role / Device Role / Timing Role: Main system controller executing lighting algorithms, managing I²C sensor reads, and driving RS-485 DALI gateway. Use Value: 24 kB flash accommodates DALI stack + lighting logic; 8-channel ADC enables concurrent sensor inputs; J-grade temp range ensures reliability in enclosed luminaires. | Use Scenario: Fire/smoke detection panel with zone monitoring, siren control, and RS-485 communication to central station. IC Role / Device Role / Timing Role: Central MCU coordinating sensor polling, alarm activation timing, and fault reporting over industrial bus. Use Value: WWDT ensures fail-safe behavior during smoke detection; 28 GPIO support multiple zone inputs and relay outputs; −40 °C to +105 °C rating suits harsh panel environments. |
| White Goods UI Module | eMetering Subsystem |
Use Scenario: Touchless control interface for washing machine with capacitive touch, display backlight, and motor status feedback. IC Role / Device Role / Timing Role: Dedicated UI controller handling button debouncing, LED dimming, and serial communication with main MCU. Use Value: Configurable open-drain GPIO drives LED strings directly; UART with fractional baud rate supports legacy appliance protocols; low-power modes extend standby battery life. | Use Scenario: Smart electricity meter with current/voltage sensing, tamper detection, and PLC or RF communication interface. IC Role / Device Role / Timing Role: Metering co-processor acquiring ADC samples, computing RMS values, and managing secure data transmission. Use Value: 10-bit ADC with 8 channels supports simultaneous voltage/current/temperature sampling; power profiles optimize active/idle cycles; J-grade operation withstands utility cabinet temperatures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC1113FHN33/203 | Same flash/SRAM/peripherals but F-grade (−40 °C to +85 °C); lacks extended temperature qualification | Suitable for commercial indoor applications only; not rated for industrial enclosures or outdoor metering | Select when cost sensitivity outweighs extended temperature requirements |
| LPC1114JHN33/203 | 32 kB flash (vs. 24 kB), identical SRAM, peripherals, package, and J-grade temperature range | Enables larger firmware images (e.g., added security libraries or OTA update stack) | Choose when additional flash headroom is needed for field-upgradable features |
Compared with LPC1113JHN33/203E, the LPC1113FHN33/203 offers identical functionality at lower thermal rating, while the LPC1114JHN33/203 adds 8 kB flash without changing pinout or power profile - making it a seamless upgrade path for firmware growth.
Availability
LPC1113JHN33/203E is available at Aetrix Electronics and suitable for smart lighting control, industrial alarm systems, white goods UI modules, and eMetering subsystems requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LPC1113JHN33/203E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The LPC1100XL series - including LPC1113JHN33/203E - was designed for cost-sensitive, low-power embedded applications demanding extended temperature operation, integrated analog peripherals, and robust communication interfaces in compact packages.
FAQ
What is the maximum operating frequency of the LPC1113JHN33/203E?
The LPC1113JHN33/203E operates at a maximum CPU frequency of 50 MHz. This is achieved using the on-chip PLL driven by either the internal 12 MHz RC oscillator or an external crystal. The 50 MHz clock enables deterministic real-time processing for time-critical tasks such as PWM generation, sensor sampling, and serial protocol handling in the LPC1113JHN33/203E.
Does the LPC1113JHN33/203E support in-system programming (ISP)?
Yes, the LPC1113JHN33/203E supports In-System Programming (ISP) via its built-in bootloader, accessible through UART using standard ISP commands. This allows firmware updates without removing the device from the PCB. The LPC1113JHN33/203E also supports In-Application Programming (IAP), enabling runtime flash modification - essential for over-the-air updates and field calibration in deployed LPC1113JHN33/203E systems.
What ADC resolution and channel count does the LPC1113JHN33/203E provide?
The LPC1113JHN33/203E integrates a 10-bit successive approximation ADC with up to 8 input channels, mapped to dedicated pins depending on package configuration. On the HVQFN33 package, all 8 channels (AD0–AD7) are available. This resolution supports accurate voltage, temperature, and light-level measurements in applications like smart lighting and eMetering where the LPC1113JHN33/203E serves as the primary analog acquisition node.
Is the LPC1113JHN33/203E pin-compatible with other LPC111x HVQFN33 variants?
Yes, the LPC1113JHN33/203E shares identical pinout and electrical characteristics with all other LPC111x devices in the HVQFN33 package, including LPC1111/1112/1114/1115 variants. This allows direct substitution within the same series - for example, upgrading to LPC1114JHN33/203 for more flash memory requires no PCB change, as the LPC1113JHN33/203E and LPC1114JHN33/203 share identical pin mapping and thermal pad layout.
What debug interface does the LPC1113JHN33/203E support?
The LPC1113JHN33/203E supports Serial Wire Debug (SWD) via dedicated SWDIO and SWCLK pins (pins 33 and 7), compliant with ARM CoreSight standards. This two-pin interface enables full debugging, flash programming, and real-time tracing using standard tools like LPC-Link2 or SEGGER J-Link. No JTAG header is required, reducing board space and cost - a key advantage for compact designs using the LPC1113JHN33/203E.
LPC1113JHN33/203E Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 32-VQFN Exposed Pad
- Series:
- LPC1100XL
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0
- Core Size:
- 32-Bit Single-Core
- Speed:
- 50MHz
- Connectivity:
- I2C, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, WDT
- Number of I/O:
- 28
- Program Memory Size:
- 24KB (24K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 8K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 8x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC1113JHN33/203E FAQ
1.How can I place an order for LPC1113JHN33/203E through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC1113JHN33/203E on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC1113JHN33/203E reliable?
The price and inventory of LPC1113JHN33/203E are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC1113JHN33/203E is usually 5 days.
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Once your LPC1113JHN33/203E order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC1113JHN33/203E?
For technical support, including LPC1113JHN33/203E datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC1113JHN33/203E requirements.
6.How does Aetrix verify that LPC1113JHN33/203E is sourced from the original manufacturer or authorized distributors?
All LPC1113JHN33/203E products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC1113JHN33/203E meets industry standards.
7.What is the process for return or replacement of LPC1113JHN33/203E?
All LPC1113JHN33/203E units undergo pre-shipment inspection (PSI). If there is an issue with LPC1113JHN33/203E, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC1113JHN33/203E part is unused and in its original packaging.
Return procedure for LPC1113JHN33/203E:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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