NXP Semiconductors LPC1114FDH28/102:5
- Part No.:
- LPC1114FDH28/102:5
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 28-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
LPC1114FDH28/102:5.pdf
- Description:
- IC MCU 32BIT 32KB FLASH 28TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC1114FDH28/102 from NXP Semiconductors is an ARM Cortex-M0 32-bit microcontroller in TSSOP28 package, delivering up to 50 MHz CPU operation, 32 kB flash, 4 kB SRAM, and integrated peripherals including UART with RS-485 support, Fast-mode Plus I²C, two SPI interfaces, four timers, and a 10-bit ADC with six input channels - deployed in lighting control and alarm systems requiring compact, low-power embedded processing.
For engineers reviewing the LPC1114FDH28/102 datasheet, LPC1114FDH28/102 pinout, LPC1114FDH28/102 application, or LPC1114FDH28/102 equivalent, this page provides verified technical context, package-specific pin functions, power profile configuration, clock generation options, and validated alternative parts for design continuity and supply assurance.
Technical Context
The LPC1114FDH28/102 implements the ARM Cortex-M0 core with NVIC and Serial Wire Debug, supporting deterministic interrupt handling and in-circuit debugging. It integrates a programmable windowed watchdog timer and power management unit enabling Sleep, Deep-sleep, and Deep power-down modes - all controlled via boot ROM-resident power profiles.
Clock generation includes a 12 MHz ±1 % internal RC oscillator, external crystal support (1–25 MHz), and a PLL for scaling CPU frequency to 50 MHz. Peripheral clocking supports fractional baud rate generation in UART, FIFO-based SPI controllers, and configurable I²C-bus timing up to 1 Mbit/s in Fast-mode Plus.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M0, 32-bit RISC architecture optimized for deterministic real-time control with Thumb-2 instruction set. |
| Max Clock Frequency | 50 MHz - enables high-throughput peripheral handling and fast ISR execution without external high-frequency crystals. |
| Flash Memory | 32 kB - sufficient for firmware with bootloader, communication stacks, and application logic in space-constrained designs. |
| SRAM | 4 kB - supports moderate data buffering, stack depth, and RTOS task contexts in embedded sensor or control nodes. |
| I/O Pins | 22 GPIO - includes configurable pull-up/pull-down, edge/level-sensitive interrupts, and open-drain mode for I²C and bus interfacing. |
| ADC | 10-bit SAR with 6 input channels - provides sufficient resolution for analog sensor monitoring (e.g., temperature, light intensity) in white goods. |
| UART | 1 × RS-485/EIA-485 compliant UART with fractional baud rate generator and internal FIFO - enables robust industrial serial communication over long distances. |
| I²C Interface | 1 × Fast-mode Plus (1 Mbit/s) I²C-bus - supports high-speed sensor and EEPROM interfacing with multi-address recognition and monitor mode. |
Pinout & Package
TSSOP28 package: plastic thin shrink small outline, 28 leads, body width 4.4 mm (SOT361-1), operating temperature range −40 °C to +85 °C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (VDD) | Power supply | 1.8 V to 3.6 V main supply rail for core and I/O domains. |
| 2 (PIO0_0 / RESET) | Reset input | Active-low reset pin with internal pull-up; also serves as general-purpose I/O after reset release. |
| 3 (PIO0_1 / CLKOUT) | Programmable clock output | Can mirror IRC, system oscillator, CPU, or watchdog clock - used for external timing verification or peripheral sync. |
| 4 (PIO0_2 / SSEL0 / CT16B0_CAP0) | Slave select / capture input | Enables SPI0 slave mode or captures timer events on rising/falling edges for precise timing measurement. |
| 5 (PIO0_3) | General-purpose I/O | Configurable digital I/O with interrupt capability and optional open-drain mode for I²C bus pull-down. |
| 6 (PIO0_4 / SCL) | I²C clock line | Open-drain output/input for Fast-mode Plus I²C clock signaling; requires external pull-up resistor. |
| 7 (PIO0_5 / SDA) | I²C data line | Open-drain bidirectional data line supporting multi-master arbitration and clock stretching. |
| 8 (PIO0_6 / SCK0) | SPI0 clock | Master or slave clock output/input for synchronous serial communication with configurable polarity and phase. |
| 9 (PIO0_7 / CTS) | UART clear-to-send | Hardware flow control input for RS-485 transceiver enable coordination during transmit bursts. |
| 10 (PIO0_8 / MISO0) | SPI0 master-in/slave-out | Data output from slave device during SPI0 read operations; tri-stated when not selected. |
| 11 (PIO0_9 / MOSI0) | SPI0 master-out/slave-in | Data input to slave device during SPI0 write operations; driven only when chip is selected. |
| 12 (PIO0_10 / SWCLK / SCK0) | JTAG/SWD clock | Serial Wire Debug clock input for programming and real-time debugging without full JTAG overhead. |
| 13 (PIO0_11 / AD0 / CT32B0_MAT3) | ADC input / timer match | Analog input channel 0 for 10-bit conversion; also triggers timer event or generates PWM output. |
| 14 (VSS) | Ground | Digital ground reference for all I/O and core circuitry; must be low-impedance connection to PCB plane. |
| 15 (XTALIN) | Clock oscillator input | Input for external crystal or ceramic resonator (1–25 MHz); paired with XTALOUT for precision timing. |
| 16 (XTALOUT) | Clock oscillator output | Output for external crystal/resonator feedback loop; not available on LPC1112FDH20/102 but present on LPC1114FDH28/102. |
| 17 (PIO1_0 / AD1 / CT32B1_CAP0) | ADC input / capture | Analog input channel 1; also captures external signal edges for time-of-arrival measurement. |
| 18 (PIO1_1 / AD2 / CT32B1_MAT0) | ADC input / timer match | Analog input channel 2; match output drives GPIO state change or interrupt on timer overflow/comparison. |
| 19 (PIO1_2 / AD3 / CT32B1_MAT1) | ADC input / timer match | Analog input channel 3; second match output enables dual-edge PWM or pulse-width modulation. |
| 20 (SWDIO / PIO1_3 / AD4 / CT32B1_MAT2) | Debug I/O / ADC input | Bi-directional SWD data line; also serves as ADC channel 4 and third timer match output. |
| 21 (PIO1_4 / AD5 / CT32B1_MAT3 / WAKEUP) | ADC input / wake source | Analog input channel 5; configured as wake-up source from Deep-sleep mode via level/edge detection. |
| 22 (PIO1_5 / RTS / CT32B0_CAP0) | UART request-to-send | Hardware flow control output for RS-485 driver enable; also captures timer events for timestamping. |
| 23 (PIO1_6 / RXD / CT32B0_MAT0) | UART receive | Asynchronous serial input with internal FIFO; match output can trigger DMA or interrupt on byte reception. |
| 24 (PIO1_7 / TXD / CT32B0_MAT1) | UART transmit | Asynchronous serial output with fractional baud rate support; match output enables precise transmit timing. |
| 25 (PIO1_8 / CT16B1_CAP0) | Timer capture | Captures external signal transitions for period measurement or frequency counting using 16-bit timer. |
| 26 (PIO1_9 / CT16B1_MAT0) | Timer match | 16-bit timer match output for generating periodic interrupts or toggling GPIO at defined intervals. |
| 27 (VDD) | Power supply | Second VDD pin for improved power integrity and reduced noise coupling in mixed-signal operation. |
| 28 (VSS) | Ground | Second ground pin for dedicated return path of analog and digital sections to minimize crosstalk. |
Key Features
| Feature | Design Value |
|---|---|
| Power Profiles in Boot ROM | One function call configures sleep behavior, clock gating, and peripheral retention - reducing development effort for battery-powered devices. |
| Windowed Watchdog Timer | Prevents runaway code by requiring service within a defined time window - critical for safety-critical alarm and metering applications. |
| Configurable Open-Drain Mode | Enables direct I²C-bus interface without external pull-ups on GPIO pins - simplifies BOM and layout for sensor hubs. |
| High-Current Sink on I²C Pins | 20 mA sink capability on SCL/SDA supports driving longer traces or multiple slaves without buffer ICs. |
| In-Application Programming (IAP) | Allows firmware updates over UART or I²C without external programmer - essential for field-deployed lighting controllers. |
| RS-485 UART Support | Integrated driver enable control and polarity inversion eliminates need for external direction logic in industrial networks. |
Applications
| Lighting Control | Alarm Systems |
|---|---|
Use Scenario: Dimmable LED driver with ambient light sensing and wireless command interface. IC Role / Device Role / Timing Role: Central controller managing PWM dimming, ADC-based lux measurement, and UART-based Zigbee/Bluetooth module communication. Use Value: 32 kB flash stores lighting profiles and communication stack; 22 GPIO support button inputs, status LEDs, and sensor connections without external expanders. | Use Scenario: Residential intrusion detection panel with door/window sensors, siren output, and keypad interface. IC Role / Device Role / Timing Role: Main MCU executing sensor polling, alarm triggering logic, and RS-485 communication with central monitoring station. Use Value: Windowed WDT ensures fail-safe reset during sensor fault conditions; 10-bit ADC reads analog smoke/CO sensor outputs with 6-channel flexibility. |
| eMetering | White Goods |
Use Scenario: Single-phase smart electricity meter with tamper detection and PLC communication. IC Role / Device Role / Timing Role: Metering controller handling pulse counting, RTC synchronization, and UART-based powerline modem interface. Use Value: Fractional baud rate generator maintains accurate PLC modem timing across voltage fluctuations; 4 kB SRAM buffers energy consumption logs. | Use Scenario: Washing machine main control board managing motor drive, water level sensing, and user interface. IC Role / Device Role / Timing Role: Real-time supervisor coordinating motor commutation timing, ADC-based pressure/temperature readings, and display refresh. Use Value: Four independent timers support simultaneous PWM motor control, debounce filtering, and buzzer tone generation without software overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC1114FHN33/202 | HVQFN33 package (33-pin), same 32 kB flash/4 kB SRAM, identical peripheral set, but adds 5 extra GPIO and supports higher ambient temperature (−40 °C to +105 °C). | Preferred for thermally demanding environments or when additional I/O is required for expansion headers or diagnostics. | Select when board layout allows HVQFN33 footprint and thermal margin exceeds 85 °C. |
| LPC1114FBD48/302 | LQFP48 package (48-pin), same memory and peripherals, provides 42 GPIO, full 8-channel ADC, and both SPI interfaces - no functional limitation on TSSOP28-restricted features. | Suitable for complex control systems needing more analog inputs, serial interfaces, or I/O for HMI integration. | Choose when design requires >22 GPIO or full 8-channel ADC capability without redesigning firmware abstraction layer. |
Compared with LPC1114FHN33/202 and LPC1114FBD48/302, the LPC1114FDH28/102 offers optimal cost and footprint efficiency for mid-complexity applications where 22 GPIO and 6-channel ADC meet requirements - avoiding over-specification while maintaining full compatibility with LPC1100L series toolchains and libraries.
Availability
LPC1114FDH28/102 is available at Aetrix Electronics and suitable for lighting control, alarm systems, and eMetering requiring stable component supply across production lifecycles and regional regulatory compliance.
Supply support for LPC1114FDH28/102 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The LPC1100L series - including LPC1114FDH28/102 - was designed for cost-sensitive, low-power embedded applications requiring ARM Cortex-M0 performance in compact packages like TSSOP28 and HVQFN33.
FAQ
What is the maximum operating frequency of the LPC1114FDH28/102?
The LPC1114FDH28/102 operates at a maximum CPU frequency of 50 MHz, achievable via its integrated PLL driven by either the internal 12 MHz RC oscillator or an external crystal (1–25 MHz). This frequency is fully supported across the specified temperature range (−40 °C to +85 °C) and voltage range (1.8 V to 3.6 V), enabling deterministic real-time response in lighting and alarm applications.
Does the LPC1114FDH28/102 support In-Application Programming (IAP)?
Yes, the LPC1114FDH28/102 supports In-Application Programming via its on-chip bootloader, allowing firmware updates during normal operation using UART or I²C interfaces. This capability is implemented in ROM and requires no external programmer - a key enabler for remote maintenance in deployed lighting controllers and smart meters using the LPC1114FDH28/102.
How many ADC input channels does the LPC1114FDH28/102 provide?
The LPC1114FDH28/102 provides six ADC input channels (AD0–AD5), as confirmed by Table 2 in the datasheet for the TSSOP28 package variant. These 10-bit inputs are multiplexed across GPIO pins PIO0_11, PIO1_0 through PIO1_4, and support sampling rates up to 400 kS/s - sufficient for sensor monitoring in white goods and environmental controls using the LPC1114FDH28/102.
Is the I²C interface on the LPC1114FDH28/102 compatible with Fast-mode Plus?
Yes, the LPC1114FDH28/102 includes a Fast-mode Plus I²C-bus interface supporting data rates up to 1 Mbit/s, with multi-address recognition and monitor mode. This is explicitly documented for the LPC1100L series (to which LPC1114FDH28/102 belongs) and distinguishes it from base LPC1100 parts - enabling high-speed communication with modern sensors and EEPROMs without external level shifters or bus extenders.
What power-saving modes are available on the LPC1114FDH28/102?
The LPC1114FDH28/102 supports three reduced-power modes: Sleep, Deep-sleep, and Deep power-down - managed by its integrated Power Management Unit (PMU). The LPC1100L series implementation includes boot ROM-resident power profiles, allowing one function call to configure clock gating, peripheral retention, and wake-up sources - a feature confirmed for LPC1114FDH28/102 in the datasheet's "Power control" section.
LPC1114FDH28/102:5 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width)
- Series:
- LPC1100L
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Core Processor:
- ARM® Cortex®-M0
- Core Size:
- 32-Bit Single-Core
- Speed:
- 50MHz
- Connectivity:
- I2C, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, WDT
- Number of I/O:
- 22
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 4K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 6x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC1114FDH28/102:5 FAQ
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7.What is the process for return or replacement of LPC1114FDH28/102:5?
All LPC1114FDH28/102:5 units undergo pre-shipment inspection (PSI). If there is an issue with LPC1114FDH28/102:5, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC1114FDH28/102:5 part is unused and in its original packaging.
Return procedure for LPC1114FDH28/102:5:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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