My Inquiry
My Account
NXP Semiconductors LPC1114FHI33/302,5
- Part No.:
- LPC1114FHI33/302,5
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
LPC1114FHI33/302,5.pdf
- Description:
- IC MCU 32BIT 32KB FLASH 32HVQFN
- Quantity:
- Payment:
- Shipping:
Inventory:1,440
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LPC1114FHI33/302 from NXP Semiconductors is a 32-bit ARM Cortex-M0 microcontroller in a 5×5 mm HVQFN33 package, operating up to 50 MHz with 32 kB flash, 8 kB SRAM, one UART with RS-485 support, one I²C-bus interface (Fast-mode Plus), and 28 GPIO pins. It targets cost-sensitive embedded control in lighting and alarm systems.
For engineers reviewing the LPC1114FHI33/302 datasheet, LPC1114FHI33/302 pinout, LPC1114FHI33/302 application, or LPC1114FHI33/302 equivalent, this page delivers verified technical context, package-specific pin functions, power profile capabilities, and validated alternative options for industrial MCU selection.
Technical Context
The LPC1114FHI33/302 implements an ARM Cortex-M0 core with NVIC and Serial Wire Debug, paired with a programmable watchdog timer and integrated PMU supporting Sleep, Deep-sleep, and Deep power-down modes. Its clock system includes a 12 MHz ±1 % internal RC oscillator, crystal oscillator (1–25 MHz), and PLL for CPU frequency scaling.
Digital peripherals include four general-purpose timers (up to 13 match outputs), configurable open-drain GPIO (LPC1100L series), and high-current drive capability (20 mA sink on I²C pins). Analog features comprise a 10-bit ADC with up to 8 input channels, while serial interfaces consist of one UART with fractional baud rate generation and FIFO, and one I²C-bus interface compliant with Fast-mode Plus (1 Mbit/s).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M0, 32-bit RISC architecture optimized for deterministic real-time control and low-code-size applications. |
| Max Clock Frequency | 50 MHz - enables fast interrupt response and efficient execution of sensor fusion or motor control algorithms. |
| Flash Memory | 32 kB - sufficient for bootloader + application firmware with room for field updates in resource-constrained devices. |
| SRAM | 8 kB - supports moderate stack depth, data buffers for UART/I²C communication, and real-time variable storage. |
| GPIO Pins | 28 - all configurable as edge/level-sensitive interrupts; includes open-drain mode for I²C bus compatibility. |
| ADC Resolution | 10-bit - provides 1024 discrete levels for accurate analog sensing in temperature, light, or voltage monitoring. |
| I²C Speed | 1 Mbit/s Fast-mode Plus - allows high-speed peripheral communication without external pull-up resistors on standard buses. |
| Operating Voltage | 1.8 V to 3.6 V - compatible with single-cell Li-ion, 3.3 V logic rails, and energy-harvesting power supplies. |
Pinout & Package
HVQFN33 package: plastic thermal enhanced very thin quad flat package, no leads, 33 terminals, body size 5 × 5 × 0.85 mm. Exposed thermal pad improves heat dissipation in compact PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Power supply | Primary 1.8–3.6 V supply rail; two dedicated VDD pins ensure stable core and I/O domain operation. |
| VSS | Ground | System ground reference; single VSS terminal requires low-impedance PCB connection to minimize noise coupling. |
| RESET/PIO0_0 | Reset input / GPIO | Active-low reset pin with internal pull-up; also serves as general-purpose I/O with interrupt capability. |
| XTALIN / XTALOUT | Clock input/output | Supports external crystal (1–25 MHz) for precise timing; internal oscillator usable if crystal omitted. |
| SWDIO / SWCLK | Debug interface | Two-pin Serial Wire Debug for programming and real-time debugging without JTAG overhead. |
| PIO0_4/SCL / PIO0_5/SDA | I²C bus signals | Open-drain capable pins supporting Fast-mode Plus (1 Mbit/s); require external pull-ups per I²C specification. |
| PIO1_6/RXD / PIO1_7/TXD | UART interface | Asynchronous serial communication with fractional baud rate generator and internal FIFO for robust RS-485 framing. |
| PIO1_3/AD4 / PIO1_4/AD5 / ... / PIO1_11/AD7 | ADC inputs | Eight 10-bit analog input channels mapped across GPIO pins; multiplexed via IOCONFIG register. |
| PIO0_1/CLKOUT | Programmable clock output | Divided system, IRC, CPU, or watchdog clock output for synchronizing external peripherals or test equipment. |
Key Features
| Feature | Design Value |
|---|---|
| Power profiles in boot ROM | One function call selects optimized performance/power trade-offs - reduces firmware development time for battery-powered devices. |
| Windowed watchdog timer | Prevents runaway code by requiring periodic windowed refresh; critical for fail-safe operation in alarm systems. |
| Configurable open-drain mode | Enables direct I²C-bus interfacing without external level shifters or pull-up resistor redesign. |
| High-current I²C sink drivers | 20 mA sink capability on SDA/SCL simplifies bus termination and improves noise immunity in noisy industrial environments. |
| In-Application Programming (IAP) | Allows firmware updates over UART or I²C without external programmer - essential for remote device maintenance. |
Applications
| Lighting Control | Alarm System Panel |
|---|---|
Use Scenario: Digital dimming and color mixing in LED luminaires using PWM and ambient light feedback. IC Role / Device Role / Timing Role: Main controller executing lighting algorithms, managing I²C-connected sensors and driver ICs, and handling UART-based commissioning. Use Value: 28 GPIO enable independent channel control; 10-bit ADC resolves ambient light changes with <1% error; 32 kB flash accommodates DALI or DMX protocol stacks. | Use Scenario: Central monitoring unit receiving zone inputs, driving siren outputs, and communicating with cloud gateway via RS-485. IC Role / Device Role / Timing Role: Real-time event processor with deterministic interrupt latency, managing keypad scan, tamper detection, and UART-to-RS-485 translation. Use Value: Windowed WDT ensures reliable fault recovery; 50 MHz CPU handles multiple concurrent zone polls; 8 kB SRAM buffers alarm logs during network outages. |
| eMetering Interface | White Goods UI Controller |
Use Scenario: Pulse counting and tariff switching in smart electricity meters with optical isolation and secure firmware updates. IC Role / Device Role / Timing Role: Isolated metering interface MCU coordinating pulse capture, RTC synchronization, and encrypted IAP over UART. Use Value: High-current GPIO drives optocoupler LEDs directly; 32 kB flash stores dual firmware images for A/B update rollback; 1.8 V min operation extends battery life in backup mode. | Use Scenario: Appliance front-panel controller managing touch keys, display backlight, buzzer feedback, and motor status reporting. IC Role / Device Role / Timing Role: Dedicated UI coordinator offloading main MCU, handling capacitive touch scanning, PWM dimming, and UART-based diagnostics. Use Value: 28 GPIO support matrix keypad + 4-segment display + 3x PWM outputs; power profiles reduce standby current to <1 µA in Deep power-down mode. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC1114FHN33/302 | Same 32 kB flash, 8 kB SRAM, and HVQFN33 package but uses 7×7 mm body instead of 5×5 mm; lacks extended thermal performance of FHI variant. | Suitable for space-tolerant designs where PCB area is less constrained; identical peripheral set and software compatibility. | Select when board layout allows larger footprint and thermal requirements are standard. |
| LPC1114FBD48/302 | LQFP48 package (7×7 mm), 42 GPIO, same flash/SRAM, adds second SPI interface; higher pin count enables expanded peripheral connectivity. | Better suited for designs needing more I/O expansion or dual SPI peripherals (e.g., display + SD card), at cost of larger PCB area. | Choose when additional GPIO or SPI capability justifies LQFP48 footprint and routing complexity. |
Compared with LPC1114FHI33/302, the LPC1114FHN33/302 offers identical functionality in a thermally enhanced 5×5 mm HVQFN33 package ideal for compact, high-density layouts, while the LPC1114FBD48/302 trades miniaturization for greater I/O flexibility and dual-SPI support in LQFP48.
Availability
LPC1114FHI33/302 is available at Aetrix Electronics and suitable for lighting control, alarm system panels, and eMetering interfaces requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for LPC1114FHI33/302 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The LPC111x series was designed as a low-cost, energy-efficient 32-bit replacement for legacy 8/16-bit MCUs, targeting applications demanding ARM software compatibility, small footprint, and robust peripheral integration without premium pricing.
FAQ
What is the maximum operating frequency of the LPC1114FHI33/302?
The LPC1114FHI33/302 operates at a maximum CPU frequency of 50 MHz. This speed is achievable using the internal PLL driven by either the 12 MHz internal RC oscillator or an external crystal (1–25 MHz). The 50 MHz clock enables fast interrupt handling and efficient execution of real-time control tasks without requiring external high-frequency oscillators.
Does the LPC1114FHI33/302 support In-Application Programming (IAP)?
Yes, the LPC1114FHI33/302 supports In-Application Programming via its on-chip bootloader. This allows firmware updates to be performed over UART or I²C while the device remains operational - a key capability for remote maintenance in deployed lighting or alarm systems. IAP eliminates the need for external debug hardware during field updates.
What ADC resolution and input count does the LPC1114FHI33/302 provide?
The LPC1114FHI33/302 integrates a 10-bit successive approximation ADC with up to eight input channels (AD0–AD7), accessible through GPIO pins PIO1_0 to PIO1_11. The ADC supports single-ended conversion with programmable sampling rates and trigger sources, delivering 1024 discrete levels for precise analog signal acquisition in sensor-based applications.
Is the LPC1114FHI33/302 pin-compatible with other LPC111x HVQFN33 variants?
Yes, the LPC1114FHI33/302 shares identical pinout and electrical characteristics with other LPC111x HVQFN33 variants (e.g., LPC1114FHN33/302, LPC1114FHI33/303), including matching signal assignments, power/ground locations, and debug interface placement. This enables drop-in substitution within the same package family when flash size, SRAM, or feature set aligns.
What power-saving modes are supported by the LPC1114FHI33/302?
The LPC1114FHI33/302 supports three reduced-power modes: Sleep, Deep-sleep, and Deep power-down. In Deep power-down mode, current consumption drops below 1 µA while retaining RAM content and wake-up capability via up to 13 GPIO pins. Power profiles in boot ROM allow runtime selection of optimized performance/power configurations.
LPC1114FHI33/302,5 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 32-VFQFN Exposed Pad
- Series:
- LPC1100L
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0
- Core Size:
- 32-Bit Single-Core
- Speed:
- 50MHz
- Connectivity:
- I2C, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, WDT
- Number of I/O:
- 28
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 8K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 8x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC1114FHI33/302,5 FAQ
1.How can I place an order for LPC1114FHI33/302,5 through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC1114FHI33/302,5 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC1114FHI33/302,5 reliable?
The price and inventory of LPC1114FHI33/302,5 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC1114FHI33/302,5 is usually 5 days.
3.What payment methods are accepted for LPC1114FHI33/302,5?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC1114FHI33/302,5 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC1114FHI33/302,5?
LPC1114FHI33/302,5 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC1114FHI33/302,5 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC1114FHI33/302,5?
For technical support, including LPC1114FHI33/302,5 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC1114FHI33/302,5 requirements.
6.How does Aetrix verify that LPC1114FHI33/302,5 is sourced from the original manufacturer or authorized distributors?
All LPC1114FHI33/302,5 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC1114FHI33/302,5 meets industry standards.
7.What is the process for return or replacement of LPC1114FHI33/302,5?
All LPC1114FHI33/302,5 units undergo pre-shipment inspection (PSI). If there is an issue with LPC1114FHI33/302,5, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC1114FHI33/302,5 part is unused and in its original packaging.
Return procedure for LPC1114FHI33/302,5:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LPC1114FHI33/302,5 Tags
-
ATTINY4-TSHR
Microchip Technology
-
ATTINY10-TSHR
Microchip Technology
-
ATTINY10-TS8R
Microchip Technology
-
ATTINY202-SSNR
Microchip Technology
-
ATTINY202-SSFR
Microchip Technology
-
ATTINY402-SSNR
Microchip Technology
-
PIC16F15213T-I/MF
Microchip Technology
-
PIC16F15213-E/MF
Microchip Technology
-
PIC10F200T-I/OT
Microchip Technology
-
ATTINY412-SSNR
Microchip Technology
-
PIC10F202T-I/OT
Microchip Technology
-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
