NXP Semiconductors LPC1114FHN33/301,5
- Part No.:
- LPC1114FHN33/301,5
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 32-VQFN Exposed Pad
- Datasheet:
-
LPC1114FHN33/301,5.pdf
- Description:
- IC MCU 32BIT 32KB FLASH 32HVQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC1114FHN33/301 from NXP Semiconductors is a 32-bit ARM Cortex-M0 microcontroller in HVQFN33 package, delivering up to 50 MHz CPU operation, 32 kB flash, 8 kB SRAM, and integrated peripherals including UART with RS-485 support, Fast-mode Plus I²C, two SPI interfaces, four timers, and a 10-bit ADC with 8-channel input multiplexing - deployed in lighting control and alarm systems.
For engineers reviewing the LPC1114FHN33/301 datasheet, LPC1114FHN33/301 pinout, LPC1114FHN33/301 application, or LPC1114FHN33/301 equivalent, key selection criteria include flash/SRAM capacity, HVQFN33 thermal performance, UART RS-485 capability, and power profile support for low-power embedded designs.
Technical Context
The LPC1114FHN33/301 belongs to the LPC1100 series (non-L/non-XL variant), confirming absence of power profiles, windowed watchdog timer, and second SPI interface - unlike LPC1100L/XL derivatives. It uses the ARM Cortex-M0 core with NVIC and Serial Wire Debug, and supports clock sources including 12 MHz internal RC oscillator (±1 %), crystal oscillator (1–25 MHz), and programmable PLL for full-speed operation.
Peripheral integration includes one UART with fractional baud rate generation and RS-485 support, one Fast-mode Plus I²C bus (1 Mbit/s), one SPI controller (SSP features), four general-purpose timers (up to 13 match outputs), and a 10-bit ADC with 8 selectable input channels - all mapped to 28 GPIO pins in the HVQFN33 package.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M0, 32-bit RISC, up to 50 MHz - enables efficient C/C++ execution and real-time deterministic response. |
| Flash Memory | 32 kB on-chip flash - sufficient for medium-complexity firmware with bootloader and application code separation. |
| SRAM | 8 kB SRAM - supports stack, heap, and data buffers for multi-tasking or protocol stacks (e.g., Modbus RTU over UART). |
| ADC | 10-bit SAR ADC with 8-channel multiplexer - allows simultaneous monitoring of multiple analog sensors (e.g., temperature, light, voltage) without external mux. |
| I²C Interface | Fast-mode Plus I²C (1 Mbit/s) with monitor mode - enables high-speed sensor communication and bus arbitration in multi-master systems. |
| UART | RS-485/EIA-485 compliant UART with internal FIFO - supports robust long-distance industrial serial communication up to 1200 m. |
| Package | HVQFN33 (7 × 7 × 0.85 mm, 33 terminals) - provides compact footprint and enhanced thermal dissipation for space-constrained PCBs. |
Pinout & Package
HVQFN33 package: plastic thermal-enhanced very thin quad flat no-lead package, 7 mm × 7 mm body, 0.85 mm height, 33 terminals, exposed thermal pad (pin 33 = VSS).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | PIO0_8 / MISO0 / CT16B0_MAT0 | Master In Slave Out for SPI0; 16-bit timer match output - enables daisy-chained SPI peripherals and precise timing events. |
| 2 | PIO1_8 / CT16B1_CAP0 | Capture input for 16-bit timer - supports pulse-width measurement (e.g., motor encoder feedback). |
| 3 | PIO0_2 / SSEL0 / CT16B0_CAP0 | Slave Select for SPI0; 16-bit timer capture - allows hardware-controlled SPI peripheral selection and edge-triggered timing capture. |
| 4 | PIO0_9 / MOSI0 / CT16B0_MAT1 | Master Out Slave In for SPI0; 16-bit timer match output - drives SPI slaves and generates periodic signals (e.g., LED dimming PWM). |
| 5 | VDD | Core and I/O supply (1.8–3.6 V) - powers digital logic and GPIO; requires local decoupling near pin 5 and pin 24. |
| 6 | SWCLK / PIO0_10 / SCK0 / CT16B0_MAT2 | JTAG/SWD clock; SPI0 clock; 16-bit timer match - shared function enables debug, synchronous serial comms, and waveform generation. |
| 7 | XTALOUT | Crystal oscillator output - drives external crystal (1–25 MHz); must be connected only when using crystal mode. |
| 8 | PIO1_10 / AD6 / CT16B1_MAT1 | Analog input channel 6; 16-bit timer match - supports analog sensing and synchronized event triggering (e.g., sample-and-hold timing). |
| 9 | XTALIN | Crystal oscillator input - connects to external crystal; internal load capacitors enabled by default. |
| 10 | R / PIO0_11 / AD0 / CT32B0_MAT3 | Reset input (active-low); ADC channel 0; 32-bit timer match - dual-role pin enables hardware reset and analog monitoring with precise timing. |
| 11 | PIO0_1 / CLKOUT / CT32B0_MAT2 | Programmable clock output; 32-bit timer match - provides system clock visibility or timing reference for external ICs. |
| 12 | R / PIO1_0 / AD1 / CT32B1_CAP0 | Reset input (active-low); ADC channel 1; 32-bit timer capture - supports analog acquisition synchronized to external events. |
| 13 | RESET / PIO0_0 | Primary reset input (active-low) - initiates cold boot and clears internal state; pulled high internally via 100 kΩ resistor. |
| 14 | R / PIO1_1 / AD2 / CT32B1_MAT0 | Reset input (active-low); ADC channel 2; 32-bit timer match - enables redundant reset path and multi-channel analog sampling. |
| 15 | PIO2_0 / DTR | Data Terminal Ready signal - used for flow control in UART-based modem or RS-485 transceiver enable sequencing. |
| 16 | R / PIO1_2 / AD3 / CT32B1_MAT1 | Reset input (active-low); ADC channel 3; 32-bit timer match - extends analog input count and supports timer-driven sampling. |
| 17 | PIO0_3 | General-purpose I/O - configurable as interrupt source (edge/level sensitive); supports wake-up from Deep-sleep mode. |
| 18 | PIO0_4 / SCL | I²C clock line - bidirectional open-drain; supports Fast-mode Plus (1 Mbit/s) with internal pull-up control. |
| 19 | PIO0_5 / SDA | I²C data line - bidirectional open-drain; supports Fast-mode Plus (1 Mbit/s) and multi-address recognition. |
| 20 | PIO1_9 / CT16B1_MAT0 | 16-bit timer match output - generates precise timing pulses (e.g., for PWM-driven solenoids or relays). |
| 21 | PIO3_4 | General-purpose I/O - supports high-current sink (20 mA) and configurable pull-up/pull-down resistors. |
| 22 | PIO3_5 | General-purpose I/O - supports edge/level interrupt and wake-up from Deep-sleep mode via dedicated start logic. |
| 23 | PIO0_6 / SCK0 | SPI0 clock - master or slave mode; supports frame synchronization for sensor data acquisition. |
| 24 | PIO0_7 / CTS | Clear To Send input for UART - enables hardware flow control in RS-485 half-duplex configurations. |
| 25 | PIO1_7 / TXD / CT32B0_MAT1 | UART transmit; 32-bit timer match - drives RS-485 transceiver DE/RE lines and generates timed serial bursts. |
| 26 | PIO1_6 / RXD / CT32B0_MAT0 | UART receive; 32-bit timer match - captures incoming RS-485 frames and triggers time-stamped logging. |
| 27 | PIO1_5 / RTS / CT32B0_CAP0 | Request To Send output; 32-bit timer capture - controls RS-485 direction switching and measures pulse intervals. |
| 28 | VDD | Core and I/O supply (1.8–3.6 V) - second VDD pin improves power integrity; requires separate 100 nF ceramic decoupling. |
| 29 | PIO3_2 | General-purpose I/O - supports configurable open-drain mode (not available on LPC1100 series - confirmed absent per datasheet Table 2). |
| 30 | PIO1_11 / AD7 | Analog input channel 7 - completes 8-channel ADC set; supports differential or single-ended measurements. |
| 31 | PIO1_4 / AD5 / CT32B1_MAT3 / WAKEUP | ADC channel 5; 32-bit timer match; wake-up source - enables low-power sleep with analog threshold-triggered wake-up. |
| 32 | SWDIO / PIO1_3 / AD4 / CT32B1_MAT2 | SWD data I/O; ADC channel 4; 32-bit timer match - enables debug, analog monitoring, and precise event generation on same pin. |
| 33 | VSS | Ground (exposed thermal pad) - must be soldered to PCB ground plane for thermal and EMI performance. |
Key Features
| Feature | Design Value |
|---|---|
| ARM Cortex-M0 + NVIC | Enables deterministic interrupt latency (<12 cycles) and efficient RTOS integration for real-time control loops. |
| In-System Programming (ISP) | Allows field firmware updates via UART without external programmer - reduces maintenance cost in deployed lighting or alarm units. |
| 10-bit ADC with 8-channel mux | Supports concurrent analog monitoring of up to eight sensors (e.g., ambient light, temperature, supply rail) with single hardware resource. |
| RS-485 UART with FIFO | Enables noise-immune, multi-drop serial communication over distances >1000 m - critical for building automation and industrial control networks. |
| Four general-purpose timers | Provides up to 13 match outputs and 8 capture inputs - supports complex timing tasks like PWM generation, input capture, and quadrature decoding. |
| Serial Wire Debug (SWD) | Two-pin debug interface (SWCLK/SWDIO) - simplifies PCB layout and enables non-intrusive real-time debugging in space-constrained applications. |
Applications
| Lighting Control | Alarm Systems |
|---|---|
Use Scenario: Smart LED driver board managing dimming, color mixing, and DALI/KNX gateway functions in commercial lighting fixtures. IC Role / Device Role / Timing Role: Main controller executing lighting algorithms, driving PWM outputs, and handling DALI physical layer via UART and GPIO. Use Value: 32 kB flash stores lighting profiles and communication stacks; 8 kB SRAM buffers DALI messages; HVQFN33 enables compact thermal design. | Use Scenario: Wireless security panel with wired zone inputs, siren control, and RS-485 keypad interface. IC Role / Device Role / Timing Role: Central MCU managing sensor polling, alarm logic, siren timing, and RS-485 communication with keypads and repeaters. Use Value: RS-485 UART ensures reliable keypad communication over 300+ meters; 10-bit ADC monitors battery voltage and tamper switches. |
| eMetering | White Goods |
Use Scenario: Single-phase electricity meter with pulse output, LCD, and optical port for utility data readout. IC Role / Device Role / Timing Role: Metering controller acquiring current/voltage samples via ADC, calculating kWh, and driving optical IR transmitter via GPIO. Use Value: 50 MHz Cortex-M0 delivers sufficient MIPS for real-time RMS calculation; UART supports optical port protocol at 300–9600 bps. | Use Scenario: Washing machine main control board managing motor drive, water valves, temperature sensing, and user interface. IC Role / Device Role / Timing Role: System-on-chip managing appliance state machine, reading thermistor/NTC via ADC, controlling triac drivers, and communicating with display module. Use Value: Four timers coordinate motor commutation, valve timing, and buzzer alerts; 28 GPIOs interface with diverse sensors and actuators. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC1114FBD48/301 | LQFP48 package (48 pins), 42 GPIO, same 32 kB flash/8 kB SRAM, includes second SPI interface. | Supports higher peripheral count and larger PCB layouts; lacks HVQFN33 thermal advantage. | Select when additional GPIO or SPI is required and board area permits LQFP48. |
| LPC1114FHN33/302 | LPC1100L series variant: adds power profiles and standard WDT (no windowed WDT), identical pinout and memory. | Enables dynamic power optimization in battery-powered alarm sensors or portable meters. | Select when active power management (Sleep/Deep-sleep modes) is critical and firmware supports power profile API calls. |
Compared with LPC1114FHN33/301, the LQFP48 alternative offers expanded I/O and SPI capability at the cost of size and thermal performance, while the LPC1100L variant adds runtime power optimization features without altering footprint or memory - enabling drop-in upgrades where power efficiency outweighs feature parity.
Availability
LPC1114FHN33/301 is available at Aetrix Electronics and suitable for lighting control, alarm systems, and eMetering requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant manufacturing.
Supply support for LPC1114FHN33/301 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The LPC1100 series targets cost-sensitive 8/16-bit MCU replacements, emphasizing low power, small footprint, and integrated analog/digital peripherals for embedded control in appliances and infrastructure.
FAQ
What is the maximum operating frequency of the LPC1114FHN33/301?
The LPC1114FHN33/301 operates at a maximum CPU frequency of 50 MHz, achieved via its internal PLL driven by either the 12 MHz internal RC oscillator (±1 % accuracy) or an external crystal (1–25 MHz). This frequency enables real-time processing of sensor data and protocol stacks while maintaining low power consumption in the HVQFN33 package.
Does the LPC1114FHN33/301 support a second SPI interface?
No, the LPC1114FHN33/301 does not support a second SPI interface. As a member of the base LPC1100 series (not LPC1100L or LPC1100XL), it includes only one SPI controller (SPI0) with SSP features. The second SPI (SPI1) is exclusive to LQFP48-packaged variants such as LPC1114FBD48/301 and requires the larger pin count to expose those signals.
What ADC resolution and channel count does the LPC1114FHN33/301 provide?
The LPC1114FHN33/301 integrates a 10-bit successive approximation register (SAR) ADC with input multiplexing across 8 pins (AD0–AD7), all accessible in the HVQFN33 package. This configuration supports simultaneous sampling of multiple analog sources - such as temperature sensors, light detectors, or supply rails - without external multiplexers or additional ICs.
Is the LPC1114FHN33/301 compatible with power profile APIs for dynamic power management?
No, the LPC1114FHN33/301 does not support power profiles. It belongs to the base LPC1100 series, which lacks the boot ROM-resident power profile API found in LPC1100L and LPC1100XL variants. Power management is limited to Sleep, Deep-sleep, and Deep power-down modes controlled directly via PMU registers, without runtime optimization presets.
What debug interface does the LPC1114FHN33/301 use, and how many pins are required?
The LPC1114FHN33/301 uses Serial Wire Debug (SWD), requiring only two pins: SWCLK (pin 6) and SWDIO (pin 32). This two-wire interface replaces JTAG, reducing PCB routing complexity and enabling non-intrusive real-time debugging - essential for validating timing-critical functions like UART RS-485 framing or ADC sampling in the LPC1114FHN33/301.
LPC1114FHN33/301,5 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 32-VQFN Exposed Pad
- Series:
- LPC1100
- Packaging:
- Tray
- Product Status:
- Discontinued at Digi-Key
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0
- Core Size:
- 32-Bit Single-Core
- Speed:
- 50MHz
- Connectivity:
- I2C, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, WDT
- Number of I/O:
- 28
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 8K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 8x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC1114FHN33/301,5 FAQ
1.How can I place an order for LPC1114FHN33/301,5 through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC1114FHN33/301,5 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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5.How can I obtain technical support or documentation for LPC1114FHN33/301,5?
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6.How does Aetrix verify that LPC1114FHN33/301,5 is sourced from the original manufacturer or authorized distributors?
All LPC1114FHN33/301,5 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC1114FHN33/301,5 meets industry standards.
7.What is the process for return or replacement of LPC1114FHN33/301,5?
All LPC1114FHN33/301,5 units undergo pre-shipment inspection (PSI). If there is an issue with LPC1114FHN33/301,5, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC1114FHN33/301,5 part is unused and in its original packaging.
Return procedure for LPC1114FHN33/301,5:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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