NXP Semiconductors LPC11E11FHN33/101,
- Part No.:
- LPC11E11FHN33/101,
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 32-VQFN Exposed Pad
- Datasheet:
-
LPC11E11FHN33/101,.pdf
- Description:
- LPC11Exx - Scalable Entry Level
- Quantity:
- Payment:

- Shipping:

Inventory:260
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Product details
Overview
LPC11E11FHN33/101 from NXP Semiconductors is a 32-bit ARM Cortex-M0 microcontroller in HVQFN33 package, operating up to 50 MHz with 96 kB flash, 12 kB SRAM, and 4 kB EEPROM. It integrates a 10-bit ADC (8-channel), one USART with RS-485/smart card support, two SSP interfaces, Fast-mode Plus I²C (1 Mbit/s), four timers, and 28 GPIO pins - designed for compact industrial control and handheld scanner applications.
For engineers reviewing the LPC11E11FHN33/101 datasheet, LPC11E11FHN33/101 pinout, LPC11E11FHN33/101 application, or LPC11E11FHN33/101 equivalent, key selection considerations include its HVQFN33 footprint, 28 GPIO count, 4 kB on-chip EEPROM with byte-level erasability, fractional baud rate generation in USART, and Deep power-down wake-up via dedicated WAKEUP pin.
Technical Context
The LPC11E11FHN33/101 implements an ARM Cortex-M0 core with NVIC supporting 24 vectored interrupts and four priority levels. Its clock system combines a 1–25 MHz crystal oscillator, 12 MHz internal RC oscillator, and PLL for CPU operation at up to 50 MHz.
Power management includes four low-power modes (Sleep, Deep-sleep, Power-down, Deep power-down) controlled by an integrated PMU, with wake-up sources including GPIO, watchdog, and the dedicated WAKEUP pin. The device features 5 V-tolerant GPIOs with configurable pull-ups, repeater mode, and open-drain capability on select pins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M0, 32-bit RISC architecture with Thumb-2 instruction set - enables efficient code density and deterministic real-time response. |
| Max Clock Frequency | 50 MHz - supports high-speed peripheral handling and real-time control loops without external clock multiplication. |
| Flash Memory | 96 kB sector- and page-erasable flash - allows field firmware updates via ISP/IAP with 4 kB sector granularity and 256-byte page erase. |
| EEPROM | 4 kB byte-erasable and byte-programmable - retains calibration data or configuration settings across power cycles without external memory. |
| ADC | 10-bit SAR ADC with 8 input channels - provides sufficient resolution for sensor interfacing in medical and industrial monitoring. |
| I²C Interface | Fast-mode Plus compliant (1 Mbit/s) - enables high-speed communication with sensors and displays while maintaining backward compatibility with standard I²C devices. |
| GPIO Count | 28 general-purpose I/O pins - matches HVQFN33 package pin count and supports mixed digital/analog functions with configurable drive strength. |
Pinout & Package
HVQFN33 (7 × 7 × 0.85 mm, no leads, 33 terminals) thermal-enhanced package optimized for space-constrained PCB layouts and improved heat dissipation in portable and embedded systems.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RESET/PIO0_0 | Reset input / GPIO port 0 pin 0 | Active-low reset with 20 ns glitch filter; also serves as debug select input (LOW = JTAG, HIGH = SWD). |
| SWDIO/PIO0_15/AD4/CT32B1_MAT2 | SWD debug I/O / GPIO / ADC input 4 / Timer match output | Multi-function pin enabling debug access, analog sensing, and precise timing control without additional routing. |
| PIO0_16/AD5/CT32B1_MAT3/WAKEUP | GPIO / ADC input 5 / Timer match output / Deep power-down wake-up | Dedicated wake-up pin with 20 ns glitch filter - enables ultra-low-power operation and reliable exit from Deep power-down mode. |
| XTALIN / XTALOUT | Crytal oscillator inputs | Supports 1–25 MHz external crystal; XTALIN accepts ≤1.8 V input - requires external crystal and load capacitors for precision timing. |
| VDD / VSS | Supply voltage / Ground | Single 3.3 V supply (1.8–3.6 V range); VDD also serves as ADC reference - simplifies power design and improves analog accuracy. |
Key Features
| Feature | Design Value |
|---|---|
| On-chip EEPROM | 4 kB byte-erasable and byte-programmable memory with ROM-based API - eliminates need for external EEPROM in data-logging or calibration-critical designs. |
| Smart Card Interface | USART supports ISO 7816-3 asynchronous smart card protocol - enables secure authentication in medical or access-control peripherals. |
| Low-Power Modes | Four reduced-power states (Deep power-down down to 100 nA) with pin-selectable wake-up - extends battery life in handheld scanners and portable diagnostics. |
| 5 V-Tolerant GPIOs | 28 pins tolerant to 5 V logic levels with configurable pull-up/pull-down - simplifies interface to legacy 5 V peripherals without level shifters. |
| Windowed Watchdog | Programmable WWDT with dedicated low-power oscillator - prevents runaway code in safety-critical industrial controllers without relying on main clock. |
Applications
| Industrial Sensor Node | Handheld Barcode Scanner |
|---|---|
Use Scenario: Compact, battery-powered sensor node collecting temperature, humidity, and vibration data in factory environments. IC Role / Device Role / Timing Role: Main controller managing ADC sampling, I²C sensor reads, RS-485 data transmission, and low-power scheduling. Use Value: 4 kB EEPROM stores calibration coefficients; Deep power-down mode reduces average current to <1 µA between 10-second measurement intervals. | Use Scenario: Portable barcode reader with laser or imager module, USB/RS-485 host interface, and button-driven UI. IC Role / Device Role / Timing Role: Central MCU coordinating imaging trigger, decode engine interface, serial communication, and power sequencing. Use Value: 28 GPIOs route scan trigger, LED indicators, and UART signals; 5 V-tolerant pins directly interface with legacy scanner modules. |
| Medical Diagnostic Tool | Smart Energy Meter Interface |
Use Scenario: Portable blood glucose or ECG monitor requiring FDA-compliant firmware storage and analog signal acquisition. IC Role / Device Role / Timing Role: Safety-certified controller executing calibrated ADC routines, secure data logging, and USB/UART telemetry. Use Value: On-chip 4 kB EEPROM holds factory calibration and user settings; 10-bit ADC meets IEC 60601-2-51 resolution requirements for diagnostic-grade analog front-end. | Use Scenario: DIN-rail mounted energy meter with pulse counting, tariff switching, and HAN (Home Area Network) communication. IC Role / Device Role / Timing Role: Secondary controller handling tamper detection, LCD driver, IR/PLC interface, and secure firmware updates. Use Value: Fast-mode Plus I²C (1 Mbit/s) drives multi-segment LCD at full refresh rate; WAKEUP pin enables instant response to utility command pulses. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC11U11FHN33/101 | Same package and pinout; adds USB 2.0 device controller and enhanced bootloader - no EEPROM, reduced flash (32 kB). | Better suited for USB-connected peripherals; lacks non-volatile data retention for calibration or event logs. | Select when USB connectivity is mandatory and EEPROM is unnecessary. |
| STM32F030F4P6 | 48-pin TSSOP; 16 kB flash, 4 kB SRAM, no EEPROM; 12-bit ADC, single USART, no SSP or I²C Fast-mode Plus. | Lower cost for basic control tasks; insufficient peripheral count and memory for multi-interface industrial nodes. | Select for cost-sensitive, low-peripheral-count applications where EEPROM and dual SSP are not required. |
Compared with LPC11U11FHN33/101, the LPC11E11FHN33/101 prioritizes persistent data storage over USB connectivity; versus STM32F030F4P6, it delivers higher integration (EEPROM, dual SSP, Fast-mode Plus I²C) at the expense of slightly higher unit cost and larger software footprint.
Availability
LPC11E11FHN33/101 is available at Aetrix Electronics and suitable for industrial control, handheld scanners, and medical diagnostics requiring stable component supply, long-term lifecycle support, and verified qualification across extended temperature ranges.
Supply support for LPC11E11FHN33/101 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The LPC11E3x family - including LPC11E11FHN33/101 - was engineered for cost-sensitive, low-power 32-bit replacement of 8/16-bit MCUs in space-constrained embedded systems requiring robust analog integration and field-upgradable firmware.
FAQ
What is the maximum operating frequency of the LPC11E11FHN33/101?
The LPC11E11FHN33/101 operates at a maximum CPU frequency of 50 MHz, achievable using either the internal 12 MHz IRC oscillator with PLL multiplication or an external 1–25 MHz crystal oscillator. This frequency is fully supported across the specified −40 °C to +85 °C temperature range and 1.8–3.6 V supply voltage, with all peripherals functional at full speed.
Does the LPC11E11FHN33/101 include on-chip EEPROM, and how is it accessed?
Yes, the LPC11E11FHN33/101 integrates 4 kB of on-chip EEPROM that is byte-erasable and byte-programmable. Access is provided through ROM-based Application Programming Interfaces (APIs) callable from firmware, enabling reliable non-volatile storage of calibration data, device identifiers, or configuration parameters without external components.
How many GPIO pins does the LPC11E11FHN33/101 provide, and what special capabilities do they support?
The LPC11E11FHN33/101 provides 28 GPIO pins in its HVQFN33 package. These support configurable pull-up/pull-down resistors, repeater mode, open-drain operation, and 5 V tolerance. Up to eight pins can serve as edge- or level-sensitive interrupt sources, and two grouped interrupt modules allow pattern-matching logic across GPIO subsets.
What low-power modes are available on the LPC11E11FHN33/101, and how is wake-up implemented from Deep power-down?
The LPC11E11FHN33/101 supports Sleep, Deep-sleep, Power-down, and Deep power-down modes. Wake-up from Deep power-down is exclusively enabled via the dedicated WAKEUP pin (PIO0_16), which features a 20 ns glitch filter. A LOW-going pulse ≥50 ns pulls the device out of Deep power-down and initiates reset sequence - no other pin or peripheral can trigger wake-up from this state.
Is the LPC11E11FHN33/101 pin-compatible with other members of the LPC11E3x family?
No, the LPC11E11FHN33/101 is not pin-compatible with LQFP48 or LQFP64 variants of the LPC11E3x family. It uses the HVQFN33 package with 33 terminals, whereas LQFP48 has 48 leads and LQFP64 has 64 leads. Pin functions differ significantly across packages - for example, CT32B1_CAP1 appears only on LQFP64, and AD7 is mapped to PIO0_23 in HVQFN33 but not available on all package variants.
LPC11E11FHN33/101, Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 32-VQFN Exposed Pad
- Series:
- LPC11E1x
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M0
- Core Size:
- 32-Bit
- Speed:
- 50MHz
- Connectivity:
- I2C, Microwire, SPI, SSI, SSP, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, WDT
- Number of I/O:
- 28
- Program Memory Size:
- 8KB (8K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 512 x 8
- RAM Size:
- 4K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 8x10b SAR
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC11E11FHN33/101, FAQ
1.How can I place an order for LPC11E11FHN33/101, through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC11E11FHN33/101, on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC11E11FHN33/101, reliable?
The price and inventory of LPC11E11FHN33/101, are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC11E11FHN33/101, is usually 5 days.
3.What payment methods are accepted for LPC11E11FHN33/101,?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC11E11FHN33/101, transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC11E11FHN33/101,?
LPC11E11FHN33/101, orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC11E11FHN33/101, order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC11E11FHN33/101,?
For technical support, including LPC11E11FHN33/101, datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC11E11FHN33/101, requirements.
6.How does Aetrix verify that LPC11E11FHN33/101, is sourced from the original manufacturer or authorized distributors?
All LPC11E11FHN33/101, products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC11E11FHN33/101, meets industry standards.
7.What is the process for return or replacement of LPC11E11FHN33/101,?
All LPC11E11FHN33/101, units undergo pre-shipment inspection (PSI). If there is an issue with LPC11E11FHN33/101,, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC11E11FHN33/101, part is unused and in its original packaging.
Return procedure for LPC11E11FHN33/101,:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LPC11E11FHN33/101, Tags

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