NXP Semiconductors LPC11U13FBD48/201,
- Part No.:
- LPC11U13FBD48/201,
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
LPC11U13FBD48/201,.pdf
- Description:
- IC MCU 32BIT 24KB FLASH 48LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC11U13FBD48/201 from NXP Semiconductors is a 32-bit ARM Cortex-M0 microcontroller in LQFP48 package, operating at up to 50 MHz with 24 kB flash, 6 kB SRAM (4 kB main + 2 kB USB), and integrated Full-Speed USB 2.0 device controller. It delivers low-power embedded control for USB-connected peripherals requiring deterministic timing, analog sensing, and multi-protocol serial interfacing.
For engineers reviewing the LPC11U13FBD48/201 datasheet, LPC11U13FBD48/201 pinout, LPC11U13FBD48/201 application, or LPC11U13FBD48/201 equivalent, key selection criteria include USB device stack support, 10-bit ADC with 8-channel multiplexing, dual SSP interfaces, I²C Fast-mode Plus (1 Mbit/s), and wake-up capability from Deep power-down mode via dedicated WAKEUP pin.
Technical Context
The LPC11U13FBD48/201 implements an ARM Cortex-M0 core with NVIC and NMI support, paired with two independent PLLs-one for CPU clocking (up to 50 MHz) and a dedicated one for USB 48 MHz clock generation. Its memory subsystem includes boot ROM with ISP/IAP firmware, 32-bit integer division routines, and configurable power profiles.
Digital peripheral routing is managed through programmable IOCON registers per pin, enabling flexible function assignment across GPIO ports 0 and 1. The device supports up to 40 GPIO pins with configurable pull-up/pull-down, glitch filtering on eight pins, and high-current drive (20 mA sink/source) on specific pins including P0_4, P0_5, and P0_7.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M0, 32-bit RISC, up to 50 MHz operation - enables efficient execution of real-time control tasks with Thumb-2 instruction set and low code footprint. |
| Memory | 24 kB flash / 6 kB SRAM (4 kB main + 2 kB USB-dedicated) - sufficient for USB device firmware with HID/CDC class stacks and local data buffering. |
| USB Interface | Full-Speed USB 2.0 device controller with dedicated PLL - supports plug-and-play connectivity without external PHY; USB_VBUS monitoring and SoftConnect (USB_CONNECT) enable host-driven enumeration. |
| Analog Input | 10-bit ADC with 8 input channels (AD0–AD7) - provides precision sensing for battery monitoring, environmental sensors, or user interface feedback in portable devices. |
| Serial Peripherals | 1× I²C Fast-mode Plus (1 Mbit/s), 2× SSP (SPI/SSI), 1× USART with RS-485/ISO7816 smart card support - enables concurrent communication with displays, EEPROMs, transceivers, and secure elements. |
| Power Management | Four low-power modes (Sleep, Deep-sleep, Power-down, Deep power-down) with wake-up via GPIO, USB activity, or dedicated WAKEUP pin - extends battery life in handheld scanners and medical monitors. |
| Package & Temp | LQFP48 (7 × 7 × 1.4 mm), −40 °C to +85 °C industrial grade - compatible with standard reflow processes and suitable for space-constrained, thermally demanding applications. |
Pinout & Package
LQFP48 package (SOT313-2), 48-pin plastic low-profile quad flat package with 0.5 mm pitch, body size 7 × 7 × 1.4 mm, exposed pad not present.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RESET/PIO0_0 | Reset input / GPIO | Active-low reset with 20 ns glitch filter; also functions as debug select (JTAG/SWD) and general-purpose I/O. |
| USB_DP / USB_DM | USB differential pair | Full-Speed USB 2.0 bidirectional D+ and D− lines compliant with USB specification; not 5 V tolerant. |
| PIO0_1/CLKOUT/CT32B0_MAT2/USB_FTOGGLE | Multiplexed output | Provides USB Start-of-Frame toggle signal, timer match output, or system clock output - critical for USB synchronization and timing-critical peripherals. |
| PIO0_3/USB_VBUS | USB power detection | Monitors presence of USB bus voltage; used by firmware to initiate device enumeration only when VBUS is valid. |
| PIO0_6/USB_CONNECT/SCK0 | USB control / SSP clock | Software-controlled 1.5 kΩ pull-up enable for SoftConnect USB; also serves as SSP0 clock - simplifies USB attach/detach handling without external components. |
| PIO0_16/AD5/CT32B1_MAT3/WAKEUP | Analog input / timer / wake source | Dedicated Deep power-down wake-up pin with 50 ns pulse sensitivity; doubles as ADC channel 5 and timer match output - enables ultra-low-power sensor polling. |
Key Features
| Feature | Design Value |
|---|---|
| ARM Cortex-M0 with NVIC | Hardware interrupt prioritization and vectoring reduces ISR latency to ≤12 cycles - essential for responsive USB endpoint handling and real-time sensor sampling. |
| Dual PLL architecture | Separate CPU and USB PLLs eliminate clock domain conflicts and ensure stable 48 MHz USB timing independent of system oscillator drift or frequency changes. |
| Boot ROM with IAP/ISP | Field-upgradable firmware via UART or USB without external programmer - enables remote updates in deployed consumer peripherals and medical devices. |
| Configurable GPIO with glitch filter | Eight pins support programmable digital input filtering (20 ns), preventing false interrupts from noisy switch inputs or ESD events in industrial environments. |
| USB-dedicated 2 kB SRAM | On-chip RAM isolated from main memory space - guarantees deterministic USB packet buffering and avoids cache coherency issues during high-throughput transfers. |
Applications
| USB Audio Interface | Handheld Medical Scanner |
|---|---|
Use Scenario: Embedded USB audio class (UAC) device transmitting microphone input or headphone playback to host PC or mobile device. IC Role / Device Role / Timing Role: USB device controller with integrated 10-bit ADC and DAC-capable GPIO; provides precise 1 ms SOF timing via USB_FTOGGLE pin. Use Value: Eliminates external USB PHY and audio codec; 24 kB flash accommodates UAC descriptor tables and sample rate conversion logic. | Use Scenario: Portable barcode or RFID scanner powered by coin cell, requiring rapid wake-from-sleep on button press and low-latency image capture. IC Role / Device Role / Timing Role: Main controller managing laser/LED driver, CMOS sensor interface, and USB HID report transmission; uses WAKEUP pin for sub-100 µs resume. Use Value: Deep power-down current < 1 µA extends battery life to >1 year; 40 GPIO support direct connection to scan engine and status LEDs. |
| Industrial RS-485 Gateway | Smart Card Reader Module |
Use Scenario: Protocol translator between USB host and legacy Modbus RTU field devices over RS-485 bus. IC Role / Device Role / Timing Role: USB-to-serial bridge with hardware flow control (RTS/CTS), automatic direction control, and fractional baud rate generator for 9600–115200 bps. Use Value: Single-chip solution replaces discrete level shifters and UART ICs; USART supports EIA-485 electrical compliance and synchronous mode for deterministic timing. | Use Scenario: Contact-based smart card reader for access control or payment terminals, compliant with ISO/IEC 7816-3 asynchronous T=0 protocol. IC Role / Device Role / Timing Role: Smart card interface controller with built-in clock generation, voltage regulation, and guard time management; uses dedicated USART with smart card mode. Use Value: Reduces BOM count by integrating card power switching, clock control, and protocol state machine - certified for EMV Level 1 compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC11U14FBD48/201 | 32 kB flash (vs. 24 kB), same SRAM, peripherals, and pinout | Better suited for larger USB class stacks (e.g., MSC + HID composite) or firmware with bootloader + application partitioning | Select when firmware size exceeds 24 kB or future-proofing for feature expansion is required. |
| LPC1343FBD48 | ARM Cortex-M3 core, 72 MHz, 32 kB flash, no USB device controller (requires external PHY) | Higher performance for complex signal processing but lacks native USB device capability and requires additional components | Choose only if M3 instruction set compatibility or higher CPU throughput is mandatory and USB integration complexity is acceptable. |
Compared with LPC11U14FBD48/201, the LPC11U13FBD48/201 trades 8 kB flash for cost-sensitive designs where USB HID or CDC firmware fits comfortably; versus LPC1343FBD48, it offers true single-chip USB device integration at lower power and reduced BOM, albeit with Cortex-M0 performance limits.
Availability
LPC11U13FBD48/201 is available at Aetrix Electronics and suitable for USB peripheral development, handheld medical instrumentation, industrial RS-485 gateways, and smart card reader modules requiring stable component supply and long-term manufacturability.
Supply support for LPC11U13FBD48/201 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in ARM-based microcontrollers and mixed-signal integration.
The LPC11U1x product line was designed specifically for cost-sensitive, USB-enabled embedded systems requiring low power, small footprint, and seamless host interoperability - targeting consumer peripherals, point-of-care diagnostics, and industrial edge nodes.
FAQ
What is the maximum operating frequency of the LPC11U13FBD48/201?
The LPC11U13FBD48/201 operates at a maximum CPU frequency of 50 MHz, achievable using either the internal 12 MHz IRC oscillator with PLL multiplication or an external crystal (1–25 MHz) fed into the system oscillator. This frequency is sustained across the full industrial temperature range (−40 °C to +85 °C) under 3.3 V supply conditions.
Does the LPC11U13FBD48/201 support USB device functionality without external components?
Yes, the LPC11U13FBD48/201 integrates a full-speed USB 2.0 device controller with on-chip transceivers, eliminating the need for an external PHY. It supports SoftConnect via the USB_CONNECT pin (P0_6) and VBUS monitoring via USB_VBUS (P0_3), enabling fully self-contained USB enumeration and attachment detection.
How many analog-to-digital converter channels does the LPC11U13FBD48/201 provide?
The LPC11U13FBD48/201 includes a 10-bit ADC with eight single-ended input channels (AD0 through AD7), mapped to GPIO pins PIO0_11, PIO0_12, PIO0_13, PIO0_14, PIO0_15, PIO0_16, PIO0_22, and PIO0_23. Each channel supports programmable sampling control and can be triggered by timers or software.
Is the LPC11U13FBD48/201 pin-compatible with other members of the LPC11U1x family?
Yes, the LPC11U13FBD48/201 is pin-compatible with all LQFP48 variants in the LPC11U1x series, including LPC11U12FBD48/201 and LPC11U14FBD48/201. Identical pin assignments and electrical characteristics allow drop-in replacement within the same package footprint, simplifying design reuse and migration paths.
What debug interfaces are supported by the LPC11U13FBD48/201?
The LPC11U13FBD48/201 supports both JTAG (via TDI, TDO, TMS, TRST, TCK) and Serial Wire Debug (SWD) interfaces using shared pins (SWDIO on PIO0_15, SWCLK on PIO0_10). Debug access remains functional in all power modes except Deep power-down, and no external debug probe is required for basic programming and tracing.
LPC11U13FBD48/201, Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 48-LQFP
- Series:
- LPC11Uxx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0
- Core Size:
- 32-Bit Single-Core
- Speed:
- 50MHz
- Connectivity:
- I2C, Microwire, SmartCard, SPI, SSP, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, POR, WDT
- Number of I/O:
- 40
- Program Memory Size:
- 24KB (24K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 6K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 8x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC11U13FBD48/201, FAQ
1.How can I place an order for LPC11U13FBD48/201, through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC11U13FBD48/201, on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC11U13FBD48/201, reliable?
The price and inventory of LPC11U13FBD48/201, are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC11U13FBD48/201, is usually 5 days.
3.What payment methods are accepted for LPC11U13FBD48/201,?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC11U13FBD48/201, transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC11U13FBD48/201,?
LPC11U13FBD48/201, orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC11U13FBD48/201, order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC11U13FBD48/201,?
For technical support, including LPC11U13FBD48/201, datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC11U13FBD48/201, requirements.
6.How does Aetrix verify that LPC11U13FBD48/201, is sourced from the original manufacturer or authorized distributors?
All LPC11U13FBD48/201, products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC11U13FBD48/201, meets industry standards.
7.What is the process for return or replacement of LPC11U13FBD48/201,?
All LPC11U13FBD48/201, units undergo pre-shipment inspection (PSI). If there is an issue with LPC11U13FBD48/201,, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC11U13FBD48/201, part is unused and in its original packaging.
Return procedure for LPC11U13FBD48/201,:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LPC11U13FBD48/201, Tags

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