NXP Semiconductors LPC11U14FBD48/20EL
- Part No.:
- LPC11U14FBD48/20EL
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
LPC11U14FBD48/20EL.pdf
- Description:
- IC MCU 32BIT 32KB FLASH 48LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:800
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LPC11U14FBD48/20EL from NXP Semiconductors is a 32-bit ARM Cortex-M0 microcontroller in LQFP48 package, operating up to 50 MHz with 32 kB flash, 6 kB SRAM (4 kB main + 2 kB USB), and integrated Full-Speed USB 2.0 device controller. It delivers low-power connectivity for embedded USB peripherals requiring deterministic real-time control, such as handheld scanners and medical sensor interfaces.
For engineers reviewing the LPC11U14FBD48/20EL datasheet, LPC11U14FBD48/20EL pinout, LPC11U14FBD48/20EL application, or LPC11U14FBD48/20EL equivalent, key selection criteria include USB device stack readiness, 10-bit ADC with 8-channel multiplexing, dual SSP interfaces for SPI/SSI/Microwire, I²C Fast-mode Plus support (1 Mbit/s), and wake-up capability from Deep power-down via dedicated WAKEUP pin (PIO0_16).
Technical Context
The LPC11U14FBD48/20EL integrates two independent PLLs-one for CPU clock generation (up to 50 MHz) and a second dedicated PLL for USB timing compliance-ensuring stable full-speed USB operation without CPU clock dependency. Its memory subsystem includes boot ROM with ISP/IAP firmware, 32-bit integer division routines, and configurable power profiles enabling single-function-call transitions between Sleep, Deep-sleep, Power-down, and Deep power-down modes.
Digital peripheral routing is managed through programmable IOCON registers per pin, supporting simultaneous configuration of pull-up/down, repeater mode, open-drain, and glitch filtering (on eight GPIO pins). The NVIC supports nested interrupts with priority levels, while two GPIO group interrupt modules allow pattern-matching logic across configurable pin sets for efficient event-driven wake-up.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M0, 32-bit RISC, up to 50 MHz operation with hardware divide and NVIC |
| Memory | 32 kB on-chip flash (ISP/IAP programmable); 6 kB SRAM (4 kB main + 2 kB USB-dedicated) |
| USB Interface | Full-Speed USB 2.0 device controller with dedicated PLL, SoftConnect support, and VBUS monitoring |
| Analog Peripherals | 10-bit ADC with 8 input channels (AD0–AD7), programmable sample rate and burst mode |
| Digital Interfaces | 1× I²C Fast-mode Plus (1 Mbit/s), 2× SSP (SPI/SSI/Microwire), 1× USART with RS-485/ISO7816 smart card support |
| GPIO & Timers | 40 general-purpose I/O pins (5 V tolerant), 4 timers (2× 32-bit, 2× 16-bit), 8-pin programmable glitch filter |
| Power Management | Four low-power modes; Deep power-down wake-up via PIO0_16; Brownout detect with 4 thresholds |
Pinout & Package
Package: LQFP48 (plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm; SOT313-2).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RESET/PIO0_0 | Reset input / GPIO | External reset with 20 ns glitch filter; also debug select (LOW = JTAG, HIGH = SWD); must be pulled HIGH in Deep power-down |
| USB_DP / USB_DM | USB differential pair | Full-Speed USB 2.0 D+ and D− lines compliant with USB rev 2.0; not 5 V tolerant |
| PIO0_16/AD5/CT32B1_MAT3/WAKEUP | Multi-function GPIO | ADC input 5, timer match output, and dedicated Deep power-down wake-up pin with 50 ns pulse sensitivity |
| PIO0_4/SCL & PIO0_5/SDA | I²C bus interface | Open-drain I²C Fast-mode Plus (1 Mbit/s) pins with high-current sink when enabled; require external pull-ups |
| PIO0_18/RXD & PIO0_19/TXD | USART primary interface | UART ISP-capable RX/TX pair; support asynchronous, synchronous, RS-485, and ISO 7816 smart card modes |
Key Features
| Feature | Design Value |
|---|---|
| Dual PLL architecture | Independent CPU and USB PLLs eliminate clock coupling; enables simultaneous high-performance core execution and USB timing compliance |
| Configurable GPIO matrix | Per-pin IOCON registers enable runtime reassignment of functions (e.g., UART ↔ SSP), pull-up/down, hysteresis, and glitch filtering |
| USB-ready firmware stack | Boot ROM includes USB device descriptor handling and SoftConnect control (PIO0_6 toggles 1.5 kΩ pull-up for enumeration) |
| Low-power wake-up intelligence | Two GPIO group interrupt modules allow pattern-triggered wake-up from Deep-sleep/Power-down without CPU intervention |
| Robust analog integration | 10-bit ADC with internal reference (VDD), 8-channel mux, and burst conversion mode reduces software overhead in sensor polling |
Applications
| USB Audio Interface | Handheld Medical Scanner |
|---|---|
Use Scenario: Embedded USB audio class device transmitting PCM data to host PC without external USB PHY. IC Role / Device Role / Timing Role: USB 2.0 Full-Speed device controller with integrated transceiver; handles enumeration, endpoint management, and isochronous data transfer. Use Value: Eliminates external USB PHY and reduces BOM cost; 2 kB USB SRAM enables double-buffered audio packet handling at 48 kHz sampling. | Use Scenario: Battery-powered barcode scanner with laser trigger, decode engine, and USB HID report transmission. IC Role / Device Role / Timing Role: Real-time sensor interface MCU managing laser driver timing, ADC-based signal conditioning, and USB HID keyboard emulation. Use Value: 50 MHz Cortex-M0 provides sufficient headroom for real-time decode algorithms; Deep power-down mode extends battery life between scans. |
| Industrial RS-485 Node | Smart Card Reader |
Use Scenario: DIN-rail mounted field device communicating over RS-485 bus in factory automation networks. IC Role / Device Role / Timing Role: USART configured in RS-485/EIA-485 mode with automatic direction control and synchronous slave operation. Use Value: Hardware-controlled RTS/CTS and DTR/DSR signals simplify half-duplex bus arbitration; 40 GPIO pins support discrete I/O for status LEDs and relay control. | Use Scenario: Contact-based smart card reader for access control systems using ISO/IEC 7816-3 protocol. IC Role / Device Role / Timing Role: USART in asynchronous smart card interface mode with precise bit timing, clock output (CLKOUT), and voltage-level translation support. Use Value: Integrated CLKOUT pin drives card clock directly; fractional baud rate generator ensures ±0.5% timing accuracy required for T=0/T=1 protocols. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC11U14FET48/201 | Same core, memory, and peripherals but in TFBGA48 package (4.5 × 4.5 × 0.7 mm) | Targeted for space-constrained PCBs where LQFP48 footprint is prohibitive | Select when board area is critical and reflow-compatible BGA assembly is available |
| LPC1343FBD48/101 | ARM Cortex-M3 core, 32 kB flash, no USB device controller (USB host only), higher power consumption | Suitable for host-side USB applications or where M3 instruction set benefits outweigh USB device need | Choose only if M3 performance or USB host capability is required; not a drop-in replacement |
Compared with LPC11U14FET48/201, the LPC11U14FBD48/20EL offers identical functionality in a larger, hand-solderable LQFP48 package ideal for prototyping and medium-volume production. Against LPC1343FBD48/101, it trades M3 performance for lower power, smaller die size, and native USB device support-critical for peripheral-class designs.
Availability
LPC11U14FBD48/20EL is available at Aetrix Electronics and suitable for industrial control, USB audio devices, and handheld medical scanners requiring stable component supply, long-term lifecycle assurance, and consistent parametric performance across temperature (−40 °C to +85 °C).
Supply support for LPC11U14FBD48/20EL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in ARM-based microcontrollers and mixed-signal integration.
The LPC11U1x product line was designed specifically for cost-sensitive, USB-connected embedded peripherals-emphasizing low power, small footprint, and out-of-box USB device functionality without external PHY components.
FAQ
What USB speed and device class support does the LPC11U14FBD48/20EL provide?
The LPC11U14FBD48/20EL integrates a Full-Speed USB 2.0 device controller compliant with USB revision 2.0, supporting up to 12 Mbit/s. It natively implements standard device classes including CDC ACM (virtual COM port), HID, and MSC via boot ROM and CMSIS-Driver examples. The LPC11U14FBD48/20EL does not support High-Speed USB or USB host functionality.
Does the LPC11U14FBD48/20EL support in-system programming (ISP) and how is it initiated?
Yes, the LPC11U14FBD48/20EL supports In-System Programming via its on-chip boot ROM. ISP is initiated by holding PIO0_1 and PIO0_3 LOW during reset, then communicating over UART0 (PIO0_18/PIO0_19) at 9600 baud. The LPC11U14FBD48/20EL's boot ROM includes complete ISP command handling, eliminating need for external programmer hardware.
What are the power supply requirements and low-power capabilities of the LPC11U14FBD48/20EL?
The LPC11U14FBD48/20EL operates from a single 3.3 V supply (1.8 V to 3.6 V range) with integrated PMU. It supports four reduced-power modes: Sleep, Deep-sleep, Power-down, and Deep power-down. Wake-up from Deep power-down requires a LOW pulse on PIO0_16 (WAKEUP pin), and brownout detection has four programmable thresholds for interrupt or forced reset-key features for battery-operated LPC11U14FBD48/20EL deployments.
Can the LPC11U14FBD48/20EL's ADC operate independently of the CPU clock?
No-the 10-bit ADC in the LPC11U14FBD48/20EL derives its clock from the system APB bus clock and cannot run autonomously during CPU sleep. However, it supports burst mode with DMA triggering, allowing conversion sequences to execute with minimal CPU involvement. All eight ADC inputs (AD0–AD7) are mapped to GPIO pins and share the same reference (VDD), with no separate VREF pin on the LPC11U14FBD48/20EL.
Is the LPC11U14FBD48/20EL pin-compatible with other members of the LPC11U1x family?
Yes-the LPC11U14FBD48/20EL shares identical pinout and electrical characteristics with other LQFP48 variants in the LPC11U1x series (e.g., LPC11U12FBD48/201, LPC11U13FBD48/201), differing only in flash size (32 kB vs. 16/24 kB) and SRAM allocation. This allows direct hardware reuse across firmware variants, simplifying design scalability and inventory management for the LPC11U14FBD48/20EL.
LPC11U14FBD48/20EL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 48-LQFP
- Series:
- LPC11Uxx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0
- Core Size:
- 32-Bit Single-Core
- Speed:
- 50MHz
- Connectivity:
- I2C, Microwire, SmartCard, SPI, SSP, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, POR, WDT
- Number of I/O:
- 40
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 6K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 8x10b SAR
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC11U14FBD48/20EL FAQ
1.How can I place an order for LPC11U14FBD48/20EL through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC11U14FBD48/20EL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC11U14FBD48/20EL reliable?
The price and inventory of LPC11U14FBD48/20EL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC11U14FBD48/20EL is usually 5 days.
3.What payment methods are accepted for LPC11U14FBD48/20EL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC11U14FBD48/20EL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC11U14FBD48/20EL?
LPC11U14FBD48/20EL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC11U14FBD48/20EL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC11U14FBD48/20EL?
For technical support, including LPC11U14FBD48/20EL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC11U14FBD48/20EL requirements.
6.How does Aetrix verify that LPC11U14FBD48/20EL is sourced from the original manufacturer or authorized distributors?
All LPC11U14FBD48/20EL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC11U14FBD48/20EL meets industry standards.
7.What is the process for return or replacement of LPC11U14FBD48/20EL?
All LPC11U14FBD48/20EL units undergo pre-shipment inspection (PSI). If there is an issue with LPC11U14FBD48/20EL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC11U14FBD48/20EL part is unused and in its original packaging.
Return procedure for LPC11U14FBD48/20EL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LPC11U14FBD48/20EL Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

