NXP Semiconductors LPC11U35FET48/501,
- Part No.:
- LPC11U35FET48/501,
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 48-TFBGA
- Datasheet:
-
LPC11U35FET48/501,.pdf
- Description:
- IC MCU 32BIT 64KB FLASH 48TFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC11U35FET48/501 from NXP Semiconductors is a 32-bit ARM Cortex-M0 microcontroller in TFBGA48 package, operating up to 50 MHz with 64 kB flash, 12 kB SRAM (including 2 kB USB SRAM), 4 kB EEPROM, full-speed USB 2.0 device controller, and 10-bit ADC with 8 channels - deployed in USB audio devices and handheld scanners requiring compact, low-power connectivity.
For engineers reviewing the LPC11U35FET48/501 datasheet, LPC11U35FET48/501 pinout, LPC11U35FET48/501 application, or LPC11U35FET48/501 equivalent, key selection criteria include TFBGA48 footprint compatibility, USB device stack support in ROM, 4 kB byte-erasable EEPROM, fractional baud rate generation in USART, and Deep power-down wake-up via dedicated WAKEUP pin.
Technical Context
The LPC11U35FET48/501 integrates a single-core ARM Cortex-M0 CPU with NVIC and NMI support, paired with a dedicated USB PLL and main system PLL for independent clock domain management. Its memory subsystem includes 64 kB flash with 4 kB sector erase, 12 kB SRAM (8 kB general-purpose + 2 kB USB + 2 kB SRAM1), and 4 kB EEPROM with on-chip API access.
Peripheral architecture features one USART supporting RS-485/9-bit mode and ISO 7816-3 smart card interface, two SSP controllers with FIFO, Fast-mode Plus I²C (1 Mbit/s), four timers (two 32-bit, two 16-bit), and GPIO with configurable pull-up/pull-down, repeater, and open-drain modes across 40 pins - all managed via IOCON registers and supported by boot ROM power profiles.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M0, 50 MHz max - delivers deterministic real-time response with Thumb-2 instruction set and low code density for cost-sensitive embedded control. |
| Memory | 64 kB flash (sector/page erase), 12 kB SRAM (8+2+2 kB), 4 kB EEPROM (byte-erasable) - enables field firmware updates, data logging with wear leveling, and USB descriptor storage without external memory. |
| USB Interface | Full-speed USB 2.0 device controller with ROM drivers and SoftConnect - eliminates need for external pull-up resistor and supports flash updates over USB without host driver changes. |
| ADC | 10-bit SAR ADC with 8 input channels and multiplexing - provides sufficient resolution for sensor interfacing in medical and industrial monitoring applications. |
| Timers | Four general-purpose timers: two 32-bit (CT32B0/1) and two 16-bit (CT16B0/1), with total of 8 capture inputs and 13 match outputs - supports PWM generation, input capture for encoder signals, and precise timing in motor control. |
| I/O & Packaging | 40 GPIO pins in TFBGA48 (4.5 × 4.5 × 0.7 mm) with programmable pull-up/down, open-drain, and high-current sink (20 mA) - enables direct LED driving and robust bus interfacing in space-constrained designs. |
| Power Management | Four low-power modes (Sleep, Deep-sleep, Power-down, Deep power-down) with wake-up via GPIO, USB activity, or dedicated WAKEUP pin - extends battery life in portable USB peripherals. |
Pinout & Package
Package: TFBGA48 (plastic thin fine-pitch ball grid array; 48 balls; body 4.5 × 4.5 × 0.7 mm; SOT1155-2).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RESET/PIO0_0 | Reset input / GPIO | External reset with 20 ns glitch filter; also debug select (LOW = JTAG, HIGH = SWD); must be pulled HIGH in Deep power-down mode. |
| USB_DP / USB_DM | USB differential pair | Full-speed USB 2.0 physical interface; requires 27 Ω series resistors and proper PCB routing for signal integrity. |
| USB_VBUS | USB bus voltage monitor | Detects presence of USB power (5 V); used to trigger enumeration and enable USB peripheral logic only when host is connected. |
| USB_CONNECT | SoftConnect control | Software-controlled switch for internal 1.5 kΩ pull-up resistor on D+ - enables USB attach/detach simulation without hardware rework. |
| WAKEUP (PIO0_16) | Deep power-down wake source | Dedicated pin with 20 ns glitch filter; requires external HIGH before entering Deep power-down, then LOW pulse to wake - ensures reliable low-leakage sleep recovery. |
| AD0–AD7 | ADC analog inputs | Eight 10-bit ADC channels mapped to PIO0_11 through PIO0_23 - supports simultaneous sampling of multiple sensors with shared reference (VREFP/VREFN). |
| TXD/RXD (PIO0_19/PIO0_18) | USART transmit/receive | Asynchronous serial interface with fractional baud rate generator and internal FIFO - enables robust communication with legacy peripherals at non-standard rates. |
| SCL/SDA (PIO0_4/PIO0_5) | I²C-bus interface | Fast-mode Plus I²C (1 Mbit/s) with open-drain outputs and high-current sink capability - supports multi-master bus operation and hot-plug detection. |
Key Features
| Feature | Design Value |
|---|---|
| ROM-based USB drivers | Reduces flash usage by ~4 kB and accelerates USB enumeration; supports CDC, HID, and MSC class descriptors out-of-box. |
| On-chip EEPROM (4 kB) | Byte-erasable and byte-programmable memory with API support - eliminates need for external serial EEPROM in calibration storage or configuration retention. |
| Programmable Windowed Watchdog (WWDT) | Prevents runaway code with time-windowed refresh requirement; uses dedicated low-power WDO oscillator - enhances reliability in unattended industrial systems. |
| Multiple clock sources | Crystal oscillator (1–25 MHz), 12 MHz IRC, and programmable WDO - enables seamless clock failover and dynamic frequency scaling for power optimization. |
| GPIO interrupt grouping | Two GPIO grouped interrupt modules allow pattern-matching on up to 8 pins per group - simplifies keypad scanning and status monitoring without CPU polling. |
Applications
| USB Audio Devices | Handheld Scanners |
|---|---|
Use Scenario: Compact USB-powered headset or microphone with analog audio path and digital USB streaming. IC Role / Device Role / Timing Role: Main MCU handling USB audio class (UAC) protocol, ADC/DAC interface, and real-time sample buffering. Use Value: Integrated 10-bit ADC and ROM USB drivers reduce BOM count; TFBGA48 footprint enables miniaturized PCB layout. | Use Scenario: Battery-operated barcode scanner with laser diode control, photodiode signal conditioning, and USB-CDC host interface. IC Role / Device Role / Timing Role: System controller managing laser timing, ADC sampling of reflected light, and USB packetization of decoded symbols. Use Value: Deep power-down mode with dedicated WAKEUP pin extends battery life; 40 GPIO support parallel I/O for scan engine and status LEDs. |
| Medical Sensors | Industrial Control Panels |
Use Scenario: Portable pulse oximeter or temperature logger transmitting data over USB to clinical PC software. IC Role / Device Role / Timing Role: Signal acquisition MCU acquiring analog sensor data, applying basic filtering, and packaging into USB HID reports. Use Value: 4 kB EEPROM stores calibration coefficients and patient history; 12 kB SRAM accommodates dual-buffered ADC samples. | Use Scenario: DIN-rail mounted HMI panel with pushbutton inputs, LED indicators, and USB configuration port. IC Role / Device Role / Timing Role: Local intelligence unit interpreting button presses, driving LEDs, and updating configuration via USB mass storage emulation. Use Value: High-current GPIO (20 mA sink) directly drives indicator LEDs; Fast-mode Plus I²C interfaces with display controller and EEPROM. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC11U35FBD48/401 | LQFP48 package (7 × 7 × 1.4 mm), identical electrical specs and peripherals. | Better suited for prototyping and hand-soldering; larger footprint eases test point access and thermal management. | Select when board space allows LQFP48 and manual assembly or debugging visibility is prioritized over miniaturization. |
| LPC11U37FBD64/501 | LQFP64 package with 128 kB flash, 12 kB SRAM, and 54 GPIO - adds I/O Handler hardware for UART/I²C emulation. | Required for designs needing hardware-offloaded serial protocol emulation or >40 GPIOs; not pin-compatible with TFBGA48. | Choose when expanding peripheral count or offloading CPU from serial protocol handling is critical; accept larger package and higher cost. |
Compared with LPC11U35FBD48/401, the LPC11U35FET48/501 offers identical functionality in a 40 % smaller footprint but requires reflow assembly; versus LPC11U37FBD64/501, it trades flash capacity and I/O count for compactness and lower unit cost - making it optimal for volume USB peripherals where space and BOM cost are constrained.
Availability
LPC11U35FET48/501 is available at Aetrix Electronics and suitable for USB audio devices, handheld scanners, and medical sensors requiring stable component supply across production lifecycles.
Supply support for LPC11U35FET48/501 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The LPC11U3x product line targets cost-sensitive, USB-connected embedded applications - delivering ARM Cortex-M0 performance with integrated USB device stack, EEPROM, and low-power modes to replace legacy 8/16-bit MCUs.
FAQ
What is the maximum operating frequency of the LPC11U35FET48/501?
The LPC11U35FET48/501 operates at a maximum CPU frequency of 50 MHz, achieved using either the internal 12 MHz IRC oscillator with PLL multiplication or an external crystal (1–25 MHz) fed into the system oscillator and PLL. This frequency is fully supported across its specified temperature range of −40 °C to +85 °C and supply voltage of 1.8 V to 3.6 V.
Does the LPC11U35FET48/501 include on-chip EEPROM, and how is it accessed?
Yes, the LPC11U35FET48/501 includes 4 kB of on-chip EEPROM that is byte-erasable and byte-programmable. It is accessed via an on-chip API located in boot ROM, eliminating the need for external EEPROM in applications requiring non-volatile parameter storage - such as calibration data or user settings - while maintaining endurance and data retention specifications.
Can the LPC11U35FET48/501 enter Deep power-down mode, and how is it woken up?
Yes, the LPC11U35FET48/501 supports Deep power-down mode with ultra-low leakage current. Wake-up is performed exclusively via the dedicated WAKEUP pin (PIO0_16), which requires an external HIGH level before entry and a LOW-going pulse ≥50 ns to exit. This pin includes a 20 ns glitch filter and must be externally pulled HIGH during Deep power-down to ensure reliable recovery.
What USB capabilities does the LPC11U35FET48/501 provide, and are drivers included?
The LPC11U35FET48/501 integrates a full-speed USB 2.0 device controller with ROM-based drivers supporting CDC, HID, and MSC classes. It implements SoftConnect via the USB_CONNECT pin and includes USB_FTOGGLE for Start-of-Frame synchronization. These features eliminate external components and accelerate development - no USB stack licensing or driver porting is required for basic enumeration and data transfer.
Is the LPC11U35FET48/501 pin-compatible with other LPC11U3x variants in the same package?
Yes, the LPC11U35FET48/501 is pin-compatible with other TFBGA48 variants in the LPC11U3x family, including LPC11U35FHI33/501 (HVQFN33) and LPC11U34FHN33/421 (HVQFN33), provided the same peripheral configuration and pin mapping are used. However, functional differences - such as flash size, SRAM allocation, or I/O Handler availability - require corresponding firmware and register initialization adjustments.
LPC11U35FET48/501, Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 48-TFBGA
- Series:
- LPC11Uxx
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0
- Core Size:
- 32-Bit
- Speed:
- 50MHz
- Connectivity:
- I2C, Microwire, SmartCard, SPI, SSP, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, POR, WDT
- Number of I/O:
- 40
- Program Memory Size:
- 64KB (64K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 4K x 8
- RAM Size:
- 12K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 8x10b SAR
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC11U35FET48/501, FAQ
1.How can I place an order for LPC11U35FET48/501, through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC11U35FET48/501, on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC11U35FET48/501, reliable?
The price and inventory of LPC11U35FET48/501, are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC11U35FET48/501, is usually 5 days.
3.What payment methods are accepted for LPC11U35FET48/501,?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC11U35FET48/501, transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC11U35FET48/501,?
LPC11U35FET48/501, orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC11U35FET48/501, order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC11U35FET48/501,?
For technical support, including LPC11U35FET48/501, datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC11U35FET48/501, requirements.
6.How does Aetrix verify that LPC11U35FET48/501, is sourced from the original manufacturer or authorized distributors?
All LPC11U35FET48/501, products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC11U35FET48/501, meets industry standards.
7.What is the process for return or replacement of LPC11U35FET48/501,?
All LPC11U35FET48/501, units undergo pre-shipment inspection (PSI). If there is an issue with LPC11U35FET48/501,, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC11U35FET48/501, part is unused and in its original packaging.
Return procedure for LPC11U35FET48/501,:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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