NXP Semiconductors LPC11U37FBD48/501,
- Part No.:
- LPC11U37FBD48/501,
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
LPC11U37FBD48/501,.pdf
- Description:
- IC MCU 32BIT 128KB FLASH 48LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC11U37FBD48/501 from NXP Semiconductors is a 32-bit ARM Cortex-M0 microcontroller in LQFP48 package, operating up to 50 MHz with 128 kB flash, 10 kB SRAM (8 kB SRAM0 + 2 kB USB SRAM), 4 kB EEPROM, full-speed USB 2.0 device controller, and USART with RS-485/smart card support-designed for embedded USB peripherals requiring low-power, high-integration connectivity.
For engineers reviewing the LPC11U37FBD48/501 datasheet, LPC11U37FBD48/501 pinout, LPC11U37FBD48/501 application, or LPC11U37FBD48/501 equivalent, key selection criteria include USB device stack readiness, 10-bit ADC with 8-channel multiplexing, I²C Fast-mode Plus (1 Mbit/s), dual SSP interfaces, and GPIO interrupt grouping for real-time event handling in resource-constrained designs.
Technical Context
The LPC11U37FBD48/501 integrates a dedicated USB PLL for stable 48 MHz USB clock generation independent of the main system PLL, enabling concurrent USB operation and CPU execution without timing conflict. Its ROM-based USB drivers and flash update capability via USB simplify firmware deployment and field upgrades.
It features a configurable PMU supporting four low-power modes (Sleep, Deep-sleep, Power-down, Deep power-down), with wake-up sources including GPIO pins, watchdog timer, USB activity, and a dedicated WAKEUP pin (PIO0_16) for sub-µA deep power-down recovery-critical for battery-powered USB peripherals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M0, 32-bit RISC, up to 50 MHz operation-enables efficient C/C++ code execution with Thumb-2 instruction set and NVIC for deterministic interrupt latency. |
| Memory | 128 kB on-chip flash (sector/page erase), 10 kB SRAM (8 kB general + 2 kB USB-dedicated), 4 kB byte-erasable EEPROM-supports robust firmware storage, USB descriptor buffering, and non-volatile parameter retention. |
| USB Interface | Full-speed USB 2.0 device controller with integrated PHY, SoftConnect (PIO0_6), VBUS sensing (PIO0_3), and ROM-based drivers-eliminates external transceiver and reduces BOM cost for HID, CDC, or MSC class devices. |
| Analog Peripherals | 10-bit ADC with 8 input channels (AD0–AD7), programmable sample rate-sufficient for sensor monitoring, battery voltage sensing, or user interface analog inputs in portable devices. |
| Digital Interfaces | 1× USART (RS-485/9-bit/smart card mode), 1× I²C Fast-mode Plus (1 Mbit/s), 2× SSP (SPI/SSI), 4× timers (including WWDT)-provides flexible serial communication and precise timing control for industrial and consumer protocols. |
| GPIO & Power | 40 GPIO pins (LQFP48 package), 20 mA sink/source on select pins, 1.8–3.6 V supply, -40 °C to +85 °C operation-supports direct LED driving, level-shifting, and wide-input-range industrial interfacing. |
Pinout & Package
Package: LQFP48, plastic low-profile quad flat package, 48 leads, body 7 × 7 × 1.4 mm (SOT313-2).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PIO0_0 / RESET | Reset input / debug select | Active-low reset with 20 ns glitch filter; LOW selects JTAG, HIGH selects SWD-enables dual-debug interface without external logic. |
| PIO0_3 / USB_VBUS | USB bus power monitor | Detects host connection status for automatic USB enumeration start-required for reliable plug-and-play behavior in self-powered devices. |
| PIO0_6 / USB_CONNECT | SoftConnect control | Software-controlled 1.5 kΩ pull-up enables/disables USB device presence-allows dynamic USB attach/detach without hardware switch or reconfiguration. |
| PIO0_16 / WAKEUP | Deep power-down wake source | Dedicated pin with 20 ns glitch filter; pulled HIGH before entry, LOW pulse wakes device-enables µA-level sleep with fast (<100 µs) wake latency for responsive USB resume. |
| PIO0_18 / RXD | USART receive input | Primary UART data input; supports UART ISP mode for firmware recovery-enables field updates via serial bootloader without debugger. |
| PIO0_19 / TXD | USART transmit output | Primary UART data output; used with RTS/CTS flow control (PIO0_17/PIO0_7) for reliable host communication in noisy environments. |
Key Features
| Feature | Design Value |
|---|---|
| ROM-based USB drivers | Reduces flash usage by ~4 kB and eliminates USB stack porting effort-accelerates time-to-market for CDC/HID-class USB peripherals. |
| EEPROM with byte-level erase | Enables wear-leveling and fine-grained configuration storage (e.g., calibration data, device ID) without block-level overhead or external memory. |
| Programmable Windowed Watchdog Timer (WWDT) | Prevents runaway code with time-windowed refresh-critical for fail-safe operation in medical or industrial control applications. |
| GPIO group interrupt modules | Generates single interrupt from logical combination of up to 8 GPIO states-reduces CPU polling and enables efficient multi-signal event detection (e.g., button matrix, safety interlock). |
| Crystal oscillator (1–25 MHz) + 12 MHz IRC | Supports precise timing via external crystal or low-cost internal RC-enables accurate USB timing while allowing crystal-free operation during development or cost-sensitive production. |
Applications
| Consumer Peripherals | Medical Devices |
|---|---|
Use Scenario: USB HID keyboard/mouse with integrated touchpad and LED indicators. IC Role / Device Role / Timing Role: Main MCU executing HID report generation, USB protocol handling, and capacitive touch decoding. Use Value: Single-chip integration eliminates external USB transceiver and reduces PCB area; 128 kB flash accommodates multiple HID descriptors and firmware updates. | Use Scenario: Portable blood glucose meter with USB data export and LCD interface. IC Role / Device Role / Timing Role: Sensor interface controller managing ADC sampling, LCD driver timing, and USB mass storage emulation. Use Value: On-chip 4 kB EEPROM stores calibration coefficients and patient history; USB device mode enables direct PC file transfer without proprietary drivers. |
| Industrial Control | Handheld Scanners |
Use Scenario: RS-485-connected temperature controller with local display and USB configuration port. IC Role / Device Role / Timing Role: Dual-role controller managing Modbus RTU over RS-485 and USB CDC virtual COM port for setup. Use Value: Single USART supports both protocols via software reconfiguration; 40 GPIO enable direct LED/button interface and relay control without expanders. | Use Scenario: Barcode scanner with USB HID output and battery charge management. IC Role / Device Role / Timing Role: Host processor for image sensor interface, decode engine, and USB HID report transmission. Use Value: 50 MHz Cortex-M0 delivers sufficient MIPS for real-time barcode decode; USB device stack allows plug-and-play compatibility with POS systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC11U35FBD48/401 | 64 kB flash, 10 kB SRAM, same peripherals and package-lacks 128 kB flash capacity. | Suitable for simpler USB HID or sensor node firmware with smaller code footprint. | Select when application firmware fits within 64 kB and cost sensitivity outweighs future upgrade headroom. |
| LPC11U37FBD64/501 | LQFP64 package, 128 kB flash, 12 kB SRAM (8+2+2), adds CT16B0_CAP1/CT32B0_CAP1 capture inputs. | Required for designs needing >40 GPIO or additional timer capture functionality (e.g., motor encoder input). | Choose when pin count or advanced timer capture capability is mandatory; not drop-in compatible due to package and pinout change. |
Compared with LPC11U35FBD48/401, the LPC11U37FBD48/501 provides double flash capacity for complex USB stacks or OTA update partitions; versus LPC11U37FBD64/501, it trades 4 GPIO and 2 capture inputs for lower cost and smaller footprint in space-constrained USB peripherals.
Availability
LPC11U37FBD48/501 is available at Aetrix Electronics and suitable for consumer peripherals, medical diagnostics, and industrial control applications requiring stable component supply, long-term manufacturability, and NXP's industrial-grade qualification.
Supply support for LPC11U37FBD48/501 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The LPC11U3x product line targets cost-sensitive, USB-enabled embedded applications-delivering ARM Cortex-M0 performance with integrated USB, EEPROM, and low-power features to replace legacy 8/16-bit MCUs in next-generation peripherals.
FAQ
What is the maximum operating frequency of the LPC11U37FBD48/501?
The LPC11U37FBD48/501 operates at a maximum CPU frequency of 50 MHz, achieved using either the internal 12 MHz IRC oscillator with PLL multiplication or an external crystal (1–25 MHz) with PLL. This frequency is fully supported across its specified industrial temperature range (-40 °C to +85 °C) and 1.8–3.6 V supply voltage.
Does the LPC11U37FBD48/501 include on-chip EEPROM, and what are its key characteristics?
Yes, the LPC11U37FBD48/501 includes 4 kB of on-chip EEPROM that is byte-erasable and byte-programmable, with API support in boot ROM. This enables reliable storage of calibration data, device identifiers, or configuration parameters without wear-leveling overhead or external memory, and retains data across power cycles and resets.
Can the LPC11U37FBD48/501 perform USB firmware updates without external tools?
Yes, the LPC11U37FBD48/501 supports in-application programming (IAP) via its ROM-based USB bootloader. Using standard USB CDC or HID class interfaces, firmware updates can be delivered directly over USB without JTAG/SWD debuggers-enabling field upgrades and simplified manufacturing programming.
How many GPIO pins are available on the LPC11U37FBD48/501, and what special functions do they support?
The LPC11U37FBD48/501 provides 40 GPIO pins in its LQFP48 package. These support configurable pull-up/pull-down, repeater mode, open-drain operation, edge/level-sensitive interrupts, and GPIO group interrupt logic. Eight pins can serve as interrupt sources, and two GPIO groups allow pattern-matching interrupts for efficient multi-signal event detection.
What low-power modes does the LPC11U37FBD48/501 support, and how is wake-up managed from Deep power-down?
The LPC11U37FBD48/501 supports Sleep, Deep-sleep, Power-down, and Deep power-down modes. From Deep power-down, wake-up is enabled exclusively via the dedicated WAKEUP pin (PIO0_16), which requires external pull-up before entry and a LOW-going pulse ≥50 ns to exit-ensuring sub-µA quiescent current while maintaining fast (<100 µs) resume capability.
LPC11U37FBD48/501, Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 48-LQFP
- Series:
- LPC11Uxx
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0
- Core Size:
- 32-Bit Single-Core
- Speed:
- 50MHz
- Connectivity:
- I2C, Microwire, SmartCard, SPI, SSP, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, POR, WDT
- Number of I/O:
- 40
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 4K x 8
- RAM Size:
- 12K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 8x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC11U37FBD48/501, FAQ
1.How can I place an order for LPC11U37FBD48/501, through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC11U37FBD48/501, on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC11U37FBD48/501, reliable?
The price and inventory of LPC11U37FBD48/501, are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC11U37FBD48/501, is usually 5 days.
3.What payment methods are accepted for LPC11U37FBD48/501,?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC11U37FBD48/501, transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC11U37FBD48/501,?
LPC11U37FBD48/501, orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC11U37FBD48/501, order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC11U37FBD48/501,?
For technical support, including LPC11U37FBD48/501, datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC11U37FBD48/501, requirements.
6.How does Aetrix verify that LPC11U37FBD48/501, is sourced from the original manufacturer or authorized distributors?
All LPC11U37FBD48/501, products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC11U37FBD48/501, meets industry standards.
7.What is the process for return or replacement of LPC11U37FBD48/501,?
All LPC11U37FBD48/501, units undergo pre-shipment inspection (PSI). If there is an issue with LPC11U37FBD48/501,, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC11U37FBD48/501, part is unused and in its original packaging.
Return procedure for LPC11U37FBD48/501,:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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