NXP Semiconductors LPC1313FBD48,151
- Part No.:
- LPC1313FBD48,151
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
LPC1313FBD48,151.pdf
- Description:
- IC MCU 32BIT 32KB FLASH 48LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC1313FBD48,151 from NXP Semiconductors is a 32-bit ARM Cortex-M3 microcontroller in LQFP48 package, operating at up to 72 MHz with 32 kB flash, 8 kB SRAM, one UART, one Fast-mode Plus I²C-bus interface, four general-purpose timers, and 42 GPIO pins. It targets low-power embedded control in metering, lighting, and alarm systems.
For engineers reviewing the LPC1313FBD48,151 datasheet, LPC1313FBD48,151 pinout, LPC1313FBD48,151 application, or LPC1313FBD48,151 equivalent, key selection factors include its dual SSP controller (SSP0 + SSP1), 10-bit 8-channel ADC, programmable Windowed Watchdog Timer (WWDT), and support for brownout detection with four forced-reset thresholds - all confirmed for this exact LQFP48 variant.
Technical Context
The LPC1313FBD48,151 implements the ARM Cortex-M3 core with Harvard architecture, 3-stage pipeline, and integrated prefetch unit enabling speculative branching. Its peripheral set includes dedicated clock generation (IRC, system oscillator, PLL), Serial Wire Debug/Trace, and power management unit supporting Sleep, Deep-sleep, and Deep power-down modes.
Unlike USB-equipped LPC1342/43 variants, the LPC1313FBD48,151 omits USB hardware but adds a second SSP controller (SSP1) accessible on pins PIO2_0/DTR/SSEL1, PIO2_1/DSR/SCK1, PIO2_2/DCD/MISO1, and PIO2_3/RI/MOSI1 - a feature exclusive to LPC1313FBD48/01 and LPC1313FHN33/01 parts per datasheet Table 2 and Fig 4.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M3, 3-stage pipeline with Harvard architecture and speculative branch prefetch - enables deterministic real-time execution at 72 MHz. |
| Flash / SRAM | 32 kB on-chip flash + 8 kB SRAM - sufficient for standalone firmware with moderate protocol stacks and sensor processing. |
| ADC | 10-bit SAR ADC with 8 input channels - supports analog sensing in eMetering and white goods without external converters. |
| I²C Interface | Fast-mode Plus I²C-bus (1 Mbit/s) with high-current sink drivers - enables robust communication with sensors and displays over longer traces. |
| Timers | Four general-purpose timers: two 32-bit (CT32B0/1) and two 16-bit (CT16B0/1), with match/capture capability - suitable for PWM generation, input capture, and time-stamped event logging. |
| Power Management | Three reduced-power modes (Sleep, Deep-sleep, Deep power-down) with wake-up via up to 40 GPIO pins - critical for battery-backed alarm and lighting applications. |
| Watchdog | Programmable WDT + Windowed WWDT - provides fail-safe reset timing with window violation detection for safety-critical control loops. |
Pinout & Package
LQFP48 package (SOT313-2), 7 × 7 × 1.4 mm body, 48 leads, lead-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RESET/PIO0_0 (Pin 3) | Reset input / GPIO | External reset with 20 ns glitch filter; also serves as configurable digital I/O with internal pull-up. |
| PIO0_4/SCL (Pin 15) | I²C clock / GPIO | Open-drain I²C-bus clock line with Fast-mode Plus support - requires external pull-up; high-current sink enabled when configured for Fast+ |
| PIO0_5/SDA (Pin 16) | I²C data / GPIO | Open-drain I²C-bus data line with Fast-mode Plus support - same electrical behavior as SCL pin. |
| PIO2_0/DTR/SSEL1 (Pin 2) | UART DTR / SSP1 slave select | Dual-function pin: UART Data Terminal Ready output or SSP1 chip select - confirms presence of second SSP controller unique to LPC1313FBD48/01. |
| PIO2_1/DSR/SCK1 (Pin 13) | UART DSR / SSP1 clock | UART Data Set Ready input or SSP1 serial clock - validates full SSP1 peripheral implementation on this variant. |
| VDD (Pins 8, 44) | Power supply | 3.3 V supply for core, peripherals, and ADC reference - single-rail operation simplifies power design. |
| VSS (Pins 5, 41) | Ground | Primary ground reference for analog and digital sections - dual-pin layout reduces ground impedance. |
Key Features
| Feature | Design Value |
|---|---|
| Dual SSP controllers (SSP0 + SSP1) | Enables concurrent SPI-based communication with two independent peripherals (e.g., display + sensor) without software arbitration or bus contention. |
| Windowed Watchdog Timer (WWDT) | Prevents runaway code by requiring service within a defined time window - essential for industrial control where silent failure is unacceptable. |
| Four-level brownout detect (forced reset) | Allows precise voltage-margin tuning during power ramp-up/down - improves reliability in unstable AC-powered white goods and metering systems. |
| Configurable GPIO pull-up/pull-down | Eliminates need for external bias resistors on UART control lines (DTR/DSR/RTS/CTS) and interrupt inputs - reduces BOM count and board area. |
| High-current GPIO (20 mA) | Drives LEDs or small relays directly from PIO0_7 and I²C pins in Fast+ mode - avoids external driver ICs in lighting and alarm panel designs. |
Applications
| eMetering | Lighting Control |
|---|---|
Use Scenario: Residential electricity meter with pulse counting, tamper detection, and RS-485 communication. IC Role / Device Role / Timing Role: Main system controller handling metrology calculations, secure data logging, and UART-based RS-485 interface. Use Value: 10-bit ADC reads shunt voltage; dual SSP interfaces manage isolated communication IC and LCD driver; WWDT ensures reliable long-term operation. | Use Scenario: Smart LED driver with dimming control, thermal monitoring, and DALI interface. IC Role / Device Role / Timing Role: Central MCU managing PWM dimming, temperature-triggered derating, and DALI packet parsing via UART. Use Value: Four timers generate precise PWM waveforms; 8-channel ADC monitors multiple thermal zones; low-power modes extend standby battery life. |
| Alarm Systems | White Goods |
Use Scenario: Wireless security panel with PIR motion sensors, siren control, and keypad scanning. IC Role / Device Role / Timing Role: Real-time event processor responding to edge-triggered GPIO interrupts from sensors and generating timed siren outputs. Use Value: 42 GPIO pins support direct matrix keypad scan; Deep power-down mode enables multi-year battery life; wake-up on any of 40 pins ensures instant response. | Use Scenario: Washing machine main control board managing motor drive, water level sensing, and user interface. IC Role / Device Role / Timing Role: Primary controller coordinating motor commutation timing, analog pressure/temperature readings, and display updates. Use Value: Dual SSP controllers interface with motor driver IC and OLED display; four-level BOD prevents erratic behavior during brownout events common in household power grids. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC1313FBD48/01 | Includes power profiles for lower Active/Sleep current and Windowed Watchdog Timer (WWDT); same pinout and memory configuration. | Better suited for battery-powered devices requiring extended runtime and enhanced fault recovery. | Select LPC1313FBD48/01 if WWDT and optimized power profiles are required; otherwise LPC1313FBD48,151 offers identical core functionality at lower cost. |
| LPC1343FBD48 | Includes USB 2.0 full-speed device controller with on-chip PHY; replaces SSP1 with USB; same flash/SRAM and LQFP48 package. | Targeted at host-connected devices (e.g., USB HID peripherals) rather than isolated embedded control. | Choose LPC1343FBD48 only when native USB device connectivity is mandatory; LPC1313FBD48,151 retains superior SPI expandability and lower EMI profile. |
Compared with LPC1313FBD48/01, the LPC1313FBD48,151 lacks power-optimized firmware profiles and WWDT - making it appropriate for mains-powered applications where those features are non-critical. Versus LPC1343FBD48, it trades USB for dual SSP, prioritizing robustness and deterministic timing over host connectivity.
Availability
LPC1313FBD48,151 is available at Aetrix Electronics and suitable for eMetering, lighting control, and alarm systems requiring stable component supply, long-term lifecycle support, and RoHS-compliant manufacturing.
Supply support for LPC1313FBD48,151 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The LPC1300 series, including LPC1313FBD48,151, was designed for cost-sensitive, low-power embedded control applications demanding high integration, robust peripheral sets, and industrial-grade reliability without USB overhead.
FAQ
Does the LPC1313FBD48,151 include a USB interface?
No. The LPC1313FBD48,151 does not include USB hardware. USB Device functionality is exclusive to LPC1342/43 variants per datasheet Section 2 and Table 2. This part instead provides a second SSP controller (SSP1), confirmed for LPC1313FBD48/01 and LPC1313FBD48,151 in Figure 4 and Table 3.
What is the maximum operating frequency of the LPC1313FBD48,151?
The LPC1313FBD48,151 operates at CPU frequencies up to 72 MHz, enabled by its ARM Cortex-M3 core and internal PLL. This maximum frequency is achievable using either the system oscillator (1–25 MHz crystal) or the 12 MHz internal RC oscillator, as specified in Section 2 of the datasheet.
How many ADC channels does the LPC1313FBD48,151 support?
The LPC1313FBD48,151 integrates a 10-bit successive approximation ADC with 8 input channels (AD0–AD7), mapped to GPIO pins PIO0_11, PIO1_0–PIO1_2, PIO1_3–PIO1_4, PIO1_10, and PIO1_11 per Table 3. All eight channels are functional and accessible in the LQFP48 package.
Is the LPC1313FBD48,151 pin-compatible with the LPC1313FBD48/01?
Yes. Both LPC1313FBD48,151 and LPC1313FBD48/01 use identical LQFP48 packaging (SOT313-2) and share the same pinout, as verified in Figures 4 and 8 of the datasheet. Differences are functional (e.g., WWDT, power profiles), not mechanical or electrical pin assignment.
What debug interface does the LPC1313FBD48,151 support?
The LPC1313FBD48,151 supports Serial Wire Debug (SWD) and Serial Wire Trace (SWT) via dedicated SWCLK (Pin 29) and SWDIO (Pin 39) pins. These interfaces enable full JTAG-equivalent debugging, real-time tracing, and flash programming without requiring additional pins beyond the standard two-wire connection.
LPC1313FBD48,151 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 48-LQFP
- Series:
- LPC13xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 72MHz
- Connectivity:
- I2C, Microwire, SPI, SSI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, WDT
- Number of I/O:
- 42
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 8K x 8
- Voltage - Supply (Vcc/Vdd):
- 2V ~ 3.6V
- Data Converters:
- A/D 8x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC1313FBD48,151 FAQ
1.How can I place an order for LPC1313FBD48,151 through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC1313FBD48,151 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC1313FBD48,151 reliable?
The price and inventory of LPC1313FBD48,151 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC1313FBD48,151 is usually 5 days.
3.What payment methods are accepted for LPC1313FBD48,151?
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Once your LPC1313FBD48,151 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC1313FBD48,151?
For technical support, including LPC1313FBD48,151 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC1313FBD48,151 requirements.
6.How does Aetrix verify that LPC1313FBD48,151 is sourced from the original manufacturer or authorized distributors?
All LPC1313FBD48,151 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC1313FBD48,151 meets industry standards.
7.What is the process for return or replacement of LPC1313FBD48,151?
All LPC1313FBD48,151 units undergo pre-shipment inspection (PSI). If there is an issue with LPC1313FBD48,151, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC1313FBD48,151 part is unused and in its original packaging.
Return procedure for LPC1313FBD48,151:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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