NXP Semiconductors LPC1313FHN33/01,55
- Part No.:
- LPC1313FHN33/01,55
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 32-VQFN Exposed Pad
- Datasheet:
-
LPC1313FHN33/01,55.pdf
- Description:
- IC MCU 32BIT 32KB FLASH 32HVQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,271
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Product details
Overview
LPC1313FHN33/01 from NXP Semiconductors is a 32-bit ARM Cortex-M3 microcontroller in a 33-pin HVQFN package, delivering up to 72 MHz CPU operation, 32 kB flash, 8 kB SRAM, and integrated peripherals including UART, I²C-Fast-mode Plus (1 Mbit/s), four timers, 10-bit ADC (8 channels), and Windowed Watchdog Timer (WWDT). It targets low-power embedded control in lighting systems and alarm panels.
For engineers reviewing the LPC1313FHN33/01 datasheet, LPC1313FHN33/01 pinout, LPC1313FHN33/01 application, or LPC1313FHN33/01 equivalent, key selection criteria include its LPC1300L-series power profiles (reduced Active/Sleep mode consumption), four-level BOD forced reset, programmable pseudo open-drain GPIO, and WWDT - all confirmed for this /01 variant and absent in non-/01 parts.
Technical Context
The LPC1313FHN33/01 implements the ARM Cortex-M3 core with Harvard architecture, 3-stage pipeline, and internal prefetch unit supporting speculative branching. Its memory subsystem includes 32 kB on-chip flash with ISP/IAP capability and 8 kB SRAM, both accessible via AHB-Lite bus.
Peripherals are connected via APB bridges and include one UART with RS-485 support, one Fast-mode Plus I²C-bus interface (1 Mbit/s), two SSP controllers (SSP0 standard; SSP1 only on LQFP48 variants), and a 10-bit ADC with multiplexed inputs across eight pins. The /01 suffix confirms inclusion of WWDT, enhanced BOD thresholds, and power profile APIs in boot ROM.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M3, 72 MHz max - enables real-time deterministic execution with NVIC and low-latency interrupt handling. |
| Flash Memory | 32 kB - sufficient for medium-complexity firmware with bootloader, USB stack (if added externally), and field-upgradable logic. |
| SRAM | 8 kB - supports multiple concurrent peripheral buffers (UART FIFO, I²C message queue, ADC sample array). |
| I²C Speed | 1 Mbit/s Fast-mode Plus - allows high-speed sensor communication without external level shifters on 3.3 V rails. |
| ADC Resolution | 10-bit, 8-channel - provides adequate dynamic range for analog sensing in lighting dimming or temperature monitoring. |
| Watchdog | Windowed Watchdog Timer (WWDT) - prevents runaway code while enforcing strict timing windows for service calls. |
| Power Modes | Sleep, Deep-sleep, Deep power-down - enables sub-10 µA retention current with wake-up via 40 GPIO pins. |
| Package | HVQFN33 (7 × 7 × 0.85 mm) - compact thermal-enhanced footprint suitable for space-constrained PCBs. |
Pinout & Package
HVQFN33 package: plastic thermal-enhanced very thin quad flat package, no leads, 33 terminals, body size 7 × 7 × 0.85 mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RESET/PIO0_0 | Reset input / GPIO | Active-low external reset with 20 ns glitch filter; also serves as general-purpose I/O with 10 ns filter. |
| PIO0_1/CLKOUT/CT32B0_MAT2 | GPIO / Clock output / Timer match | Configurable clock source output (system/IRC/CPU/WDT) or 32-bit timer 0 match signal for PWM or event generation. |
| PIO0_4/SCL & PIO0_5/SDA | I²C bus clock/data | Open-drain I²C-Fast-mode Plus interfaces with high-current sink capability when enabled in IOCONFIG register. |
| PIO1_3/AD4/CT32B1_MAT2/SWDIO | ADC input / Timer match / SWD debug | Multi-function pin supporting analog sensing, timer output, and bidirectional Serial Wire Debug I/O. |
| PIO1_4/AD5/CT32B1_MAT3/WAKEUP | ADC input / Timer match / Wake-up | Dual-role wake-up pin: pulls HIGH to enter Deep power-down; LOW pulse ≥50 ns wakes device - critical for ultra-low-power sleep management. |
| VDD & VSS | Power supply / Ground | Single 2.0–3.6 V supply; VDD also serves as ADC reference voltage - requires stable low-noise regulation. |
Key Features
| Feature | Design Value |
|---|---|
| Power Profiles in Boot ROM | Four optimized Active/Sleep power modes selectable via single API call - eliminates manual register configuration for energy-efficient operation. |
| Windowed Watchdog Timer (WWDT) | Enforces strict time-window servicing - prevents both early and late watchdog refreshes, improving system reliability in safety-critical functions. |
| Programmable Pseudo Open-Drain GPIO | Configurable drive strength and pull-up behavior per pin - enables direct interfacing with legacy 5 V logic without external level shifters. |
| Four-Level Brownout Detect (BOD) | Independent interrupt and forced-reset thresholds - allows graceful shutdown sequencing before supply collapse in battery-powered devices. |
| High-Current I²C Sink Drivers | 20 mA sink capability on SCL/SDA when Fast-mode Plus enabled - supports longer bus traces and higher capacitive loads without external drivers. |
Applications
| eMetering | Lighting Control |
|---|---|
Use Scenario: Smart electricity meter with tamper detection, tariff switching, and secure data logging. IC Role / Device Role / Timing Role: Main application controller managing metrology interface, LCD driver, real-time clock, and secure serial communication. Use Value: 32 kB flash stores dual tariff firmware and encryption keys; WWDT ensures reliable metering during grid transients; 10-bit ADC reads shunt voltage with ±0.5% linearity. | Use Scenario: Dimmable LED driver with DALI or 0–10 V analog interface and thermal foldback protection. IC Role / Device Role / Timing Role: System manager coordinating PWM dimming, temperature sensing, fault reporting, and communication protocol translation. Use Value: Programmable pseudo open-drain GPIO directly drives DALI bus; 8 kB SRAM buffers sensor readings; Sleep mode draws <15 µA between dimming updates. |
| Alarm Systems | White Goods |
Use Scenario: Wireless security panel with PIR motion detection, siren control, keypad scanning, and RF module interface. IC Role / Device Role / Timing Role: Central control unit handling sensor polling, alarm state machine, audio playback, and encrypted wireless packet assembly. Use Value: Four general-purpose timers manage independent PIR sampling intervals, siren tone generation, and RF transmit timing; WAKEUP pin enables instant response from Deep-sleep. | Use Scenario: Washing machine main control board managing motor commutation, water level sensing, heater control, and user interface. IC Role / Device Role / Timing Role: Primary MCU executing motor control algorithms, ADC-based load sensing, relay actuation, and display update scheduling. Use Value: UART with RS-485 support communicates with inverter module; 32 kB flash accommodates field-upgradable motor profiles; BOD thresholds prevent erratic behavior during brownout events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC1343FHN33 | Includes USB 2.0 full-speed device controller with on-chip PHY; same flash/SRAM but lacks WWDT and /01 power profiles. | Required where USB device enumeration (MSC/HID) is mandatory; unsuitable for designs needing WWDT or multi-threshold BOD. | Select only if USB connectivity outweighs watchdog robustness and ultra-low-power sleep requirements. |
| LPC11U37FHN33/01 | ARM Cortex-M0 core, 50 MHz max, 64 kB flash, 12 kB SRAM, USB device, no WWDT, but includes CRC engine and more GPIOs. | Better suited for USB-centric applications with lighter processing load; lacks WWDT and advanced power profiling of LPC1313FHN33/01. | Choose when USB host/device flexibility and larger code space are prioritized over deterministic M3 real-time performance and windowed watchdog protection. |
Compared with LPC1343FHN33, the LPC1313FHN33/01 trades USB capability for superior reliability (WWDT) and lower active/sleep power; versus LPC11U37FHN33/01, it offers stronger real-time determinism and certified watchdog safety at the cost of USB integration and larger memory.
Availability
LPC1313FHN33/01 is available at Aetrix Electronics and suitable for eMetering, lighting control, and alarm systems requiring stable component supply, long-term lifecycle support, and verified industrial-grade qualification.
Supply support for LPC1313FHN33/01 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The LPC1300L series - including LPC1313FHN33/01 - was designed specifically for energy-conscious embedded control applications demanding extended battery life, robust fault recovery, and minimal PCB footprint in consumer and industrial equipment.
FAQ
What distinguishes the /01 suffix in LPC1313FHN33/01 from non-/01 variants?
The /01 suffix denotes the LPC1300L series, which adds four-level brownout detect (BOD) forced reset, Windowed Watchdog Timer (WWDT), programmable pseudo open-drain GPIO, internal pull-ups to full VDD, and power profile APIs in boot ROM - all confirmed in the official NXP datasheet for LPC1313FHN33/01 and absent in base LPC1313FHN33.
Does LPC1313FHN33/01 support USB functionality?
No, LPC1313FHN33/01 does not include a USB controller or PHY. USB device capability is exclusive to LPC1342/43 variants per the NXP datasheet. The LPC1313FHN33/01 retains UART, I²C-Fast-mode Plus, and dual SSP interfaces for alternative communication.
What is the maximum operating frequency and memory configuration of LPC1313FHN33/01?
LPC1313FHN33/01 operates at up to 72 MHz using the ARM Cortex-M3 core, with 32 kB on-chip flash memory and 8 kB SRAM. These values are fixed for this part number and confirmed in Table 2 of the NXP LPC1311/13/42/43 datasheet Rev. 5.
Which package type and pin count does LPC1313FHN33/01 use?
LPC1313FHN33/01 uses the HVQFN33 package: a 33-terminal, leadless, thermally enhanced quad flat package with dimensions 7 × 7 × 0.85 mm. This is explicitly stated in Table 1 (Ordering Information) and Figure 5 of the NXP datasheet.
Can LPC1313FHN33/01 wake from Deep power-down mode using GPIO pins?
Yes, LPC1313FHN33/01 supports wake-up from Deep power-down mode via up to 40 functional GPIO pins, including dedicated WAKEUP-capable pins like PIO1_4/AD5/CT32B1_MAT3/WAKEUP. The datasheet specifies that a LOW-going pulse ≥50 ns on such pins exits Deep power-down and resumes execution.
LPC1313FHN33/01,55 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 32-VQFN Exposed Pad
- Series:
- LPC13xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 72MHz
- Connectivity:
- I2C, Microwire, SPI, SSI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, WDT
- Number of I/O:
- 28
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 8K x 8
- Voltage - Supply (Vcc/Vdd):
- 2V ~ 3.6V
- Data Converters:
- A/D 8x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC1313FHN33/01,55 FAQ
1.How can I place an order for LPC1313FHN33/01,55 through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC1313FHN33/01,55 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC1313FHN33/01,55 reliable?
The price and inventory of LPC1313FHN33/01,55 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC1313FHN33/01,55 is usually 5 days.
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Once your LPC1313FHN33/01,55 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC1313FHN33/01,55?
For technical support, including LPC1313FHN33/01,55 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC1313FHN33/01,55 requirements.
6.How does Aetrix verify that LPC1313FHN33/01,55 is sourced from the original manufacturer or authorized distributors?
All LPC1313FHN33/01,55 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC1313FHN33/01,55 meets industry standards.
7.What is the process for return or replacement of LPC1313FHN33/01,55?
All LPC1313FHN33/01,55 units undergo pre-shipment inspection (PSI). If there is an issue with LPC1313FHN33/01,55, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC1313FHN33/01,55 part is unused and in its original packaging.
Return procedure for LPC1313FHN33/01,55:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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