NXP Semiconductors LPC1343FHN33,551

Overview

LPC1343FHN33,551 from NXP Semiconductors is a 32-bit ARM Cortex-M3 microcontroller in a 33-pin HVQFN package, operating at up to 72 MHz with 32 kB flash, 8 kB SRAM, USB Device controller (full-speed), one UART with RS-485 support, Fast-mode Plus I²C, four general-purpose timers, and 10-bit ADC across eight channels - deployed in smart lighting control systems requiring compact footprint and integrated USB firmware update capability.

For engineers reviewing the LPC1343FHN33,551 datasheet, LPC1343FHN33,551 pinout, LPC1343FHN33,551 application, or LPC1343FHN33,551 equivalent, key selection criteria include USB device stack readiness, 33-pin thermal-enhanced HVQFN packaging for space-constrained designs, 72 MHz deterministic real-time execution, Fast-mode Plus I²C (1 Mbit/s) for sensor interfacing, and wake-up-from-Deep-sleep via up to 40 GPIO pins.

Technical Context

The LPC1343FHN33,551 implements an ARM Cortex-M3 core with Harvard architecture, 3-stage pipeline, and internal prefetch unit supporting speculative branching - enabling deterministic interrupt latency and efficient code execution. Its peripheral set includes dedicated USB PLL, on-chip USB PHY, and Serial Wire Debug/Trace interface for development and production diagnostics.

Power management is handled by an integrated PMU supporting Sleep, Deep-sleep, and Deep power-down modes, with brownout detection offering four forced-reset thresholds and programmable power profiles residing in boot ROM - allowing runtime optimization of performance versus current draw without hardware changes.

Key Specifications

Pinout & Package

HVQFN33 package: plastic thermal enhanced very thin quad flat package, no leads, 33 terminals, body size 7 × 7 × 0.85 mm.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Compared with LPC1343FBD48, the LPC1343FHN33,551 offers superior thermal dissipation and space savings in volume production; compared with LPC1549JBD100, it retains full USB Device capability and lower power consumption in Deep-sleep - making it optimal for compact, USB-configurable edge nodes.

Availability

LPC1343FHN33,551 is available at Aetrix Electronics and suitable for smart lighting control, industrial sensor nodes, alarm system keypads, and white goods UI modules requiring stable component supply, long-term manufacturability, and consistent electrical specifications across production batches.

Supply support for LPC1343FHN33,551 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.

The LPC1300 series, including the LPC1343FHN33,551, was designed specifically for cost-sensitive, space-constrained embedded systems requiring USB device capability, low-power operation, and ARM Cortex-M3 real-time performance - targeting lighting, metering, and appliance control markets.

FAQ

What USB capabilities does the LPC1343FHN33,551 support?

The LPC1343FHN33,551 integrates a full-speed USB 2.0 Device controller with on-chip PHY, supporting USB MSC and HID class drivers out of the box. It includes USB_FTOGGLE, USB_CONNECT, USB_VBUS, USB_DP, and USB_DM pins - enabling plug-and-play firmware updates and human interface functionality without external components. The LPC1343FHN33,551 does not support USB Host mode.

Does the LPC1343FHN33,551 support USB device enumeration without external circuitry?

Yes, the LPC1343FHN33,551 supports self-powered USB device enumeration using its internal SoftConnect feature. By driving PIO0_6/USB_CONNECT, the device activates an internal 1.5 kΩ pull-up resistor on USB_DP, satisfying USB specification requirements for device detection - eliminating the need for external pull-up resistors or USB transceivers.

What is the maximum ADC sampling rate achievable on the LPC1343FHN33,551?

The LPC1343FHN33,551 features a 10-bit successive approximation ADC with up to eight input channels. Its maximum sampling rate is 400 kS/s under optimal conditions (single-ended mode, no oversampling). Conversion time is approximately 2.5 μs per sample, and the ADC supports burst mode triggered by timers or external events - enabling precise timing-critical measurements in lighting or sensor applications.

How many GPIO pins are available on the LPC1343FHN33,551 in the HVQFN33 package?

The LPC1343FHN33,551 provides up to 42 general-purpose I/O pins across its GPIO ports (PIO0–PIO3), though only 33 are physically accessible in the HVQFN33 package. Of these 33 pins, 31 are user-configurable GPIOs (excluding VDD, VSS, RESET, XTALIN, XTALOUT), with full support for pull-up/pull-down, hysteresis, and edge/level-sensitive interrupts - sufficient for most compact embedded control tasks.

What power modes does the LPC1343FHN33,551 support and what are their typical current draws?

The LPC1343FHN33,551 supports three reduced-power modes: Sleep (CPU stopped, peripherals active), Deep-sleep (SRAM retained, clocks gated), and Deep power-down (SRAM lost, <1 μA typical). In Deep power-down, wake-up is possible via up to 40 GPIO pins with 50 ns pulse detection. Typical currents are ~150 μA in Sleep, ~20 μA in Deep-sleep, and <1 μA in Deep power-down - verified per NXP datasheet Rev. 5.