NXP Semiconductors LPC1759FBD80Y
- Part No.:
- LPC1759FBD80Y
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 80-LQFP
- Datasheet:
-
LPC1759FBD80Y.pdf
- Description:
- IC MCU 32BIT 512KB FLASH 80LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:100
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Product details
Overview
LPC1759FBD80Y from NXP Semiconductors is a 32-bit ARM Cortex-M3 microcontroller operating at up to 120 MHz, featuring 512 kB flash, 64 kB SRAM, dual CAN 2.0B interfaces, USB 2.0 Host/Device/OTG with on-chip PHY, and 52 GPIO pins. It targets industrial networking and motor control systems requiring real-time deterministic response, integrated connectivity, and low-power operation.
For engineers reviewing the LPC1759FBD80Y datasheet, LPC1759FBD80Y pinout, LPC1759FBD80Y application, or LPC1759FBD80Y equivalent, key selection criteria include its 120 MHz CPU frequency, dual-CAN + USB OTG + I2S support, 12-bit ADC with DMA, 10-bit DAC, and 80-pin LQFP package with full peripheral pin mapping for mixed-signal embedded designs.
Technical Context
The LPC1759FBD80Y implements an ARM Cortex-M3 core with Harvard architecture, 3-stage pipeline, and integrated MPU supporting eight memory regions. Its multilayer AHB matrix enables concurrent access by CPU, GPDMA, USB, and (in other variants) Ethernet - though Ethernet MAC is excluded in this part.
Peripheral integration includes dual CAN controllers, four UARTs with RS-485/IrDA support, two SSPs, two I²C-bus interfaces, I²S for digital audio, 6-channel 12-bit ADC, 10-bit DAC with dedicated timer, motor control PWM, quadrature encoder interface, and RTC with battery backup - all accessible via configurable pin multiplexing and APB/AHB bridges.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M3 with 3-stage pipeline, Harvard architecture, and NVIC interrupt controller - enables deterministic real-time execution and low-latency ISR handling. |
| Max Clock Frequency | 120 MHz - achieved via PLL and flash accelerator with zero wait states, delivering 1.25 DMIPS/MHz performance. |
| Memory | 512 kB on-chip flash + 64 kB SRAM (32 kB CPU-local + two 16 kB AHB blocks) - supports complex firmware, USB/Ethernet buffers, and DMA-accelerated data movement. |
| Connectivity | Dual CAN 2.0B channels, USB 2.0 Full-Speed Host/Device/OTG with on-chip PHY, four UARTs, two I²C, two SSP, SPI, and I²S - enables multi-protocol industrial fieldbus and audio subsystem integration. |
| Analog Peripherals | 6-input 12-bit ADC (200 kSPS), 10-bit DAC with dedicated timer and DMA - suitable for closed-loop motor control feedback and analog waveform generation. |
| Timers & PWM | Four general-purpose timers, six-output general-purpose PWM, motor control PWM with three-phase support, and quadrature encoder interface - optimized for precision motion control and sensor timing. |
| Package & I/O | 80-pin LQFP (12 × 12 × 1.4 mm), 52 GPIO with configurable pull-up/down, open-drain mode, bit-banding, and edge/level-sensitive interrupts on Port 0/2 - simplifies PCB layout and enhances noise immunity in industrial environments. |
Pinout & Package
Package: 80-pin LQFP (SOT315-1), 12 mm × 12 mm × 1.4 mm body, RoHS-compliant, lead-free, with exposed thermal pad (not electrically connected).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| TCK/SWDCLK (Pin 5) | JTAG/SWD clock input | Enables debug and programming via standard ARM debug infrastructure; shared with Serial Wire Debug for reduced pin count. |
| P0[26]/AOUT (Pin 6) | Analog output / ADC input | Dedicated 10-bit DAC output (LPC1759-specific); when configured as DAC, digital I/O is disabled - requires external filtering for analog signal integrity. |
| P0[29]/USB_D+ & P0[30]/USB_D− (Pins 22–23) | USB differential pair | Full-speed USB 2.0 physical interface with on-chip transceiver - eliminates need for external PHY and reduces BOM cost and board space. |
| P1[19]/USB_PPWR (Pin 26) | USB port power control | Active-low enable signal for external USB port power switch - supports host-mode power management and hot-plug detection. |
| P2[7]/RD2 & P2[8]/TD2 (Pins 51–50) | CAN2 receiver/transmitter | Second CAN 2.0B channel (LPC1759-specific); enables dual-bus automotive or industrial network redundancy without external CAN controllers. |
| RSTOUT (Pin 11) | Reset status indicator | Open-drain 3.3 V output asserting LOW during device reset - used for system-level reset monitoring and synchronization with companion ICs. |
Key Features
| Feature | Design Value |
|---|---|
| Flash Accelerator | Enables zero-wait-state execution at 120 MHz - eliminates CPU stalls during instruction fetch, critical for time-critical ISR and real-time loop execution. |
| GPDMA Controller | 8-channel AHB-based DMA supporting UART, ADC, DAC, I²S, SSP, and memory-to-memory transfers - offloads CPU from data movement, reducing latency and power consumption. |
| I²S Audio Interface | 3- and 4-wire digital audio I/O with fractional rate control and DMA coupling - enables high-fidelity audio streaming in lighting control or smart appliance applications. |
| Motor Control PWM | Three-phase complementary output with dead-time insertion and fault protection inputs - directly drives gate drivers for BLDC/PMSM motors without external logic. |
| Power Management | Four low-power modes (Sleep, Deep-sleep, Power-down, Deep power-down) with Wakeup Interrupt Controller (WIC) - extends battery life in metering and remote sensor nodes. |
| Debug & Trace | Serial Wire Debug (SWD), Serial Wire Trace (SWO), and Emulation Trace Module - provides non-intrusive real-time instruction trace and live variable inspection during development. |
Applications
| Industrial Networking Node | Smart Lighting Controller |
|---|---|
|
Use Scenario: Programmable gateway connecting Modbus RTU field devices to Ethernet backbone via protocol translation. IC Role / Device Role / Timing Role: Central MCU executing dual-CAN stack, USB CDC ACM bridge, and real-time scheduling of packet forwarding. Use Value: Dual CAN + USB OTG + 120 MHz processing enables concurrent protocol handling without external co-processors or FPGA logic. |
Use Scenario: DALI-2 and 0–10 V dimmable LED driver with color temperature tuning and energy reporting. IC Role / Device Role / Timing Role: System-on-chip managing PWM dimming, I²C sensor reads, 12-bit ADC current sensing, and USB configuration interface. Use Value: Integrated 10-bit DAC generates precise analog dimming references; I²S supports synchronized audio feedback for commissioning. |
| Motor Drive Reference Design | eMetering Data Concentrator |
|
Use Scenario: 3-phase BLDC drive for HVAC fan with Hall-effect commutation and thermal monitoring. IC Role / Device Role / Timing Role: Real-time motor controller executing FOC algorithm, quadrature encoder position capture, and PWM update at 20 kHz. Use Value: Motor control PWM block with hardware dead-time insertion and fault shutdown ensures safe gate driving; 12-bit ADC samples phase currents with <1 µs latency. |
Use Scenario: AMI endpoint aggregating pulse outputs from 8 utility meters and transmitting via GPRS over USB CDC. IC Role / Device Role / Timing Role: Low-power concentrator running RTC-based wake-up, pulse counting via GPIO capture, and USB mass storage logging. Use Value: Ultra-low-power RTC with 20-byte battery-backed registers retains billing data during mains outage; 52 GPIO support parallel pulse inputs without expanders. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC1769FBD100 | 100-pin LQFP, adds Ethernet MAC + RMII, same 120 MHz CPU and peripheral set except no I²S. | Suitable for wired industrial gateways requiring Ethernet but not audio; larger footprint and higher pin count. | Select when Ethernet connectivity is mandatory and board area allows 100-pin package. |
| LPC1788FBD208 | 208-pin LQFP, adds LCD controller, external memory interface, and enhanced USB HS OTG; operates at 120 MHz with 512 kB flash. | Targeted at HMI-rich applications like panel meters or human-machine interfaces; higher BOM and layout complexity. | Choose when display integration, external SDRAM, or USB high-speed host capability is required. |
Compared with LPC1759FBD80Y, the LPC1769FBD100 trades I²S for Ethernet in a larger package, while the LPC1788FBD208 adds display and memory expansion at significantly increased pin count and cost - making LPC1759FBD80Y optimal for compact, audio-capable, dual-CAN industrial controllers where Ethernet is unnecessary.
Availability
LPC1759FBD80Y is available at Aetrix Electronics and suitable for industrial networking nodes, smart lighting controllers, motor drive reference designs, eMetering data concentrators, and alarm systems requiring stable component supply across long-lifecycle embedded programs.
Supply support for LPC1759FBD80Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in ARM-based microcontrollers and edge processing.
The LPC1700 series was designed specifically for resource-constrained industrial embedded systems demanding real-time responsiveness, multi-protocol connectivity, and robust operation across extended temperature ranges.
FAQ
What is the maximum operating frequency of the LPC1759FBD80Y?
The LPC1759FBD80Y operates at a maximum CPU frequency of 120 MHz, enabled by its integrated PLL and flash accelerator that delivers zero-wait-state execution. This frequency is confirmed in Table 2 of the official NXP datasheet Rev. 8.7 and applies specifically to the LPC1759 variant - other family members (e.g., LPC1758) are limited to 100 MHz. The LPC1759FBD80Y achieves this speed using either the main crystal oscillator, internal RC oscillator, or RTC oscillator as PLL input.
Does the LPC1759FBD80Y include an Ethernet MAC?
No, the LPC1759FBD80Y does not include an Ethernet MAC. According to Table 2 in the NXP datasheet Rev. 8.7, Ethernet is explicitly marked "no" for the LPC1759FBD80Y, while it is present only in the LPC1758 variant. The LPC1759FBD80Y retains full USB 2.0 Host/Device/OTG, dual CAN, I²S, and 10-bit DAC functionality - making it distinct from Ethernet-capable siblings in the same family.
Which pins on the LPC1759FBD80Y support the 10-bit DAC output?
The 10-bit DAC output on the LPC1759FBD80Y is available exclusively on Pin 6 (P0[26]/AOUT), as specified in Section 7.2 "Pin description" of the NXP datasheet Rev. 8.7. This pin is 5 V tolerant when used as a digital I/O but functions as an analog output when the DAC is enabled - at which point the digital section is disabled. No other pin on the LPC1759FBD80Y provides DAC functionality.
How many CAN interfaces does the LPC1759FBD80Y support?
The LPC1759FBD80Y supports two independent CAN 2.0B interfaces: CAN1 on P0[0]/RD1 and P0[1]/TD1, and CAN2 on P2[7]/RD2 and P2[8]/TD2. This is confirmed in both the "Features and benefits" section and Table 2 of the NXP datasheet Rev. 8.7, which lists "2" under the CAN column for LPC1759FBD80Y - distinguishing it from variants like LPC1754/52/51 that support only one CAN channel.
Is the LPC1759FBD80Y pin-compatible with other LPC17xx variants in the same package?
The LPC1759FBD80Y shares the same 80-pin LQFP (SOT315-1) package and mechanical pinout with LPC1758FBD80, LPC1756FBD80, LPC1754FBD80, LPC1752FBD80, and LPC1751FBD80. However, electrical functionality differs per pin due to variant-specific peripherals - for example, P1[0]–P1[15] are reserved for Ethernet on LPC1758 but are general-purpose GPIO on LPC1759FBD80Y. Therefore, while physically pin-compatible, software and schematic design must account for functional differences.
LPC1759FBD80Y Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 80-LQFP
- Series:
- LPC17xx
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, I2C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 52
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 64K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.4V ~ 3.6V
- Data Converters:
- A/D 6x12b; D/A 1x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC1759FBD80Y FAQ
1.How can I place an order for LPC1759FBD80Y through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC1759FBD80Y on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC1759FBD80Y reliable?
The price and inventory of LPC1759FBD80Y are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC1759FBD80Y is usually 5 days.
3.What payment methods are accepted for LPC1759FBD80Y?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC1759FBD80Y transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC1759FBD80Y?
LPC1759FBD80Y orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC1759FBD80Y order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC1759FBD80Y?
For technical support, including LPC1759FBD80Y datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC1759FBD80Y requirements.
6.How does Aetrix verify that LPC1759FBD80Y is sourced from the original manufacturer or authorized distributors?
All LPC1759FBD80Y products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC1759FBD80Y meets industry standards.
7.What is the process for return or replacement of LPC1759FBD80Y?
All LPC1759FBD80Y units undergo pre-shipment inspection (PSI). If there is an issue with LPC1759FBD80Y, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC1759FBD80Y part is unused and in its original packaging.
Return procedure for LPC1759FBD80Y:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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