NXP Semiconductors LPC1763FBD100Y
- Part No.:
- LPC1763FBD100Y
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
LPC1763FBD100Y.pdf
- Description:
- IC MCU 32BIT 256KB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC1763FBD100Y from NXP Semiconductors is a 32-bit ARM Cortex-M3 microcontroller in LQFP100 package, operating at up to 100 MHz with 256 kB flash, 64 kB SRAM, and 70 GPIO pins. It integrates UARTs, I²C, SPI, SSP, ADC, PWM, RTC, and supports industrial motor control, lighting, and white goods applications.
For engineers reviewing the LPC1763FBD100Y datasheet, LPC1763FBD100Y pinout, LPC1763FBD100Y application, or LPC1763FBD100Y equivalent, key selection considerations include absence of Ethernet, USB Host/OTG, CAN, and I²S interfaces - distinguishing it from higher-tier LPC176x variants - and its optimized feature set for cost-sensitive embedded control where those peripherals are unnecessary.
Technical Context
The LPC1763FBD100Y implements an Arm Cortex-M3 core with 3-stage pipeline, Harvard architecture, and integrated MPU supporting eight memory regions. Its AHB multilayer matrix enables concurrent access by CPU, GPDMA, and peripherals without arbitration delay.
Peripheral subsystems include four UARTs (one with IrDA, one with RS-485 support), three I²C-bus interfaces (one compliant with Fast-mode Plus at 1 Mbit/s), two SSP controllers, 12-bit ADC (8-channel, 200 kHz sampling), 10-bit DAC, four general-purpose timers, motor control PWM, quadrature encoder interface, and RTC with battery-backed registers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M3, 100 MHz max - delivers deterministic real-time performance with NVIC and bit-banding support. |
| Flash Memory | 256 kB - sufficient for medium-complexity firmware with bootloader and field-upgrade space. |
| SRAM | 64 kB total (32+16+16 kB blocks) - enables simultaneous Ethernet/USB buffering, DMA transfers, and application stack. |
| GPIO Pins | 70 pins in 100-pin LQFP - supports extensive peripheral interfacing and configurable open-drain operation. |
| ADC | 12-bit, 8-channel, 200 kHz - suitable for analog sensor acquisition in motor feedback or power monitoring. |
| DAC | 10-bit, single-channel - provides analog output for calibration signals or audio tone generation. |
| Timers | Four general-purpose timers + motor control PWM + quadrature encoder interface - enables precise motion control and event timing. |
| Communication | 4× UART, 3× I²C, 2× SSP, SPI - covers industrial serial protocols without USB/Ethernet overhead. |
Pinout & Package
LPC1763FBD100Y uses a plastic low-profile quad flat package (LQFP100), 14 mm × 14 mm × 1.4 mm body, with 100 leads and standard SOT407-1 footprint compatible with automated PCB assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0[0]–P0[31] | General-purpose I/O port | 32-bit bidirectional port with individual direction control; supports edge-triggered interrupts on Port 0/2 pins. |
| P1[0]–P1[31] | General-purpose I/O port | 32-bit port with pin-muxed functions including UART, I²C, SSP, timer capture/match, and PWM outputs. |
| P2[0]–P2[13] | General-purpose I/O port | 14-bit port supporting EINT0–EINT3, trace debug signals, and additional PWM/timer functions. |
| P3[25], P3[26] | Timer/PWM pins | Support MAT0[0]/MAT0[1] match outputs and PWM1[2]/PWM1[3] - used for motor phase timing and synchronization. |
| P0[27], P0[28] | I²C0 interface | Open-drain SDA0/SCL0 pins - compliant with I²C-bus specification for sensor and EEPROM interfacing. |
| P0[29], P0[30] | USB D+/D− | Not implemented on LPC1763FBD100Y - these pins are no-connect per Table 2 and device ordering options. |
| VDD(3V3), VSS | Power supply | Single 3.3 V supply (2.4–3.6 V); requires local decoupling per pin group for stable MCU operation. |
| XTAL1, XTAL2 | Clock input | Supports 1–25 MHz crystal oscillator - enables precise timing for RTC, UART baud rates, and system clock stability. |
Key Features
| Feature | Design Value |
|---|---|
| ARM Cortex-M3 with MPU | Eight-region memory protection unit prevents task interference and enhances firmware robustness in multitasking environments. |
| Multi-bus AHB matrix | Enables concurrent CPU, DMA, and peripheral access - eliminates bus contention during high-throughput data transfers. |
| Configurable open-drain GPIO | Allows direct connection to I²C, SMBus, or wired-AND logic without external pull-ups in selected modes. |
| RTC with backup domain | 20 bytes of battery-backed registers retain state across power cycles - supports time-stamped logging and wake-up scheduling. |
| Four power modes | Sleep, Deep-sleep, Power-down, Deep power-down - reduces current draw to µA range while preserving RAM or register context. |
| GPDMA controller | Eight-channel DMA supports memory-to-peripheral transfers for UART, ADC, SSP, and I²S - offloads CPU during bulk data movement. |
Applications
| Industrial Motor Control | Smart Lighting Systems |
|---|---|
Use Scenario: Closed-loop BLDC motor drive with Hall-effect feedback and thermal monitoring. IC Role / Device Role / Timing Role: Main controller executing FOC algorithm, managing six PWM outputs, reading quadrature encoder and ADC inputs, and handling UART-based commissioning. Use Value: Integrated motor control PWM and quadrature encoder interface eliminate external ICs; 100 MHz CPU ensures sub-µs interrupt latency for commutation timing. | Use Scenario: DALI-2 or 0–10 V dimmable LED driver with occupancy sensing and daylight harvesting. IC Role / Device Role / Timing Role: System manager coordinating DALI transceiver, ambient light ADC, temperature sensor, and PWM dimming outputs. Use Value: Three I²C interfaces enable concurrent connection to light sensor, EEPROM, and auxiliary ICs; 12-bit ADC resolves lux-level changes with <1% error. |
| White Goods HMI | Alarm & Security Panel |
Use Scenario: Front-panel controller for washing machine with keypad scan, display backlight PWM, buzzer tone generation, and door lock actuation. IC Role / Device Role / Timing Role: Dedicated HMI processor handling user input, status indication, audio feedback, and appliance safety interlocks via GPIO and timers. Use Value: 70 GPIO pins support matrix keypad, LED drivers, and relay controls; 10-bit DAC generates audible tones without external audio codec. | Use Scenario: Zone-monitoring panel with PIR sensors, siren control, tamper detection, and GSM module communication. IC Role / Device Role / Timing Role: Central alarm processor polling sensor inputs, managing siren duty cycle, logging events to RTC-timestamped SRAM, and driving UART-connected modem. Use Value: Four UARTs allow simultaneous modem, keypad, expansion module, and debug interface; RTC with battery backup maintains log integrity during AC loss. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC1765FBD100 | 256 kB flash, same 64 kB SRAM, but adds USB Device/Host/OTG interface and 2 CAN channels. | Required where USB host capability (e.g., USB flash drive support) or CAN bus connectivity (e.g., HVAC control networks) is needed. | Select LPC1765FBD100 if USB/CAN are mandatory; LPC1763FBD100 remains optimal when those features add cost and complexity without benefit. |
| LPC1766FBD100 | Same peripherals as LPC1763FBD100 but includes Ethernet MAC with RMII interface and dedicated DMA. | Necessary for wired network connectivity (e.g., Modbus TCP gateway, remote firmware update over LAN). | Choose LPC1766FBD100 only when Ethernet is required; LPC1763FBD100 avoids PHY component cost and layout complexity in standalone control nodes. |
Compared with LPC1765FBD100 and LPC1766FBD100, the LPC1763FBD100 offers identical core performance and memory while omitting USB, CAN, and Ethernet - reducing BOM cost, PCB layer count, and EMI design effort for applications where those interfaces are unused.
Availability
LPC1763FBD100Y is available at Aetrix Electronics and suitable for industrial motor control, smart lighting systems, white goods HMI, and alarm/security panels requiring stable component supply and long-term production continuity.
Supply support for LPC1763FBD100Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader delivering secure, scalable solutions for automotive, industrial, IoT, and mobile applications.
The LPC176x series targets cost-optimized, high-integration embedded control - emphasizing real-time responsiveness, low-power operation, and peripheral flexibility for industrial and consumer equipment.
FAQ
What is the maximum operating frequency of the LPC1763FBD100Y?
The LPC1763FBD100Y operates at a maximum CPU frequency of 100 MHz, enabled by its ARM Cortex-M3 core and internal PLL. This frequency is sustained across the full industrial temperature range (–40 °C to +85 °C) with appropriate power supply and clock source configuration, and is confirmed in Table 2 of the official NXP datasheet Rev. 9.10.
Does the LPC1763FBD100Y include Ethernet or USB Host/OTG functionality?
No, the LPC1763FBD100Y does not include Ethernet MAC or USB Host/OTG controllers. As specified in Table 2 of the NXP datasheet, it supports USB Device only - unlike LPC1766FBD100 (Ethernet) or LPC1765FBD100 (USB Host/OTG). USB D+/D− pins are no-connect on this variant.
How much SRAM is available on the LPC1763FBD100Y, and how is it organized?
The LPC1763FBD100Y provides 64 kB of total SRAM, structured as 32 kB on the CPU bus plus two 16 kB blocks accessible via separate AHB paths. This arrangement allows concurrent CPU execution, DMA transfers (e.g., for UART or ADC), and peripheral buffering without contention - critical for deterministic real-time behavior in the LPC1763FBD100Y.
Which communication interfaces are supported by the LPC1763FBD100Y?
The LPC1763FBD100Y supports four UARTs (including one with IrDA and one with RS-485 support), three I²C-bus interfaces (one Fast-mode Plus compliant at 1 Mbit/s), two SSP controllers, SPI, and a 12-bit ADC with DMA capability. It lacks CAN, Ethernet, USB Host/OTG, and I²S - making it ideal for serial-centric control applications where those interfaces are unnecessary.
Is the LPC1763FBD100Y pin-compatible with other LPC176x devices?
Yes, the LPC1763FBD100Y is pin-compatible with other 100-pin LPC176x microcontrollers in LQFP100 package (e.g., LPC1765FBD100, LPC1766FBD100), sharing identical mechanical footprint and core GPIO mapping. However, peripheral pin assignments for USB, Ethernet, and CAN differ where those functions are absent - requiring careful signal validation during migration.
LPC1763FBD100Y Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 100-LQFP
- Series:
- LPC17xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 100MHz
- Connectivity:
- I2C, IrDA, Microwire, SPI, SSI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 70
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 64K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.4V ~ 3.6V
- Data Converters:
- A/D 8x12b; D/A 1x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC1763FBD100Y FAQ
1.How can I place an order for LPC1763FBD100Y through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC1763FBD100Y on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC1763FBD100Y reliable?
The price and inventory of LPC1763FBD100Y are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC1763FBD100Y is usually 5 days.
3.What payment methods are accepted for LPC1763FBD100Y?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC1763FBD100Y transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC1763FBD100Y?
LPC1763FBD100Y orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC1763FBD100Y order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC1763FBD100Y?
For technical support, including LPC1763FBD100Y datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC1763FBD100Y requirements.
6.How does Aetrix verify that LPC1763FBD100Y is sourced from the original manufacturer or authorized distributors?
All LPC1763FBD100Y products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC1763FBD100Y meets industry standards.
7.What is the process for return or replacement of LPC1763FBD100Y?
All LPC1763FBD100Y units undergo pre-shipment inspection (PSI). If there is an issue with LPC1763FBD100Y, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC1763FBD100Y part is unused and in its original packaging.
Return procedure for LPC1763FBD100Y:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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