NXP Semiconductors LPC1764FBD100K
- Part No.:
- LPC1764FBD100K
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
LPC1764FBD100K.pdf
- Description:
- IC MCU 32BIT 128KB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,036
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Product details
Overview
LPC1764FBD100K from NXP Semiconductors is a 32-bit ARM Cortex-M3 microcontroller in LQFP100 package, operating at up to 100 MHz with 128 kB flash, 32 kB AHB SRAM, and 70 GPIO pins. It integrates USB Device-only interface, dual CAN 2.0B controllers, four UARTs, three I²C buses, two SSP controllers, 12-bit ADC (8-channel), and motor control PWM - deployed in industrial motor drives and embedded control systems.
For engineers reviewing the LPC1764FBD100K datasheet, LPC1764FBD100K pinout, LPC1764FBD100K application, or LPC1764FBD100K equivalent, key selection criteria include USB Device-only capability (no Host/OTG), absence of Ethernet MAC and DAC, 128 kB flash limit, dual-CAN support, and LQFP100 mechanical compatibility with LPC236x Arm7 series.
Technical Context
The LPC1764FBD100K implements an ARM Cortex-M3 core with 3-stage pipeline, Harvard architecture, and integrated NVIC for deterministic interrupt handling. Its memory subsystem includes 128 kB on-chip flash with zero-wait-state operation at 100 MHz and separate 32 kB AHB SRAM block for CPU access.
Peripheral interconnect uses a multilayer AHB matrix supporting concurrent CPU, DMA, and peripheral access without arbitration delay, while split APB buses reduce CPU-DMA contention. The device supports full pin compatibility with LPC236x Arm7 MCUs, enabling drop-in migration in legacy 100-pin designs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M3, 100 MHz max - enables real-time deterministic execution with low-latency interrupt response. |
| Flash Memory | 128 kB - sufficient for medium-complexity firmware with bootloader, communication stacks, and control algorithms. |
| SRAM | 32 kB AHB SRAM - provides high-bandwidth data storage for active variables, buffers, and stack in time-critical tasks. |
| GPIO Pins | 70 general-purpose I/O - supports extensive peripheral interfacing, sensor arrays, and discrete I/O expansion in industrial controls. |
| USB Interface | USB 2.0 Full-Speed Device only - enables host-connected diagnostics, firmware updates, and HID-class peripherals without OTG or Host stack overhead. |
| CAN Channels | 2 × CAN 2.0B - allows dual-bus automotive or industrial fieldbus communication with message filtering and error handling. |
| ADC | 12-bit, 8-channel, 200 kHz sampling - delivers precision analog sensing for motor current, temperature, and voltage monitoring. |
| PWM Outputs | 6-output general-purpose PWM + motor control PWM - supports 3-phase motor drive, LED dimming, and power regulation with dead-time insertion. |
Pinout & Package
Package: LQFP100 (14 mm × 14 mm × 1.4 mm, SOT407-1) - standard surface-mount footprint compatible with automated assembly and legacy LPC236x layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0[0]–P0[31] | Port 0 I/O bank | 32-bit configurable GPIO with pin-muxed functions including UART, I²C, SSP, ADC, and CAN signals. |
| P1[0]–P1[31] | Port 1 I/O bank | 32-bit GPIO supporting Ethernet (not enabled on LPC1764), USB D+/D−, and timer/capture functions. |
| P0[29]/USB_D+ | USB differential pair | Full-speed USB Device data line - requires 3.3 V tolerant I/O and series termination per USB spec. |
| P0[30]/USB_D− | USB differential pair | Full-speed USB Device data line - routed as matched-length pair with controlled impedance (90 Ω differential). |
| P0[27]/SDA0 & P0[28]/SCL0 | I²C0 bus interface | Open-drain I²C-bus compliant pins - enable connection to sensors, EEPROMs, and PMICs without external pull-ups in many cases. |
Key Features
| Feature | Design Value |
|---|---|
| Memory Protection Unit (MPU) | 8-region MPU enforces memory access permissions - critical for robust firmware partitioning and safety-critical task isolation. |
| In-Application Programming (IAP) | On-chip bootloader enables field firmware updates via UART or USB - eliminates need for external programmer in production or service. |
| Dual CAN 2.0B Controllers | Independent message RAM, acceptance filters, and error counters - supports redundant bus architectures or multi-network gateways. |
| Motor Control PWM Block | Supports 3-phase center-aligned PWM with dead-time insertion and fault protection inputs - directly drives gate drivers in BLDC/PMSM inverters. |
| Quadrature Encoder Interface (QEI) | Hardware position/speed capture from incremental encoders - offloads CPU during motion control loops and reduces jitter. |
| Wake-up Interrupt Controller (WIC) | Enables wake-from-Deep-sleep on CAN activity, RTC alarm, or external pin edge - extends battery life in low-power monitoring nodes. |
Applications
| Industrial Motor Drives | Smart Energy Meters |
|---|---|
Use Scenario: Closed-loop control of 3-phase AC induction or BLDC motors in HVAC blowers, pumps, and compressors. IC Role / Device Role / Timing Role: Main controller executing FOC or scalar control algorithms, managing PWM generation, ADC sampling, and CAN-based commissioning. Use Value: Integrated motor PWM and QEI eliminate external timing ICs; dual CAN enables commissioning and diagnostics on separate fieldbus networks. | Use Scenario: Residential and commercial electricity meters with tariff switching, tamper detection, and remote firmware update. IC Role / Device Role / Timing Role: System-on-chip managing metrology ADC, real-time clock, secure firmware updates, and HPLC/RF communication interfaces. Use Value: USB Device interface enables certified firmware upgrades via utility-provided tools; 128 kB flash accommodates dual-bank secure boot and encryption libraries. |
| Building Automation Controllers | Industrial PLC I/O Modules |
Use Scenario: Distributed HVAC zone controllers with temperature/humidity sensing, valve actuation, and BACnet MS/TP communication. IC Role / Device Role / Timing Role: Edge node processor handling analog/digital I/O, scheduling, local logic, and serial fieldbus protocol stacks. Use Value: Four UARTs support simultaneous RS-485 (BACnet), RS-232 (debug), and IrDA (remote setup); 70 GPIO allow direct relay and sensor interfacing. | Use Scenario: DIN-rail mounted digital input/output expansion modules communicating over CANopen or Modbus RTU. IC Role / Device Role / Timing Role: Protocol gateway and I/O conditioner - isolating field-side signals, executing cyclic I/O scans, and forwarding data to main PLC CPU. Use Value: Dual CAN 2.0B supports both application-layer protocol and diagnostics channel; 32 kB SRAM buffers multiple Modbus transaction queues. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC1766FBD100 | 256 kB flash, same 32 kB SRAM, USB Device/Host/OTG, Ethernet MAC enabled | Supports USB Host (e.g., flash drive logging) and Ethernet connectivity (Modbus TCP, HTTP) | Select when firmware size exceeds 128 kB or networked diagnostics via Ethernet/USB Host are required. |
| LPC1763FBD100 | 256 kB flash, no USB, no CAN, no I²S, but retains Ethernet and dual USB modes | Targeted at Ethernet-centric applications without fieldbus requirements | Choose for cost-sensitive Ethernet gateway designs where CAN and USB Device are unnecessary. |
Compared with LPC1766FBD100 and LPC1763FBD100, the LPC1764FBD100K offers optimal balance of USB Device functionality, dual CAN, and 128 kB flash - making it ideal for fieldbus-connected motor controllers and smart meters where USB update capability and CAN diagnostics are essential but Ethernet or Host-mode USB add cost and complexity.
Availability
LPC1764FBD100K is available at Aetrix Electronics and suitable for industrial motor drives, smart energy meters, building automation controllers, and PLC I/O modules requiring stable component supply, long-term lifecycle assurance, and consistent LQFP100 packaging.
Supply support for LPC1764FBD100K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications.
The LPC176x family was designed for high-integration embedded control - delivering ARM Cortex-M3 performance with rich analog/mixed-signal peripherals, deterministic real-time response, and industrial-grade reliability in compact packages.
FAQ
What is the maximum CPU clock frequency supported by the LPC1764FBD100K?
The LPC1764FBD100K operates at a maximum CPU frequency of 100 MHz. This is achieved using the internal PLL driven by the main oscillator (1–25 MHz crystal) or the 4 MHz internal RC oscillator. The flash accelerator ensures zero wait states at this speed, enabling deterministic real-time execution without instruction fetch stalls.
Does the LPC1764FBD100K support USB Host or OTG functionality?
No, the LPC1764FBD100K supports USB 2.0 Full-Speed Device mode only - not Host or OTG. This is confirmed in Table 2 of the datasheet, which lists "Device only" under the USB column for LPC1764FBD100. Applications requiring USB Host (e.g., flash drive interface) must select LPC1766FBD100 or LPC1768FBD100 instead.
Is Ethernet MAC available on the LPC1764FBD100K?
No, Ethernet MAC is not available on the LPC1764FBD100K. Table 2 explicitly marks "yes" for Ethernet only on LPC1769/68/67/66/64 variants - but LPC1764FBD100 shows no Ethernet support. This omission reduces pin count utilization and simplifies PCB layout for non-networked control applications.
What are the SRAM configuration and allocation options for the LPC1764FBD100K?
The LPC1764FBD100K includes 32 kB of AHB SRAM dedicated to CPU access, with no additional SRAM blocks (unlike higher variants offering 16+16 kB). This single 32 kB block serves instruction/data caching, stack, heap, and peripheral buffers - sufficient for real-time control with USB and dual CAN stacks.
Does the LPC1764FBD100K include a Digital-to-Analog Converter (DAC)?
No, the LPC1764FBD100K does not include a DAC. Table 2 confirms "no" under the DAC column for this part number. For designs requiring analog output (e.g., sensor calibration signals), external DACs or PWM+filter solutions must be used - unlike LPC1768/69 which integrate a 10-bit DAC.
LPC1764FBD100K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 100-LQFP
- Series:
- LPC17xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 100MHz
- Connectivity:
- CANbus, Ethernet, I2C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 70
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.4V ~ 3.6V
- Data Converters:
- A/D 8x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC1764FBD100K FAQ
1.How can I place an order for LPC1764FBD100K through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC1764FBD100K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC1764FBD100K reliable?
The price and inventory of LPC1764FBD100K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC1764FBD100K is usually 5 days.
3.What payment methods are accepted for LPC1764FBD100K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC1764FBD100K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC1764FBD100K?
LPC1764FBD100K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC1764FBD100K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC1764FBD100K?
For technical support, including LPC1764FBD100K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC1764FBD100K requirements.
6.How does Aetrix verify that LPC1764FBD100K is sourced from the original manufacturer or authorized distributors?
All LPC1764FBD100K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC1764FBD100K meets industry standards.
7.What is the process for return or replacement of LPC1764FBD100K?
All LPC1764FBD100K units undergo pre-shipment inspection (PSI). If there is an issue with LPC1764FBD100K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC1764FBD100K part is unused and in its original packaging.
Return procedure for LPC1764FBD100K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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