NXP Semiconductors LPC1768FBD100,551

Overview

LPC1768FBD100,551 from NXP Semiconductors is a 32-bit ARM Cortex-M3 microcontroller designed for embedded control applications requiring Ethernet, USB Host/Device/OTG, dual CAN, and high-resolution analog I/O. It operates at up to 100 MHz, integrates 512 kB flash, 64 kB SRAM (32+16+16 kB), and supports 70 GPIO pins in LQFP100 package - deployed in industrial networking gateways and motor control systems.

For engineers reviewing the LPC1768FBD100,551 datasheet, LPC1768FBD100,551 pinout, LPC1768FBD100,551 application, or LPC1768FBD100,551 equivalent, key selection criteria include verified 100 MHz CPU operation, dual CAN 2.0B support, integrated Ethernet MAC with RMII, USB 2.0 full-speed OTG capability, and 12-bit ADC with DMA-accelerated sampling up to 200 kHz.

Technical Context

The LPC1768FBD100,551 implements an Arm Cortex-M3 core with Harvard architecture, 3-stage pipeline, and integrated Memory Protection Unit (MPU) supporting eight memory regions. Its AHB multilayer matrix enables concurrent access by CPU, GPDMA, Ethernet MAC, and USB controller without arbitration delay.

Peripheral subsystems include a dedicated 8-channel General Purpose DMA controller servicing UARTs, SSP, I2S, ADC, DAC, and timers; split APB buses for low-stall CPU-DMA interaction; and clock generation with main oscillator (1–25 MHz), 4 MHz ±1% internal RC, and dual PLLs (CPU and USB).

Key Specifications

Pinout & Package

LQFP100 package (SOT407-1), 14 mm × 14 mm × 1.4 mm body, 100 leads, standard pitch. Pinout validated per NXP datasheet Rev. 9.10 (2020), Table 5 and Fig 2.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Compared with LPC1768FBD100,551, the LPC1769FBD100,551 delivers higher CPU throughput for protocol stack processing, while the LPC1766FBD100,551 reduces BOM cost where Ethernet is unnecessary - both retain identical pinout, peripheral register map, and toolchain support.

Availability

LPC1768FBD100,551 is available at Aetrix Electronics and suitable for industrial networking gateways, smart lighting controllers, white goods motor drives, and alarm system hubs requiring stable component supply across long-lifecycle production programs.

Supply support for LPC1768FBD100,551 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications.

The LPC176x series was engineered for mid-range embedded control - balancing performance, peripheral richness, and low-power operation in resource-constrained industrial and consumer systems.

FAQ

What is the maximum operating frequency of the LPC1768FBD100,551?

The LPC1768FBD100,551 operates at a maximum CPU frequency of 100 MHz. This speed is sustained with zero wait states from on-chip flash memory thanks to its integrated flash accelerator. The core achieves this using the ARM Cortex-M3's 3-stage pipeline and Harvard architecture, enabling deterministic real-time execution in applications like motor control and protocol bridging where cycle timing is critical. The LPC1768FBD100,551 does not support the 120 MHz mode found in the LPC1769FBD100,551 variant.

Does the LPC1768FBD100,551 include an Ethernet MAC and what interface does it support?

Yes, the LPC1768FBD100,551 includes a fully integrated Ethernet MAC supporting 10/100 Mbps operation. It implements the Reduced Media Independent Interface (RMII), requiring only seven external signals (TXD0, TXD1, TX_EN, RXD0, RXD1, CRS_DV, REF_CLK) for connection to a PHY. The MAC features hardware checksum offload, IEEE 802.3 compliance, and dedicated DMA channel - eliminating CPU overhead for frame reception/transmission. The LPC1768FBD100,551 does not integrate a PHY; external PHY selection is required.

How many CAN interfaces does the LPC1768FBD100,551 support and what version of CAN protocol is implemented?

The LPC1768FBD100,551 supports two independent CAN 2.0B controllers, each compliant with ISO 11898-1. Both channels support standard (11-bit) and extended (29-bit) identifier formats, programmable bit timing, and automatic retransmission. They are accessible via dedicated pins (CAN1 on P0[0]/P0[1] and CAN2 on P0[4]/P0[5]) and feature message objects with acceptance filtering and FIFO buffering. This dual-CAN capability enables robust fieldbus communication in automotive body control modules and industrial PLC backplanes.

What analog-to-digital converter (ADC) capabilities does the LPC1768FBD100,551 provide?

The LPC1768FBD100,551 integrates an 8-channel, 12-bit successive approximation ADC with a maximum sampling rate of 200 kHz. It supports multiple result registers, burst conversion mode, and hardware trigger sources including timers and external events. The ADC input multiplexer accepts signals from P0[23]–P0[26] and P0[2]–P0[3], and its outputs can be streamed directly to memory via the GPDMA controller - essential for real-time motor current monitoring or sensor fusion. The LPC1768FBD100,551 also includes a 10-bit DAC on P0[26] for analog waveform generation.

Is the LPC1768FBD100,551 pin-compatible with any legacy NXP microcontrollers?

Yes, the LPC1768FBD100,551 is pin-compatible with the 100-pin LPC236x series of ARM7-based microcontrollers. This allows direct PCB replacement in existing designs upgrading from ARM7 to Cortex-M3 - retaining identical footprint, power pin locations, and peripheral pin assignments (e.g., UART0 on P0[2]/P0[3], SPI0 on P0[15]–P0[18]). Software migration requires adaptation to Cortex-M3 NVIC and memory map, but hardware layout reuse significantly reduces redesign effort and validation time for the LPC1768FBD100,551.