NXP Semiconductors LPC1822JET100E
- Part No.:
- LPC1822JET100E
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 100-TFBGA
- Datasheet:
-
LPC1822JET100E.pdf
- Description:
- IC MCU 32BIT 512KB FLSH 100TFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:520
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Product details
Overview
LPC1822JET100E from NXP Semiconductors is a 32-bit ARM Cortex-M3 microcontroller targeting industrial embedded control applications. It operates at up to 180 MHz, integrates 512 kB flash (bank A only), 104 kB SRAM, no Ethernet or LCD controller, one High-speed USB 2.0 host/device interface (USB0), and supports -40 °C to +105 °C operation in TFBGA100 packaging.
For engineers reviewing the LPC1822JET100E datasheet, LPC1822JET100E pinout, LPC1822JET100E application, or LPC1822JET100E equivalent, key selection considerations include its USB0-only connectivity, absence of Ethernet/LCD/EMC, 49 GPIO count, 4-channel ADC support, and TFBGA100 footprint for space-constrained industrial control modules.
Technical Context
The LPC1822JET100E implements the ARM Cortex-M3 r2p1 core with Harvard architecture, 3-stage pipeline, and integrated MPU/NVIC. It uses separate instruction/data buses and includes an internal prefetch unit with speculative branching for deterministic real-time execution.
Its peripheral set centers on USB0 (with on-chip high-speed PHY), dual 10-bit ADCs (4 channels total), SCTimer/PWM subsystem, GIMA crossbar, and four UART/USART interfaces - all accessible via AHB with DMA support. No Ethernet MAC, LCD controller, or external memory controller is present per ordering table data.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M3 r2p1, 180 MHz max - enables hard real-time deterministic control with low-latency interrupt response. |
| Flash Memory | 512 kB (Bank A only) - sufficient for firmware + bootloader in compact industrial firmware deployments without dual-bank OTA updates. |
| SRAM | 104 kB - supports RTOS stacks, USB descriptor buffers, and sensor data buffering without external RAM. |
| ADC | Two 10-bit ADCs, 4 shared input channels, 400 kSamples/s - suitable for multi-sensor analog monitoring in motor drives or power supplies. |
| USB Interface | One High-speed USB 2.0 Host/Device/OTG (USB0) with on-chip PHY - enables direct USB device enumeration or host-side peripheral attachment without external transceivers. |
| GPIO Count | 49 pins - provides scalable I/O for digital control, status indication, and peripheral interfacing in compact designs. |
| Operating Temp | -40 °C to +105 °C - qualified for under-hood automotive ancillaries, industrial PLC I/O modules, and harsh-environment gateways. |
Pinout & Package
Package: TFBGA100 (9 mm × 9 mm × 0.7 mm, SOT926-1). Ball pitch: 0.8 mm. Compatible with standard fine-pitch BGA reflow profiles.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDA | Analog Power Supply | 3.3 V supply for ADC/DAC reference; requires local 100 nF + 10 µF decoupling for noise-sensitive analog conversion. |
| P0_0 | Multiplexed I/O | Configurable as GPIO0[0], SSP1_MISO, or I2S0_TX_WS - enables flexible peripheral routing via SCU register setup. |
| USB0_DP / USB0_DM | USB Differential Pair | Direct connection to USB0 high-speed PHY; requires 90 Ω differential impedance trace and ESD protection per USB 2.0 spec. |
| CLKIN / CLKOUT | Crystal Input / Clock Output | Accepts 1–25 MHz crystal; CLKOUT can drive secondary peripherals or debug clocks at programmable dividers. |
| RESET | Active-Low Reset Input | Asynchronous reset with internal pull-up; compatible with pushbutton or supervisor IC assertion for system recovery. |
Key Features
| Feature | Design Value |
|---|---|
| State Configurable Timer/PWM (SCTimer) | Hardware-state-machine-based PWM generation with event-triggered transitions - eliminates CPU overhead for complex waveform synthesis in motor control. |
| Global Input Multiplexer Array (GIMA) | Dynamic routing of 32+ peripheral events (e.g., timer match, ADC EOC) to any timer/SCTimer/ADC input - enables tightly coupled sensor-to-actuator signal chains. |
| Dual 10-bit ADCs with Shared Channels | Simultaneous sampling capability across 4 analog inputs with independent trigger sources - supports phase-aligned current/voltage measurement in power converters. |
| USB0 with Integrated HS PHY | Full USB 2.0 high-speed (480 Mbps) operation without external PHY - reduces BOM cost and PCB area for USB-connected HMI or firmware update interfaces. |
| ROM-Based USB Stack & ISP Bootloader | 64 kB ROM contains certified USB device stack and UART/I2C/USB ISP firmware loader - accelerates development and enables field firmware recovery without JTAG. |
Applications
| Industrial Motor Control | Smart Energy Gateway |
|---|---|
Use Scenario: Closed-loop control of BLDC or stepper motors in factory automation systems requiring precise timing and analog feedback. IC Role / Device Role / Timing Role: Main controller executing FOC algorithms, managing PWM outputs via SCTimer, sampling current/voltage via dual ADCs, and communicating via USB0 to host PC. Use Value: Deterministic 180 MHz Cortex-M3 execution and hardware-accelerated SCTimer reduce jitter in commutation timing, improving motor efficiency and acoustic noise. | Use Scenario: Aggregating metering data from multiple smart meters and relaying it via USB-connected cellular modem to cloud infrastructure. IC Role / Device Role / Timing Role: Data concentrator MCU handling RS-485 Modbus polling, timestamping via RTC, buffering in 104 kB SRAM, and USB0 host-mode communication with modem. Use Value: Integrated USB0 host eliminates external transceiver, while 49 GPIO support isolated RS-485 transceivers and status LEDs in compact gateway enclosures. |
| RFID Reader Controller | White Goods UI Module |
Use Scenario: Managing ISO14443-A/B and ISO15693 RFID readers in access control terminals with LED/audio feedback and secure firmware updates. IC Role / Device Role / Timing Role: System-on-module controller driving reader ICs via SPI/UART, processing tag IDs, managing secure boot from 512 kB flash, and updating firmware over USB0. Use Value: ROM-based USB stack enables certified DFU mode; 104 kB SRAM accommodates cryptographic libraries and tag buffer queues without external memory. | Use Scenario: Front-panel control module for washing machines or dishwashers handling touch sensing, display backlight control, buzzer, and appliance state reporting. IC Role / Device Role / Timing Role: Dedicated UI controller interfacing capacitive touch via GPIO, driving LED segments via SCTimer PWM, and communicating appliance status via USB0 to main MCU. Use Value: SCTimer PWM provides flicker-free dimming of 16+ LEDs; 49 GPIO support direct touch electrode routing and button scanning without external expanders. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC1833JET100 | Same package and temp grade; adds second USB interface (USB1) with ULPI support and 8 ADC channels vs. 4. | Supports dual-USB topologies (e.g., simultaneous device + host) and higher-channel analog acquisition. | Select when needing USB1 for external high-speed PHY or additional ADC inputs beyond 4 channels. |
| LPC4322JET100 | Cortex-M4F core (168 MHz), same pinout, adds FPU and DSP instructions; retains identical USB0/ADC/GPIO specs. | Enables floating-point math for advanced motor control or audio processing without software emulation. | Select when algorithmic complexity demands hardware FPU acceleration while retaining identical hardware footprint and peripheral compatibility. |
Compared with LPC1833JET100 and LPC4322JET100, the LPC1822JET100 offers optimal cost/performance for USB-centric industrial controllers where dual USB or FPU are unnecessary - preserving design simplicity and BOM efficiency.
Availability
LPC1822JET100E is available at Aetrix Electronics and suitable for industrial motor control, smart energy gateways, RFID reader controllers, and white goods UI modules requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LPC1822JET100E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT markets.
The LPC18xx series is designed for high-performance, feature-rich embedded control - emphasizing USB connectivity, analog integration, and real-time determinism in space- and thermal-constrained industrial applications.
FAQ
What is the maximum operating frequency of the LPC1822JET100E?
The LPC1822JET100E operates at a maximum CPU frequency of 180 MHz. This is achieved using the ARM Cortex-M3 core with integrated flash accelerator and three PLLs - one dedicated to CPU clocking. The frequency is fully supported across the full -40 °C to +105 °C temperature range specified for the LPC1822JET100E.
Does the LPC1822JET100E include an Ethernet MAC?
No, the LPC1822JET100E does not include an Ethernet MAC. Per Table 2 in the official NXP datasheet, Ethernet is explicitly marked "no" for this variant. The LPC1822JET100E retains USB0, dual ADCs, SCTimer/PWM, and 49 GPIO but omits Ethernet, LCD, and EMC peripherals to optimize cost and footprint for USB-focused applications.
How much SRAM and flash memory does the LPC1822JET100E have?
The LPC1822JET100E integrates 104 kB of on-chip SRAM and 512 kB of flash memory allocated entirely to Bank A (Bank B is 0 kB). This configuration supports robust RTOS operation, USB descriptor storage, and firmware images while eliminating dual-bank overhead - consistent with its role as a cost-optimized industrial controller variant within the LPC18xx family.
What package type is used for the LPC1822JET100E?
The LPC1822JET100E uses the TFBGA100 package (SOT926-1): a 9 mm × 9 mm × 0.7 mm thin fine-pitch ball grid array with 100 balls and 0.8 mm pitch. This package enables high I/O density in compact industrial modules and is compatible with standard Type II BGA assembly processes.
Can the LPC1822JET100E support USB device and host modes simultaneously?
No, the LPC1822JET100E supports only one USB interface (USB0), which operates in Host/Device/OTG mode - not concurrently. While USB0 can be configured as either host or device depending on firmware, it cannot maintain both roles simultaneously. For dual-role concurrent operation, a second USB interface (e.g., USB1 on LPC1833JET100) would be required.
LPC1822JET100E Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 100-TFBGA
- Series:
- LPC18xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 180MHz
- Connectivity:
- CANbus, EBI/EMI, I2C, IrDA, Microwire, SD, SPI, SSI, SSP, UART/USART, USB, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, WDT
- Number of I/O:
- 49
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 16K x 8
- RAM Size:
- 104K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.2V ~ 3.6V
- Data Converters:
- A/D 4x10b; D/A 1x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC1822JET100E FAQ
1.How can I place an order for LPC1822JET100E through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC1822JET100E on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC1822JET100E reliable?
The price and inventory of LPC1822JET100E are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC1822JET100E is usually 5 days.
3.What payment methods are accepted for LPC1822JET100E?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC1822JET100E transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC1822JET100E?
LPC1822JET100E orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC1822JET100E order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC1822JET100E?
For technical support, including LPC1822JET100E datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC1822JET100E requirements.
6.How does Aetrix verify that LPC1822JET100E is sourced from the original manufacturer or authorized distributors?
All LPC1822JET100E products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC1822JET100E meets industry standards.
7.What is the process for return or replacement of LPC1822JET100E?
All LPC1822JET100E units undergo pre-shipment inspection (PSI). If there is an issue with LPC1822JET100E, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC1822JET100E part is unused and in its original packaging.
Return procedure for LPC1822JET100E:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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