NXP Semiconductors LPC1837JET256,551
- Part No.:
- LPC1837JET256,551
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 256-LBGA
- Datasheet:
-
LPC1837JET256,551.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 256LBGA
- Quantity:
- Payment:

- Shipping:

Inventory:4,489
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LPC1837JET256 from NXP Semiconductors is a 32-bit ARM Cortex-M3 microcontroller operating at up to 180 MHz, featuring 1 MB dual-bank flash, 136 kB SRAM, and integrated Ethernet MAC with IEEE 1588 support. It includes two high-speed USB 2.0 interfaces (one OTG-capable), quad SPI Flash Interface (SPIFI), SCTimer/PWM subsystem, and supports industrial control and e-metering applications.
For engineers reviewing the LPC1837JET256 datasheet, LPC1837JET256 pinout, LPC1837JET256 application, or LPC1837JET256 equivalent, key selection considerations include its LBGA256 package, -40 °C to +105 °C temperature grade, absence of LCD controller, and full EMC, CAN, ADC/DAC, and GPIO peripheral set for real-time embedded systems.
Technical Context
The LPC1837JET256 implements an ARM Cortex-M3 r2p1 core with Harvard architecture, 3-stage pipeline, and integrated MPU/NVIC for deterministic real-time execution. Its clock system uses three PLLs - one for CPU up to 180 MHz, one for USB, and one configurable as audio PLL - with crystal oscillator support from 1 MHz to 25 MHz.
Digital peripherals include a State-Configurable Timer/PWM (SCTimer/PWM) subsystem on AHB, Global Input Multiplexer Array (GIMA) for flexible event routing, and eight-channel GP DMA accessing all AHB memories and slaves. Analog resources comprise two 10-bit ADCs (400 kSamples/s, 8 total channels) and one 10-bit DAC (400 kSamples/s), all with DMA support.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M3 r2p1, 180 MHz max - enables deterministic real-time control with low-latency interrupt handling and memory protection. |
| Memory | 1 MB dual-bank flash (512 kB per bank) + 136 kB SRAM + 16 kB EEPROM - supports secure firmware updates and data logging without external storage. |
| Connectivity | Ethernet MAC (10/100T, RMII/MII, IEEE 1588 v2) + USB0 (Host/Device/OTG) + USB1 (Host/Device/ULPI) - enables time-synchronized industrial networking and dual-role USB device management. |
| Analog I/O | Two 10-bit ADCs (8 channels, 400 kSamples/s) + one 10-bit DAC (400 kSamples/s) - provides sufficient resolution and throughput for motor control feedback and analog output generation. |
| Digital Peripherals | SCTimer/PWM, GIMA, EMC, C_CAN 2.0B ×2, SD/MMC, I2S ×2, UART/USART ×4, SSP ×2, I2C ×2 - delivers flexible signal generation, sensor interfacing, and external memory expansion. |
| Package & Temp | LBGA256 (17 × 17 × 1 mm, SOT740-2), -40 °C to +105 °C - suitable for high-density industrial PCB layouts requiring extended thermal operation. |
Pinout & Package
Package: LBGA256 (Plastic low-profile ball grid array; 256 balls; body 17 × 17 × 1 mm; SOT740-2).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0_0 | GPIO0[0] / SSP1_MISO / ENET_RXD1 / I2S0_TX_WS | Multi-function digital I/O supporting Ethernet receive, SPI slave interface, and I2S word select - enables concurrent protocol stacking in networked edge devices. |
| P1_15 | GPIO0[2] / U2_TXD / ENET_RXD0 / T0_MAT1 | Combines UART2 transmit, Ethernet receive, and timer match output - allows synchronized communication and timing control on shared pins. |
| P1_19 | ENET_TX_CLK / SSP1_SCK / CLKOUT / I2S0_RX_MCLK | Shared clock resource for Ethernet, SPI, and I2S - simplifies clock tree design while maintaining domain-specific timing integrity. |
| P2_0 | U0_TXD / EMC_A13 / USB0_PPWR / GPIO5[0] | Supports ISP programming, external memory addressing, USB VBUS control, and general I/O - consolidates boot, expansion, and power management functions. |
| P2_1 | U0_RXD / EMC_A12 / USB0_PWR_FAULT / GPIO5[1] | Enables serial bootloader entry, memory mapping, overcurrent monitoring, and GPIO - critical for field-upgradable, safety-aware industrial firmware. |
Key Features
| Feature | Design Value |
|---|---|
| ARM Cortex-M3 with MPU & NVIC | Enables memory-isolated task execution and <1 µs interrupt latency for hard real-time control loops. |
| Dual-bank flash with independent erase/write | Allows background firmware update with zero downtime - essential for unattended industrial gateways. |
| IEEE 1588-2008 v2 Ethernet MAC | Provides sub-microsecond time synchronization across distributed nodes without external PTP hardware. |
| SCTimer/PWM subsystem | Configurable state machine-based PWM generation supports complex motor commutation patterns and event-triggered waveform synthesis. |
| GIMA crossbar interconnect | Routes GPIO, timer, ADC, and SCT events dynamically - eliminates fixed routing bottlenecks in multi-sensor data acquisition. |
Applications
| Industrial PLC Controller | e-Metering Gateway |
|---|---|
Use Scenario: Central logic unit in DIN-rail mounted programmable logic controllers managing I/O modules, motion control, and HMI communication. IC Role / Device Role / Timing Role: Main application processor executing ladder logic, handling EtherCAT/PROFINET stack, and synchronizing servo drives via PWM and QEI. Use Value: Dual-bank flash enables safe firmware rollback; EMC interface supports direct NOR flash/SRAM expansion; 164 GPIOs allow native I/O expansion without glue logic. | Use Scenario: Secure, time-synchronized data concentrator aggregating AMI meter readings over RF, PLC, or cellular backhaul. IC Role / Device Role / Timing Role: Primary MCU running DLMS/COSEM stack, performing AES encryption, and timestamping events using IEEE 1588 Ethernet and RTC alarm timer. Use Value: Integrated 10-bit ADC/DAC monitors analog sensor inputs and controls analog outputs; OTP memory stores cryptographic keys; 105 °C rating ensures reliability in outdoor enclosures. |
| RFID Reader System | White Goods Motor Control |
Use Scenario: High-throughput UHF RFID reader for warehouse inventory tracking with multi-protocol tag support and anti-collision handling. IC Role / Device Role / Timing Role: Baseband processor managing ISO18000-6C modulation/demodulation, antenna switching, and host interface bridging via USB/Ethernet. Use Value: SPIFI enables fast firmware loading from external QSPI flash; SCTimer/PWM generates precise RF carrier signals; USB0 OTG supports direct PC configuration. | Use Scenario: Inverter-driven compressor/fan control in HVAC and refrigerator systems requiring variable-speed operation and energy certification compliance. IC Role / Device Role / Timing Role: Real-time motor controller executing FOC algorithms, sampling current/voltage sensors, and generating 3-phase PWM via motor control PWM block. Use Value: Two 10-bit ADCs sample dual shunt currents simultaneously; QEI interface reads encoder position; 180 MHz CPU sustains 20 kHz PWM carrier with minimal jitter. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC1857JET256 | Includes LCD controller and 1 MB flash; otherwise identical peripheral set and pinout. | Required when driving color TFT displays; unnecessary for headless industrial gateways. | Select LPC1857JET256 only if display interface is needed - same footprint and software compatibility. |
| LPC4357JET256 | Dual-core: Cortex-M4F + Cortex-M0 co-processor; adds floating-point unit and enhanced DSP instructions. | Better suited for audio processing or advanced motor control requiring FPU acceleration. | Choose LPC4357JET256 when computational load exceeds Cortex-M3 capability - not pin-compatible due to different memory map and peripheral register layout. |
Compared with LPC1857JET256, the LPC1837JET256 removes LCD support to reduce cost and power while retaining full Ethernet, USB, EMC, and analog capability; versus LPC4357JET256, it offers lower BOM cost and simpler software development but lacks FPU and dual-core flexibility.
Availability
LPC1837JET256 is available at Aetrix Electronics and suitable for industrial PLC controllers, e-metering gateways, RFID readers, and white goods motor control systems requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LPC1837JET256 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The LPC18xx product line was designed specifically for high-performance, real-time industrial embedded applications requiring rich connectivity (Ethernet, USB, CAN), deterministic timing (IEEE 1588, SCTimer), and robust memory architecture (dual-bank flash, EEPROM).
FAQ
What is the maximum operating frequency of the LPC1837JET256?
The LPC1837JET256 operates at a maximum CPU frequency of 180 MHz, achieved via its ARM Cortex-M3 core and internal PLL configuration. This frequency is sustained across the full -40 °C to +105 °C industrial temperature range, with voltage regulation maintained by the on-chip core regulator. The LPC1837JET256 achieves this performance without requiring external high-frequency crystals thanks to its triple-PLL clock generation unit.
Does the LPC1837JET256 include an LCD controller?
No, the LPC1837JET256 does not include an LCD controller. This feature is present in the LPC185x series (e.g., LPC1857JET256) but explicitly omitted in the LPC183x family as confirmed in Table 2 of the datasheet. The LPC1837JET256 retains all other major peripherals including Ethernet, USB, EMC, and analog interfaces, making it optimized for headless industrial applications where display support is unnecessary.
What are the key differences between LPC1837JET256 and LPC1857JET256?
The primary difference is the inclusion of an LCD controller in the LPC1857JET256, absent in the LPC1837JET256. Both share identical CPU, memory (1 MB flash, 136 kB SRAM), Ethernet, USB, EMC, ADC/DAC, and package (LBGA256). They are pin-compatible and software-compatible at the register level, allowing drop-in replacement when display functionality is not required - reducing BOM cost and power consumption in headless designs.
Which USB interfaces does the LPC1837JET256 support?
The LPC1837JET256 supports two high-speed USB 2.0 interfaces: USB0 (Host/Device/OTG with on-chip high-speed PHY) and USB1 (Host/Device with on-chip full-speed PHY and ULPI interface for external high-speed PHY). Both include DMA support and ROM-resident USB stack components, enabling simultaneous USB device enumeration and host operation - ideal for embedded gateways requiring peripheral attachment and host-side protocol bridging.
What is the purpose of the SCTimer/PWM subsystem in the LPC1837JET256?
The State-Configurable Timer/PWM (SCTimer/PWM) subsystem in the LPC1837JET256 is a programmable state machine-based timer that supports complex waveform generation, event capture, and input synchronization. It replaces traditional timer/PWM blocks with configurable states and transitions, enabling precise motor control (e.g., 3-phase BLDC commutation), LED dimming sequences, and protocol-level signal generation - all with minimal CPU intervention due to autonomous event triggering and DMA integration.
LPC1837JET256,551 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 256-LBGA
- Series:
- LPC18xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 180MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, IrDA, Microwire, QEI, SD, SPI, SSI, SSP, UART/USART, USB, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 164
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 16K x 8
- RAM Size:
- 136K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.2V ~ 3.6V
- Data Converters:
- A/D 8x10b; D/A 1x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC1837JET256,551 FAQ
1.How can I place an order for LPC1837JET256,551 through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC1837JET256,551 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC1837JET256,551 reliable?
The price and inventory of LPC1837JET256,551 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC1837JET256,551 is usually 5 days.
3.What payment methods are accepted for LPC1837JET256,551?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC1837JET256,551 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC1837JET256,551?
LPC1837JET256,551 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC1837JET256,551 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC1837JET256,551?
For technical support, including LPC1837JET256,551 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC1837JET256,551 requirements.
6.How does Aetrix verify that LPC1837JET256,551 is sourced from the original manufacturer or authorized distributors?
All LPC1837JET256,551 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC1837JET256,551 meets industry standards.
7.What is the process for return or replacement of LPC1837JET256,551?
All LPC1837JET256,551 units undergo pre-shipment inspection (PSI). If there is an issue with LPC1837JET256,551, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC1837JET256,551 part is unused and in its original packaging.
Return procedure for LPC1837JET256,551:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LPC1837JET256,551 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

