NXP Semiconductors LPC18S37JET100E
- Part No.:
- LPC18S37JET100E
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 100-TFBGA
- Datasheet:
-
LPC18S37JET100E.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 100TFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC18S37JET100E from NXP Semiconductors is a 32-bit ARM Cortex-M3 microcontroller targeting industrial and embedded applications requiring Ethernet connectivity, USB host/device capability, and secure boot. It operates at up to 180 MHz, integrates 1 MB dual-bank flash (512 kB per bank), 136 kB SRAM, and supports -40 °C to +105 °C operation in a TFBGA100 package. Its dual High-speed USB controllers (USB0 with on-chip PHY, USB1 with ULPI interface) and 10/100T Ethernet MAC enable robust wired communication in gateway and edge-node designs.
For engineers reviewing the LPC18S37JET100E datasheet, LPC18S37JET100E pinout, LPC18S37JET100E application, or LPC18S37JET100E equivalent, key selection criteria include its TFBGA100 footprint, absence of LCD controller and QEI, limited to four ADC channels and no motor control PWM-critical for space-constrained, cost-optimized industrial controllers where Ethernet+USB coexistence is required without display or motion control peripherals.
Technical Context
The LPC18S37JET100E implements an ARM Cortex-M3 r2p1 core with Harvard architecture, 3-stage pipeline, and integrated MPU supporting eight memory regions. Its clock system includes three PLLs-one for CPU up to 180 MHz, one dedicated to USB0, and one configurable as audio PLL-enabling independent high-speed peripheral operation without external high-frequency crystals.
Digital subsystems feature a State Configurable Timer/PWM (SCTimer/PWM) with event-driven flexibility, Global Input Multiplexer Array (GIMA) for cross-peripheral signal routing, and an External Memory Controller (EMC) supporting SDRAM, NOR flash, and SRAM. Analog resources include two 10-bit ADCs (400 kSamples/s, shared 4-channel input) and one 10-bit DAC (400 kSamples/s), all with DMA support.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M3 r2p1, 180 MHz max - enables deterministic real-time control with low-latency interrupt handling via NVIC and MPU. |
| Memory | 1 MB dual-bank flash (512 kB each), 136 kB SRAM, 16 kB EEPROM - supports secure over-the-air updates with bank-swapping and non-volatile parameter storage. |
| Connectivity | 10/100T Ethernet MAC (RMII/MII, IEEE 1588 v2), USB0 (HS Host/Device/OTG w/PHY), USB1 (HS Host/Device w/ULPI) - enables time-synchronized industrial networking and dual-role USB device management. |
| Analog I/O | Two 10-bit ADCs (400 kSamples/s, 4 shared channels), one 10-bit DAC (400 kSamples/s) - sufficient for sensor monitoring and basic waveform generation in metering and control loops. |
| Security | AES engine with DMA support and ROM-based API - enables hardware-accelerated encryption/decryption of boot images and runtime data without CPU overhead. |
| Power & Temp | Single 3.3 V supply (2.4–3.6 V), -40 °C to +105 °C operating range - suitable for harsh industrial environments with minimal power conditioning. |
| GPIO | 49 programmable pins with configurable pull-up/down, AHB-located registers for fast access - optimized for compact TFBGA100 layouts with direct peripheral mapping and DMA-capable I/O. |
Pinout & Package
Package: TFBGA100 (9 mm × 9 mm × 0.7 mm, SOT926-1), 100-ball fine-pitch array with 0.8 mm pitch. Designed for high-density PCB layouts with thermal pad exposure for enhanced heat dissipation in sealed enclosures.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0_0 (G2) | I/O / ENET_RXD1 / I2S0_TX_WS | Primary Ethernet receive data line (RMII/MII); also serves as I2S word select-requires careful signal integrity planning when sharing functions. |
| P1_15 (K8) | I/O / ENET_RXD0 / T0_MAT1 | Ethernet receive data 0 input; dual-use as timer match output-enables synchronized timestamping of network frames with hardware timers. |
| P1_18 (J10) | O / ENET_TXD0 / T0_MAT3 | Ethernet transmit data 0 output; also provides precise PWM timing-supports deterministic Ethernet frame transmission with jitter-free timing control. |
| P1_19 (K9) | I / ENET_TX_CLK / CLKOUT | Reference clock input for RMII (50 MHz) or MII (25 MHz); configurable as system clock output-eliminates need for external clock buffer in RMII designs. |
| P2_3 (D8) | I/O / I2C1_SDA / U3_TXD | Shared I2C data line and USART3 transmit-requires software-controlled function switching; not simultaneously active. |
Key Features
| Feature | Design Value |
|---|---|
| ARM Cortex-M3 with MPU | Eight-region memory protection enforces strict isolation between firmware partitions-essential for certified industrial safety applications (IEC 61508 SIL-2). |
| Dual High-speed USB | USB0 with integrated HS PHY and USB1 with ULPI interface allow concurrent host/device roles-enables field-service USB mass storage while maintaining OTG functionality for diagnostics. |
| IEEE 1588-2008 v2 Support | Hardware timestamping in Ethernet MAC enables sub-microsecond synchronization across distributed nodes-critical for time-sensitive networking in PLC backplanes. |
| SCTimer/PWM Subsystem | Event-triggered state machine architecture replaces fixed-function timers-reduces firmware complexity for multi-phase timing sequences in protocol gateways. |
| AES Engine with ROM API | Hardware encryption accessible via immutable ROM calls-prevents runtime tampering and ensures secure boot image validation without exposing keys in RAM. |
Applications
| Industrial Gateway | Smart Energy Meter |
|---|---|
Use Scenario: Protocol translation between Modbus RTU field devices and cloud-connected Ethernet backbone in factory automation. IC Role / Device Role / Timing Role: Central MCU managing dual Ethernet ports (one for upstream SCADA, one for local HMI), USB for configuration dongle, and AES-secured firmware updates. Use Value: Dual USB + Ethernet eliminates need for external bridge ICs; 180 MHz core handles TLS stack and protocol parsing concurrently without latency spikes. |
Use Scenario: Revenue-grade electricity meter with tamper detection, remote firmware update, and time-of-use tariff calculation. IC Role / Device Role / Timing Role: Primary controller executing metrology algorithms, managing isolated RS-485 communications, and enforcing secure boot via AES-encrypted firmware images. Use Value: On-chip 16 kB EEPROM stores calibration constants and billing logs; IEEE 1588 sync aligns meter readings across substations for grid-wide load balancing. |
| RFID Reader Controller | White Goods Control Unit |
Use Scenario: Multi-protocol UHF RFID reader (EPC Gen2, ISO 18000-6C) with Ethernet backhaul and USB service port. IC Role / Device Role / Timing Role: Real-time RF signal processing coordinator interfacing with external RF transceivers, managing antenna switching, and buffering tag reads for Ethernet upload. Use Value: SCTimer/PWM precisely controls antenna dwell time and pulse timing; 49 GPIOs support parallel I/O for multiple antenna ports and status LEDs. |
Use Scenario: Washing machine main control board requiring motor control, user interface, and energy monitoring. IC Role / Device Role / Timing Role: System-on-chip replacing discrete MCU + analog front-end, handling UI buttons, display backlight, water level sensing, and heater control. Use Value: Integrated 10-bit ADCs monitor current/voltage for motor efficiency; USB0 enables service technician diagnostics without proprietary tools. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC1788FBD208 | ARM Cortex-M3 @ 120 MHz, 512 kB flash, 64 kB SRAM, no USB HS PHY, no AES engine, LQFP208 package. | Lacks hardware USB HS PHY and IEEE 1588 support-requires external PHY and software-based time sync. | Select when cost sensitivity outweighs need for hardware crypto and precise time stamping; requires larger PCB footprint. |
| LPC4357JET100 | Dual-core (Cortex-M4F + Cortex-M0), 264 kB SRAM, 1 MB flash, same TFBGA100, adds floating-point unit and enhanced DSP instructions. | Higher computational throughput for FFT-based signal analysis but increased power consumption and toolchain complexity. | Select for advanced motor control or audio preprocessing where M4F performance justifies added BOM cost and thermal design effort. |
Compared with LPC1788FBD208 and LPC4357JET100, the LPC18S37JET100E delivers optimal balance of Ethernet+USB integration, security acceleration, and compact packaging-making it ideal for industrial edge nodes where deterministic timing, secure firmware, and space constraints are primary drivers.
Availability
LPC18S37JET100E is available at Aetrix Electronics and suitable for industrial gateways, smart energy meters, RFID readers, and white goods control units requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LPC18S37JET100E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in ARM-based microcontrollers and trusted execution environments.
The LPC18Sxx product line targets high-reliability industrial applications demanding robust communication stacks (Ethernet, USB, CAN), hardware security (AES, secure boot), and deterministic real-time performance-designed specifically for protocol gateways and edge intelligence nodes.
FAQ
What is the maximum operating frequency of the LPC18S37JET100E?
The LPC18S37JET100E features an ARM Cortex-M3 processor capable of running at up to 180 MHz. This maximum frequency is achieved using the on-chip PLLs and requires proper decoupling, thermal management, and voltage regulation within the 2.4 V to 3.6 V supply range. The LPC18S37JET100E datasheet specifies this rating under full industrial temperature conditions (-40 °C to +105 °C), confirming sustained performance in demanding environments.
Does the LPC18S37JET100E include an LCD controller?
No, the LPC18S37JET100E does not include an LCD controller. According to Table 2 in the official NXP datasheet, the "LCD" column for LPC18S37JET100E is marked "no", distinguishing it from higher-pin-count variants like LPC18S57JET256. This omission reduces die size and cost, making the LPC18S37JET100E suitable for applications where display functionality is handled externally or omitted entirely.
How many ADC channels does the LPC18S37JET100E support?
The LPC18S37JET100E supports four analog input channels, shared between its two 10-bit ADCs (ADC0 and ADC1). As confirmed in Table 2 of the NXP datasheet, the "ADC channels" value is "4", and the pin description confirms that ADC inputs are multiplexed-each physical channel connects to both ADCs, enabling simultaneous sampling or redundancy without additional external circuitry.
What USB interfaces are available on the LPC18S37JET100E?
The LPC18S37JET100E integrates two High-speed USB 2.0 interfaces: USB0 supports Host/Device/OTG modes with an on-chip high-speed PHY, while USB1 supports Host/Device modes with ULPI interface to an external high-speed PHY. Per Table 2, USB1 lacks OTG capability and has no on-chip PHY-requiring external PHY silicon but offering flexibility in USB topology design.
Is the LPC18S37JET100E pin-compatible with other LPC18Sxx variants?
No, the LPC18S37JET100E is not pin-compatible with other LPC18Sxx variants due to its TFBGA100 package (100 balls), whereas LPC18S57JET256 uses LBGA256 (256 balls) and LPC18S37JBD144 uses LQFP144 (144 leads). Pin functions also differ significantly across packages-even identical pin names (e.g., P0_0) map to different ball positions and may have variant-specific alternate functions not present in the LPC18S37JET100E.
LPC18S37JET100E Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 100-TFBGA
- Series:
- LPC18xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 180MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, IrDA, Microwire, MMC/SD, SPI, SSI, SSP, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, WDT
- Number of I/O:
- 49
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 136K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.2V ~ 3.6V
- Data Converters:
- A/D 4x10b; D/A 1x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC18S37JET100E FAQ
1.How can I place an order for LPC18S37JET100E through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC18S37JET100E on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC18S37JET100E reliable?
The price and inventory of LPC18S37JET100E are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC18S37JET100E is usually 5 days.
3.What payment methods are accepted for LPC18S37JET100E?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC18S37JET100E transactions.
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4.How is shipping managed for LPC18S37JET100E?
LPC18S37JET100E orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC18S37JET100E order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC18S37JET100E?
For technical support, including LPC18S37JET100E datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC18S37JET100E requirements.
6.How does Aetrix verify that LPC18S37JET100E is sourced from the original manufacturer or authorized distributors?
All LPC18S37JET100E products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC18S37JET100E meets industry standards.
7.What is the process for return or replacement of LPC18S37JET100E?
All LPC18S37JET100E units undergo pre-shipment inspection (PSI). If there is an issue with LPC18S37JET100E, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC18S37JET100E part is unused and in its original packaging.
Return procedure for LPC18S37JET100E:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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