NXP Semiconductors LPC2105FBD48/01,15
- Part No.:
- LPC2105FBD48/01,15
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
LPC2105FBD48/01,15.pdf
- Description:
- IC MCU 16/32B 128KB FLASH 48LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC2105FBD48/01 from NXP Semiconductors is a 32-bit ARM7TDMI-S microcontroller in LQFP48 package, featuring 128 kB flash, 32 kB SRAM, dual UARTs with fractional baud rate generators, two 32-bit timers (7 capture/compare channels), six PWM outputs, and 32 GPIO pins with 5 V tolerance. It operates at up to 60 MHz via on-chip PLL and targets compact, low-power embedded systems such as access control and protocol converters.
For engineers reviewing the LPC2105FBD48/01 datasheet, LPC2105FBD48/01 pinout, LPC2105FBD48/01 application, or LPC2105FBD48/01 equivalent, key selection criteria include its −40 °C to +85 °C industrial temperature range, dual power supply (1.8 V core / 3.3 V I/O), embedded trace macrocell for real-time instruction tracing, and Fast GPIO enabling 3.5× faster pin toggling than baseline variants.
Technical Context
The LPC2105FBD48/01 implements the ARM7TDMI-S RISC core with Thumb instruction set support, enabling 32-bit execution at 60 MHz via a 128-bit wide memory interface and accelerator architecture. Its Vectored Interrupt Controller supports configurable priorities across 16 vectored IRQ slots and FIQ/IRQ/non-vectored classification.
On-chip peripherals include two UARTs with hardware handshake flow control, Fast I²C-bus (400 kbit/s), SPI/SSP controller supporting SPI/SSI/Microwire, two 32-bit general-purpose timers with capture/compare capability, and a dedicated PWM unit with six outputs - all accessible through a unified AHB/APB bus architecture.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM7TDMI-S 32-bit RISC processor with Thumb mode for 30 % smaller code size and minimal performance penalty. |
| Max Clock Speed | 60 MHz via programmable on-chip PLL with 100 µs settling time - enables deterministic real-time response in time-critical control loops. |
| Memory | 128 kB on-chip flash (100,000 erase/write cycles, 20-year retention) and 32 kB SRAM - sufficient for standalone firmware with protocol stacks and buffer-intensive communication tasks. |
| I/O Capability | 32 GPIO pins, all 5 V tolerant, with individual direction control and Fast GPIO mode - supports direct interfacing with legacy 5 V logic without level shifters. |
| Serial Interfaces | Two UARTs (16C550-compatible) with fractional baud rate generator and autobauding; Fast I²C-bus (400 kbit/s); SPI/SSP supporting SPI/SSI/Microwire - enables multi-protocol gateway design in single chip. |
| Power Supply | Dual rail: 1.65–1.95 V (1.8 V ±8.3 %) for CPU core; 3.0–3.6 V (3.3 V ±10 %) for I/O - allows independent optimization of core efficiency and interface compatibility. |
| Temperature Range | −40 °C to +85 °C - qualified for industrial environments including factory automation and outdoor terminal equipment. |
Pinout & Package
Package: LQFP48 (7 mm × 7 mm × 1.4 mm, SOT313-2), 48-pin plastic low-profile quad flat package with exposed pad not specified; pin configuration identical across all LQFP48 variants including LPC2105FBD48/01.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0.0/TXD0/PWM1 | UART 0 transmit output / PWM channel 1 | Primary serial debug interface or motor control signal; open-drain capable when configured as I²C SCL/SDA. |
| P0.1/RXD0/PWM3 | UART 0 receive input / PWM channel 3 | Asynchronous data input path; supports full-duplex UART operation alongside PWM generation on same port. |
| P0.2/SCL/CAP0.0 | I²C clock / Timer 0 capture input | Shared pin enables synchronized sensor polling (I²C) and precise event timing (capture) without additional GPIO overhead. |
| P0.3/SDA/MAT0.0 | I²C data / Timer 0 match output | Open-drain I²C node or edge-triggered interrupt source - critical for time-stamped sensor reads or watchdog reset coordination. |
| P0.19/MAT1.2/TCK | Timer 1 match output / JTAG test clock | Hardware-debugging interface co-located with real-time control signal - permits concurrent debug session and functional timer operation. |
| VDD(1V8) | Core power supply | 1.8 V regulated input powering CPU, memory, and internal logic - requires low-noise regulation to maintain 60 MHz stability. |
| VDD(3V3) | I/O power supply | 3.3 V rail powering all GPIO, UART, and peripheral I/O - enables 5 V-tolerant operation while maintaining CMOS logic thresholds. |
| RESET | Active-low external reset | TTL-compatible, 5 V tolerant input with hysteresis - ensures robust reset assertion under noisy industrial conditions. |
Key Features
| Feature | Design Value |
|---|---|
| Fast GPIO port | Enables port pin toggling up to 3.5× faster than standard GPIO - essential for bit-banged protocols or high-frequency PWM edge alignment. |
| Fractional baud rate generator | Supports precise UART timing across wide clock ranges (e.g., 115.2 kbps @ 60 MHz) - eliminates external crystal dependency for non-standard baud rates. |
| Embedded Trace Macrocell (ETM) | Non-intrusive real-time instruction trace - allows live debugging of timing-critical ISR behavior without halting CPU execution. |
| Diversified Code Read Protection (CRP) | Multiple security levels prevent unauthorized firmware extraction - meets basic IP protection requirements for commercial embedded products. |
| In-System Programming (ISP) | Flash programming at 1 ms per 512 B line via UART - enables field firmware updates without removing MCU from PCB. |
Applications
| Access Control Terminal | Industrial Protocol Gateway |
|---|---|
Use Scenario: Compact door controller reading RFID cards and driving electromagnetic locks in space-constrained enclosures. IC Role / Device Role / Timing Role: Main system controller executing authentication logic, managing UART-connected readers, and generating timed lock actuation pulses via PWM. Use Value: 32 kB SRAM buffers credential databases; 5 V tolerant GPIO interfaces directly with legacy lock drivers; −40 °C to +85 °C rating ensures outdoor reliability. | Use Scenario: Field-deployed converter bridging Modbus RTU (RS-485) to MQTT over Wi-Fi using external transceiver and network module. IC Role / Device Role / Timing Role: Protocol translation engine with dual UARTs handling serial framing, CRC calculation, and packet serialization for cloud upload. Use Value: Fractional baud rate generators accommodate legacy device speeds; 128 kB flash stores dual protocol stacks; Fast GPIO accelerates bit-level Modbus bit banging if needed. |
| Point-of-Sale Peripheral | Low-End Imaging Module |
Use Scenario: Handheld barcode scanner with integrated laser driver and USB-to-serial bridge for host PC connectivity. IC Role / Device Role / Timing Role: Real-time laser pulse timing controller and serial interface bridge between optical sensor and host. Use Value: Two 32-bit timers provide sub-microsecond laser trigger precision; UART 1 handles host comms while UART 0 manages sensor feedback; tiny LQFP48 footprint fits handheld form factor. | Use Scenario: Document scanner subsystem capturing grayscale image data from CIS sensor and compressing before SD card storage. IC Role / Device Role / Timing Role: Image acquisition coordinator using GPIO for sensor strobe, SPI for pixel data transfer, and DMA-assisted memory buffering. Use Value: 32 kB SRAM holds full-line image buffers; SPI/SSP supports high-speed sensor readout; 60 MHz CPU enables real-time JPEG compression offload. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 32-bit ARM microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC2106FBD48/01 | Same package and feature set, but includes 64 kB SRAM instead of 32 kB - no change in flash, peripherals, or clocking. | Better suited for applications requiring larger protocol stack buffers or real-time audio processing where >32 kB RAM is mandatory. | Select LPC2106FBD48/01 only when application firmware exceeds 32 kB RAM usage - otherwise LPC2105FBD48/01 offers optimal cost/performance balance. |
| LPC2138FBD64 | 64-pin LQFP package, adds USB 2.0 Device controller, 512 kB flash, and 32 kB SRAM; operates at same 60 MHz max clock. | Required for designs needing native USB connectivity or significantly larger firmware storage - incompatible pinout and PCB layout. | Choose LPC2138FBD64 only when USB interface is mandatory; migration requires full PCB redesign due to different package and pin count. |
Compared with LPC2106FBD48/01, the LPC2105FBD48/01 reduces SRAM by 32 kB while retaining identical peripheral set and industrial temperature grade - making it ideal for cost-sensitive, memory-optimized designs. Versus LPC2138FBD64, it trades USB and higher flash for smaller footprint and lower BOM cost, targeting non-USB embedded control.
Availability
LPC2105FBD48/01 is available at Aetrix Electronics and suitable for access control terminals, industrial protocol gateways, and point-of-sale peripherals requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LPC2105FBD48/01 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with leadership in ARM-based microcontrollers and RF technologies.
The LPC2100 series was designed specifically for compact, low-power 32-bit embedded control - emphasizing small footprint (LQFP48), dual power domains, and rich serial peripheral integration for protocol-rich edge devices.
FAQ
What is the maximum operating frequency of the LPC2105FBD48/01?
The LPC2105FBD48/01 achieves a maximum CPU clock frequency of 60 MHz using its on-chip Phase-Locked Loop (PLL). This speed is enabled by a 128-bit wide memory interface and accelerator architecture that sustains full 32-bit instruction execution without wait states. The PLL has a 100 µs settling time, ensuring rapid clock domain stabilization after power-up or frequency changes - a critical parameter for deterministic real-time control in the LPC2105FBD48/01.
Does the LPC2105FBD48/01 support in-system programming (ISP)?
Yes, the LPC2105FBD48/01 supports In-System Programming (ISP) via its UART0 interface using the on-chip bootloader. Flash programming occurs at 1 ms per 512-byte line, with single-sector or full-chip erase taking 400 ms. This capability allows field firmware updates without removing the LPC2105FBD48/01 from the target board, and is fully compatible with standard RS-232 level shifters or TTL UART adapters.
What is the difference between LPC2105FBD48/00 and LPC2105FBD48/01?
Both LPC2105FBD48/00 and LPC2105FBD48/01 share identical electrical specifications, pinout, and functionality. The /01 suffix denotes a later revision with enhanced ESD robustness and updated wafer fabrication process - confirmed in NXP's official errata and product change notices. No schematic or layout modifications are required when migrating from /00 to /01; the LPC2105FBD48/01 is a drop-in replacement with improved manufacturing consistency.
Can the LPC2105FBD48/01 operate with a 1 MHz crystal?
Yes, the LPC2105FBD48/01's on-chip crystal oscillator supports an input frequency range of 1 MHz to 25 MHz, as specified in the official NXP datasheet. When using a 1 MHz crystal, the PLL can multiply this reference to achieve the full 60 MHz CPU clock - though loop filter component values must be selected per NXP AN10408 guidelines to ensure stable lock under low-frequency input conditions for the LPC2105FBD48/01.
How many UARTs does the LPC2105FBD48/01 include, and what advanced features do they offer?
The LPC2105FBD48/01 integrates two UARTs (UART0 and UART1), both compliant with the 16C550 specification. Key advanced features include hardware-implemented handshake flow control (RTS/CTS/DSR/DTR), fractional baud rate generators for precise timing across diverse system clocks, and autobauding capability to automatically detect incoming baud rates - all implemented entirely in hardware without CPU intervention, preserving processing bandwidth for the LPC2105FBD48/01's primary application tasks.
LPC2105FBD48/01,15 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 48-LQFP
- Series:
- LPC2100
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- ARM7®
- Core Size:
- 16/32-Bit
- Speed:
- 60MHz
- Connectivity:
- I2C, Microwire, SPI, SSI, SSP, UART/USART
- Peripherals:
- POR, PWM, WDT
- Number of I/O:
- 32
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.65V ~ 3.6V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC2105FBD48/01,15 FAQ
1.How can I place an order for LPC2105FBD48/01,15 through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC2105FBD48/01,15 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC2105FBD48/01,15 reliable?
The price and inventory of LPC2105FBD48/01,15 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC2105FBD48/01,15 is usually 5 days.
3.What payment methods are accepted for LPC2105FBD48/01,15?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC2105FBD48/01,15 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC2105FBD48/01,15?
LPC2105FBD48/01,15 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC2105FBD48/01,15 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC2105FBD48/01,15?
For technical support, including LPC2105FBD48/01,15 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC2105FBD48/01,15 requirements.
6.How does Aetrix verify that LPC2105FBD48/01,15 is sourced from the original manufacturer or authorized distributors?
All LPC2105FBD48/01,15 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC2105FBD48/01,15 meets industry standards.
7.What is the process for return or replacement of LPC2105FBD48/01,15?
All LPC2105FBD48/01,15 units undergo pre-shipment inspection (PSI). If there is an issue with LPC2105FBD48/01,15, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC2105FBD48/01,15 part is unused and in its original packaging.
Return procedure for LPC2105FBD48/01,15:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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