NXP Semiconductors LPC2131FBD64/01,11
- Part No.:
- LPC2131FBD64/01,11
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
LPC2131FBD64/01,11.pdf
- Description:
- IC MCU 16/32BIT 32KB FLSH 64LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC2131FBD64/01 from NXP Semiconductors is a 16/32-bit ARM7TDMI-S microcontroller in LQFP64 package with 32 kB flash, 8 kB SRAM, single 10-bit 8-channel ADC, no DAC, and enhanced UARTs/ADC/Fast GPIO/BOD - deployed in access control systems, point-of-sale terminals, and industrial gateways requiring compact size and low power.
For engineers reviewing the LPC2131FBD64/01 datasheet, LPC2131FBD64/01 pinout, LPC2131FBD64/01 application, or LPC2131FBD64/01 equivalent, this page delivers verified technical context, exact pin functions, real-world use cases, and validated alternative options for embedded design and BOM optimization.
Technical Context
The LPC2131FBD64/01 implements an ARM7TDMI-S core with Thumb instruction set support, enabling 32-bit performance at up to 60 MHz via on-chip PLL (100 µs settling time) while reducing code size by >30% in critical memory-constrained applications. Its memory subsystem includes a 128-bit wide interface and accelerator architecture for full-speed execution.
It integrates dual UARTs with fractional baud rate generators and hardware handshake flow control, dedicated ADC result registers to minimize interrupt latency, and Fast GPIO ports delivering up to 3.5× faster pin toggling than baseline LPC213x - all within a single-chip solution supporting ISP/IAP and real-time debug via EmbeddedICE RT and trace interfaces.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM7TDMI-S 16/32-bit RISC processor with Thumb mode support for code density optimization. |
| Max Clock Speed | 60 MHz via programmable on-chip PLL with 100 µs settling time - enables deterministic real-time response. |
| Flash Memory | 32 kB on-chip flash with 100,000 erase/write cycles and 20-year data retention - supports ISP/IAP firmware updates. |
| SRAM | 8 kB on-chip static RAM accessible as 8/16/32-bit - used for stack, variables, and real-time buffers. |
| ADC | Single 10-bit 8-channel SAR ADC with conversion time as low as 2.44 µs/channel - provides high-speed analog sensing. |
| DAC | Not integrated - LPC2131FBD64/01 lacks DAC functionality (confirmed across ordering table and block diagram). |
| I/O Pins | 47 GPIO pins (5 V tolerant), including nine external interrupt-capable inputs - supports flexible peripheral interfacing. |
| Package | LQFP64 (SOT314-2), 10 × 10 × 1.4 mm - surface-mount compatible with standard PCB assembly processes. |
Pinout & Package
LQFP64 package (SOT314-2), 10 × 10 × 1.4 mm body, 64 leads, lead pitch 0.5 mm. Pin 1 marked by corner notch or dot; thermal pad not present. Compatible with JEDEC MS-026 standards.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0.0/TXD0/PWM1 | UART0 transmit / PWM output | Primary serial output for debugging or host communication; configurable as PWM1 for motor/servo control. |
| P0.1/RXD0/PWM3/EINT0 | UART0 receive / PWM / interrupt input | Serial data input; also serves as external wake-up source (EINT0) and PWM3 channel. |
| P0.27/AD0.0/CAP0.1/MAT0.1 | ADC0 channel 0 / timer capture / match | Analog input for sensor signal acquisition; simultaneously usable as timer 0 capture or match output. |
| P0.30/AD0.3/EINT3/CAP0.0 | ADC0 channel 3 / external interrupt / timer capture | Shared analog input and interrupt trigger - enables synchronized event-driven sampling. |
| VDD / VSS / VDDA / VSSA / VREF | Power and reference supply | Dual-domain power (digital/analog) with isolated analog ground and reference - ensures <1 LSB ADC error. |
| XTAL1 / XTAL2 | Crystal oscillator interface | Supports 1–30 MHz crystals - sets system clock base; internal oscillator eliminates need for external clock source. |
| RESET | Active-low reset input | TTL-compatible with hysteresis and 5 V tolerance - ensures robust reset under noisy industrial conditions. |
| P1.27/TDO / P1.28/TDI / P1.29/TCK / P1.30/TMS / P1.31/TRST | JTAG debug interface | Fully compliant IEEE 1149.1 boundary-scan interface - enables real-time emulation and flash programming. |
Key Features
| Feature | Design Value |
|---|---|
| Fast GPIO ports | Up to 3.5× faster pin toggling vs. original LPC213x - reduces software overhead in bit-banged protocols. |
| Dedicated ADC result registers | Eliminates read-modify-write cycles during interrupt service - cuts CPU load and improves sampling throughput. |
| UART0/1 with fractional baud rate generator | Enables precise baud rates (e.g., 115200, 921600) across wide crystal tolerances - critical for modem and protocol converter designs. |
| Enhanced Brown-Out Detection (BOD) | Configurable BOD threshold and response mode - extends battery life in portable access control devices. |
| EmbeddedICE RT + trace interface | Real-time instruction trace and breakpoint control - accelerates firmware validation without halting execution. |
| On-chip ISP/IAP bootloader | Single-sector erase in 400 ms; 256 B programming in 1 ms - enables field firmware upgrades over UART or USB-to-UART bridge. |
Applications
| Access Control Systems | Point-of-Sale Terminals |
|---|---|
|
Use Scenario: Secure door entry using RFID card readers, biometric sensors, and relay drivers. IC Role / Device Role / Timing Role: Central controller managing authentication logic, I/O expansion, and real-time event logging. Use Value: 47 GPIO pins support multiple reader interfaces; 10-bit ADC reads analog tamper sensors; low-power modes extend battery backup duration. |
Use Scenario: Compact retail terminal integrating barcode scanner, display driver, and secure payment interface. IC Role / Device Role / Timing Role: Main MCU handling USB/UART host bridging, button scanning, and LED status feedback. Use Value: Dual UARTs enable simultaneous connection to scanner and payment module; Fast GPIO ensures responsive UI polling. |
| Industrial Communication Gateways | Low-Power Sensor Aggregators |
|
Use Scenario: Protocol translation between Modbus RTU (RS-485) and Ethernet/Wi-Fi networks in factory automation. IC Role / Device Role / Timing Role: Bridge controller executing protocol stacks and buffering packetized data in SRAM. Use Value: 8 kB SRAM accommodates dual protocol buffers; SPI/SSP interfaces drive external transceivers; 60 MHz CPU handles real-time packet parsing. |
Use Scenario: Battery-powered environmental monitor collecting temperature, humidity, and motion data for wireless upload. IC Role / Device Role / Timing Role: Low-power data acquisition node with sleep/wake scheduling and analog front-end conditioning. Use Value: Power-down mode with BOD wake-up reduces average current to µA range; ADC channels sample multiple sensors sequentially. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC2132FBD64/01 | 64 kB flash, 16 kB SRAM, adds 10-bit DAC output (AOUT), same ADC count and enhanced peripherals. | Required where analog output (e.g., sensor calibration voltage, audio tone generation) is needed alongside ADC sensing. | Select when DAC functionality is mandatory and additional flash/SRAM headroom justifies cost premium. |
| LPC2134FBD64/01 | 128 kB flash, 16 kB SRAM, adds second 10-bit 8-channel ADC (AD1), retains DAC and enhanced UARTs. | Suitable for multi-sensor systems requiring independent analog acquisition paths (e.g., differential thermocouple + pressure sensing). | Choose when dual ADC banks and larger code space are required for complex protocol stacks or GUI logic. |
Compared with LPC2132FBD64/01 and LPC2134FBD64/01, the LPC2131FBD64/01 offers minimal memory footprint and lowest BOM cost for applications needing only one ADC and no DAC - ideal for cost-sensitive, single-function embedded controllers.
Availability
LPC2131FBD64/01 is available at Aetrix Electronics and suitable for access control systems, point-of-sale terminals, and industrial gateways requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.
Supply support for LPC2131FBD64/01 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications.
The LPC213x family was designed for cost-sensitive, space-constrained embedded systems demanding ARM performance, rich peripheral integration, and low-power operation - targeting industrial control, medical instrumentation, and consumer electronics.
FAQ
What is the maximum operating frequency of the LPC2131FBD64/01?
The LPC2131FBD64/01 achieves a maximum CPU clock frequency of 60 MHz using its on-chip PLL, which has a 100 µs settling time. This frequency is sustained via a 128-bit wide memory interface and accelerator architecture, enabling full-speed 32-bit code execution without wait states in flash-based applications.
Does the LPC2131FBD64/01 include a DAC?
No, the LPC2131FBD64/01 does not integrate a DAC. Per Table 2 (Ordering Options) and functional description, DAC (AOUT) is only available on LPC2132/34/36/38 variants. The LPC2131FBD64/01 features 32 kB flash, 8 kB SRAM, and a single 10-bit 8-channel ADC - but no digital-to-analog conversion capability.
Which package type is used for the LPC2131FBD64/01?
The LPC2131FBD64/01 uses the LQFP64 package (SOT314-2): plastic low-profile quad flat package with 64 leads, 10 × 10 × 1.4 mm body, and 0.5 mm lead pitch. This package is pin-compatible with other LPC213x/01 variants in the same footprint, enabling scalable design reuse.
How many external interrupt pins does the LPC2131FBD64/01 support?
The LPC2131FBD64/01 supports up to nine edge- or level-sensitive external interrupt pins (EINT0–EINT3 plus five additional GPIO-configurable interrupts). These are distributed across Port 0 and Port 1, with EINT0–EINT3 mapped to P0.1, P0.3, P0.7, and P0.30 respectively - enabling responsive event-driven firmware architectures.
Is the LPC2131FBD64/01 supported for In-System Programming (ISP)?
Yes, the LPC2131FBD64/01 supports In-System Programming via its on-chip bootloader, accessible through UART0 or UART1. ISP allows flash erasure (sector or full chip in 400 ms) and programming (256 B in 1 ms) without removing the device from the target board - essential for field firmware updates and manufacturing flexibility.
LPC2131FBD64/01,11 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 64-LQFP
- Series:
- LPC2100
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Programmable:
- Not Verified
- Core Processor:
- ARM7®
- Core Size:
- 16/32-Bit
- Speed:
- 60MHz
- Connectivity:
- I2C, Microwire, SPI, SSI, SSP, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, PWM, WDT
- Number of I/O:
- 47
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 8K x 8
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 3.6V
- Data Converters:
- A/D 8x10b SAR; D/A 1x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC2131FBD64/01,11 FAQ
1.How can I place an order for LPC2131FBD64/01,11 through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC2131FBD64/01,11 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC2131FBD64/01,11 reliable?
The price and inventory of LPC2131FBD64/01,11 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC2131FBD64/01,11 is usually 5 days.
3.What payment methods are accepted for LPC2131FBD64/01,11?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC2131FBD64/01,11 transactions.
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4.How is shipping managed for LPC2131FBD64/01,11?
LPC2131FBD64/01,11 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC2131FBD64/01,11 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC2131FBD64/01,11?
For technical support, including LPC2131FBD64/01,11 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC2131FBD64/01,11 requirements.
6.How does Aetrix verify that LPC2131FBD64/01,11 is sourced from the original manufacturer or authorized distributors?
All LPC2131FBD64/01,11 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC2131FBD64/01,11 meets industry standards.
7.What is the process for return or replacement of LPC2131FBD64/01,11?
All LPC2131FBD64/01,11 units undergo pre-shipment inspection (PSI). If there is an issue with LPC2131FBD64/01,11, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC2131FBD64/01,11 part is unused and in its original packaging.
Return procedure for LPC2131FBD64/01,11:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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