NXP Semiconductors LPC2366FBD100K
- Part No.:
- LPC2366FBD100K
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
LPC2366FBD100K.pdf
- Description:
- IC MCU 16/32B 256KB FLSH 100LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:261
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Product details
Overview
LPC2366FBD100 from NXP Semiconductors is a 32-bit ARM7TDMI-S microcontroller with 256 kB flash, 32 kB local SRAM, dual CAN channels, USB 2.0 full-speed device interface (4 kB endpoint RAM), Ethernet MAC with RMII, and 10-bit ADC/DAC - deployed in industrial protocol gateways requiring deterministic serial bridging and real-time I/O control.
For engineers reviewing the LPC2366FBD100 datasheet, LPC2366FBD100 pinout, LPC2366FBD100 application, or LPC2366FBD100 equivalent, key selection criteria include dual-CAN + USB + Ethernet coexistence, 70 GPIO with edge/level interrupt support, RMII Ethernet timing compliance, and 72 MHz CPU clock with dual-AHB bus arbitration for concurrent DMA transfers.
Technical Context
The LPC2366FBD100 implements an ARM7TDMI-S core with Thumb/ARM instruction set support, running at up to 72 MHz via on-chip PLL fed by 1–24 MHz crystal or 4 MHz internal RC oscillator. Its dual Advanced High-performance Bus (AHB) architecture separates Ethernet DMA, USB DMA, and flash execution paths to eliminate bus contention.
Peripheral integration includes four UARTs with fractional baud rate generation, two independent CAN 2.0B controllers, one I2S interface with GPDMA support, three I²C-bus interfaces (one open-drain), two SSP controllers, and a 10-bit ADC with six input channels plus 10-bit DAC output - all accessible via configurable pin-muxing through the Pin Connect Block.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM7TDMI-S, 32-bit RISC, supports both ARM and Thumb instruction sets for code density/performance trade-off. |
| Max Clock Speed | 72 MHz - achieved via on-chip PLL; enables real-time interrupt response and DSP algorithm execution. |
| Flash Memory | 256 kB - on-chip, ISP/IAP-capable, mapped to ARM local bus for zero-wait-state CPU access. |
| SRAM | 32 kB local SRAM on ARM bus + 16 kB Ethernet SRAM + 8 kB USB/GP DMA SRAM + 2 kB RTC battery-backed SRAM. |
| Serial Interfaces | Dual CAN 2.0B, USB 2.0 full-speed device (4 kB FIFO), 10/100 Ethernet MAC (RMII), four UARTs, three I²C, two SSP, one I2S. |
| Analog Peripherals | 10-bit ADC with 6-channel multiplexer; 10-bit DAC output; supports simultaneous sampling and waveform generation. |
| GPIO & Interrupts | 70 fast GPIO pins; up to 12 external interrupt sources configurable as edge- or level-sensitive; all Port 0/2 pins support edge-triggered interrupts. |
Pinout & Package
LPC2366FBD100 uses LQFP100 package (SOT407-1), 14 mm × 14 mm × 1.4 mm body, with 100 leads and exposed thermal pad. Pin functions are fully configurable via Pin Connect Block register mapping.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0[29]/USB_D+ | USB differential data line | Bi-directional D+ signal for USB 2.0 full-speed device operation; requires 1.5 kΩ pull-up resistor for enumeration. |
| P0[30]/USB_D− | USB differential data line | Bi-directional D− signal; paired with P0[29] for noise-immune USB signaling compliant with USB specification. |
| P1[0]/ENET_TXD0 | Ethernet transmit data bit 0 | Part of RMII 2-bit parallel TX bus; must meet setup/hold timing relative to ENET_TX_EN and REF_CLK. |
| P1[4]/ENET_TX_EN | Ethernet transmit enable | Active-high strobe enabling transmission on ENET_TXD0/1; synchronized to ENET_REF_CLK for RMII compliance. |
| P1[9]/ENET_RXD0 | Ethernet receive data bit 0 | Part of RMII 2-bit RX bus; sampled on rising edge of ENET_REF_CLK for synchronous Ethernet frame capture. |
| P1[16]/ENET_MDC | MIIM management clock | Open-drain clock for MDIO interface; used to configure external PHY registers at ≤2.5 MHz. |
| P1[17]/ENET_MDIO | MIIM management data | Bi-directional MDIO line shared between host and PHY; requires external pull-up resistor. |
| P0[23]/AD0[0] | ADC input channel 0 | Analog input for 10-bit successive-approximation ADC; supports programmable sample rate and burst mode. |
| P0[26]/AOUT | DAC analog output | Voltage output pin for 10-bit DAC; rail-to-rail swing referenced to VDDA/VSSA; no external buffer required for low-Z loads. |
| P2[0]/PWM1[1] | PWM output channel 1 | Configurable duty-cycle/toggle-rate output from PWM1 block; supports three-phase motor control and digital waveform synthesis. |
Key Features
| Feature | Design Value |
|---|---|
| Dual AHB bus architecture | Enables concurrent Ethernet DMA, USB DMA, and flash execution without bus arbitration stalls - critical for real-time gateway throughput. |
| Configurable pin muxing | Single physical pin supports multiple peripheral functions (e.g., P0[15] = TXD1/SCK0/SCK); reduces PCB layer count and simplifies layout reuse. |
| Two CAN 2.0B controllers | Independent CAN nodes with full message RAM and acceptance filtering - supports J1939, CANopen, and custom multi-bus diagnostics. |
| RTC with 2 kB battery-backed SRAM | Retains time/date and critical state data during main power loss; powered by VBAT pin for >10-year backup with coin cell. |
| Advanced Vectored Interrupt Controller | Supports 32 prioritized vectored interrupts with sub-second latency; enables deterministic response to CAN, USB, and Ethernet events. |
Applications
| Industrial Protocol Gateway | Medical Data Aggregator |
|---|---|
Use Scenario: Bridges Modbus RTU over RS-485 to EtherNet/IP or CANopen networks in PLC backplanes. IC Role / Device Role / Timing Role: Central protocol translation engine with deterministic UART/CAN/Ethernet scheduling and timestamped packet forwarding. Use Value: Eliminates need for external FPGA or dual-processor architecture; 72 MHz ARM7 handles parsing, checksumming, and header rewriting in-line. | Use Scenario: Collects ECG, SpO₂, and temperature sensor data from bedside monitors and forwards via USB or Ethernet to central nursing station. IC Role / Device Role / Timing Role: Real-time sensor hub with synchronized 10-bit ADC sampling, buffered USB bulk transfer, and watchdog-monitored Ethernet failover. Use Value: Single-chip integration reduces BOM cost and improves IEC 60601-1 safety certification path versus discrete MCU + PHY + transceiver solutions. |
| Automated Test Equipment Interface | Building Automation Controller |
Use Scenario: Controls relay banks, reads thermocouple inputs, and logs test sequences via SD/MMC (LPC2367/68 only) - but LPC2366FBD100 supports identical firmware base with USB/Ethernet logging fallback. IC Role / Device Role / Timing Role: Deterministic I/O scheduler managing 70 GPIO, 10-bit ADC conversions, and dual-CAN diagnostics while maintaining USB CDC ACM virtual COM port. Use Value: 256 kB flash accommodates field-upgradable test scripts; dual CAN allows simultaneous communication with DUT and calibration equipment. | Use Scenario: HVAC controller interfacing with BACnet MS/TP (RS-485), KNX TP1, and LonWorks transceivers via UARTs and CAN, while reporting status via Ethernet. IC Role / Device Role / Timing Role: Multi-protocol convergence node with hardware-accelerated CRC, timer-based polling intervals, and RTC-scheduled maintenance alerts. Use Value: Reduces external component count by integrating dual CAN, four UARTs, and Ethernet MAC - lowering bill-of-materials and board area by >35% vs. discrete solution. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC2368FBD100 | 512 kB flash, adds SD/MMC interface; same pinout, same peripherals including dual CAN and USB. | Required when firmware size exceeds 256 kB or SD card logging is mandatory. | Select LPC2368FBD100 if future firmware growth or removable storage is needed - drop-in compatible with no PCB change. |
| LPC1769FBD100 | Cortex-M3 core, 512 kB flash, 64 kB RAM, Ethernet MAC + USB OTG, but no built-in CAN controllers (requires external transceivers). | Suitable for higher-performance applications needing floating-point math or USB host capability, but lacks native dual CAN. | Choose LPC1769FBD100 only when migrating to Cortex-M ecosystem and CAN can be added externally - not pin-compatible. |
Compared with LPC2368FBD100, LPC2366FBD100 trades flash capacity and SD/MMC for lower cost and identical dual-CAN/USB/Ethernet functionality; versus LPC1769FBD100, it retains native CAN support and ARM7 deterministic latency at lower clock speed and memory footprint.
Availability
LPC2366FBD100 is available at Aetrix Electronics and suitable for industrial protocol gateways, medical data aggregators, and building automation controllers requiring stable component supply across extended product lifecycles.
Supply support for LPC2366FBD100 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The LPC2300 series, including LPC2366FBD100, was designed specifically for embedded networking applications demanding integrated Ethernet, USB, CAN, and real-time analog I/O in a single-chip ARM7 solution.
FAQ
What is the maximum operating frequency of the LPC2366FBD100?
The LPC2366FBD100 operates at a maximum CPU clock frequency of 72 MHz, achieved using its on-chip PLL locked to an external 1–24 MHz crystal or the internal 4 MHz RC oscillator. This frequency is sustained across the full industrial temperature range (−40 °C to +85 °C) with proper decoupling and thermal design. The LPC2366FBD100 maintains timing compliance for all integrated peripherals - including Ethernet RMII, USB, and CAN - at this clock rate.
Does the LPC2366FBD100 support both CAN 2.0A and CAN 2.0B protocols?
Yes, the LPC2366FBD100 integrates two fully independent CAN 2.0B controllers compliant with ISO 11898-1, supporting both standard (11-bit) and extended (29-bit) identifier formats, programmable bit timing, and hardware acceptance filtering. Each controller has dedicated message RAM and supports self-test, loopback, and silent modes - essential for automotive diagnostics and industrial fieldbus interoperability. The LPC2366FBD100 does not require external CAN transceivers for logic-level interface.
Can the LPC2366FBD100 run USB and CAN simultaneously without performance degradation?
Yes, the LPC2366FBD100 supports concurrent USB 2.0 full-speed device and dual CAN operation due to its dual AHB bus architecture: USB DMA and CAN controllers operate on separate AHB subsystems, eliminating bus contention. The 72 MHz CPU clock and Advanced Vectored Interrupt Controller ensure deterministic servicing of USB SOF, CAN message, and Ethernet RX/TX interrupts - validated in NXP reference designs for protocol gateways where all three interfaces remain active under full load.
What are the power supply requirements for the LPC2366FBD100?
The LPC2366FBD100 requires a single 3.3 V supply (3.0 V to 3.6 V) for VDD(3V3), plus separate analog supplies: VDDA and VSSA for ADC/DAC reference, and VBAT for RTC backup. It features four low-power modes - idle, sleep, power-down, and deep power-down - with wake-up via CAN, USB activity, Ethernet, or RTC alarm. Brownout detection provides interrupt and reset thresholds, and on-chip power-on reset ensures reliable boot across voltage ramps. The LPC2366FBD100 draws ~120 mA typical at 72 MHz with all peripherals active.
Is the LPC2366FBD100 pin-compatible with other members of the LPC236x family?
Yes, the LPC2366FBD100 in LQFP100 package (SOT407-1) is pin-compatible with LPC2364FBD100, LPC2365FBD100, LPC2367FBD100, and LPC2368FBD100 - all share identical pin allocation, electrical characteristics, and mechanical footprint. Firmware developed for LPC2366FBD100 runs unmodified on LPC2368FBD100, though the latter adds SD/MMC interface and 512 kB flash. This compatibility enables scalable design reuse across performance tiers without PCB redesign.
LPC2366FBD100K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 100-LQFP
- Series:
- LPC2300
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM7®
- Core Size:
- 16/32-Bit
- Speed:
- 72MHz
- Connectivity:
- CANbus, Ethernet, I2C, Microwire, SPI, SSI, SSP, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, PWM, WDT
- Number of I/O:
- 70
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 58K x 8
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 3.6V
- Data Converters:
- A/D 6x10b SAR; D/A 1x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC2366FBD100K FAQ
1.How can I place an order for LPC2366FBD100K through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC2366FBD100K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC2366FBD100K reliable?
The price and inventory of LPC2366FBD100K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC2366FBD100K is usually 5 days.
3.What payment methods are accepted for LPC2366FBD100K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC2366FBD100K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC2366FBD100K?
LPC2366FBD100K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC2366FBD100K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC2366FBD100K?
For technical support, including LPC2366FBD100K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC2366FBD100K requirements.
6.How does Aetrix verify that LPC2366FBD100K is sourced from the original manufacturer or authorized distributors?
All LPC2366FBD100K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC2366FBD100K meets industry standards.
7.What is the process for return or replacement of LPC2366FBD100K?
All LPC2366FBD100K units undergo pre-shipment inspection (PSI). If there is an issue with LPC2366FBD100K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC2366FBD100K part is unused and in its original packaging.
Return procedure for LPC2366FBD100K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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