NXP Semiconductors LPC4370FET100K
- Part No.:
- LPC4370FET100K
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 100-TFBGA
- Datasheet:
-
LPC4370FET100K.pdf
- Description:
- IC MCU 32BIT ROMLESS 100TFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:992
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Product details
Overview
LPC4370FET100K from NXP Semiconductors is a dual-core ARM Cortex-M4/M0 microcontroller for industrial and embedded control applications, operating at up to 204 MHz CPU frequency, integrating 282 kB SRAM, Ethernet MAC with IEEE 1588 support, two high-speed USB interfaces (one OTG-capable), and an 80 MSps 12-bit high-speed ADC. It targets real-time motor control, power management, and connected industrial devices.
For engineers reviewing the LPC4370FET100K datasheet, LPC4370FET100K pinout, LPC4370FET100K application, or LPC4370FET100K equivalent, key selection considerations include its TFBGA100 package (100-ball, 9 × 9 mm), absence of LCD and 10-bit ADCs (vs. LBGA256 variant), 49 GPIO pins, and dedicated C_CAN, SCTimer/PWM, and GPDMA support - all critical for deterministic I/O and communication in resource-constrained designs.
Technical Context
The LPC4370FET100K implements a heterogeneous dual-core architecture: a primary ARM Cortex-M4 core with hardware FPU and MPU, plus two independent ARM Cortex-M0 subsystems - one as a coprocessor offloading peripheral management, and another dedicated to SPI/SGPIO control via a separate AHB matrix. Core-to-core communication occurs over a dedicated bridge with shared memory access.
Its clock system includes three PLLs: one for CPU operation up to 204 MHz, one dedicated to USB high-speed PHY timing, and a third configurable for audio applications. The device supports IEEE 1588-2008 v2 timestamping in its Ethernet MAC and uses a Global Input Multiplexer Array (GIMA) to route events between timers, ADC, and SCTimer/PWM without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Architecture | Dual-core: ARM Cortex-M4 @ 204 MHz + two ARM Cortex-M0 cores @ 204 MHz - enables real-time task partitioning with M4 handling complex computation and M0s managing time-critical peripherals. |
| SRAM | 282 kB total (264 kB main AHB + 18 kB M0 subsystem) - sufficient for RTOS, protocol stacks, and buffer-intensive Ethernet/USB applications without external RAM. |
| ADC | One 12-bit high-speed ADC (ADCHS) @ 80 MSps - supports fast closed-loop control sampling in motor drives and power converters. |
| USB Interfaces | USB0: HS Host/Device/OTG with on-chip HS PHY; USB1: HS Host/Device with ULPI interface - enables dual-role connectivity and external PHY flexibility while minimizing BOM cost. |
| Ethernet | 10/100T MAC with RMII/MII, DMA, and IEEE 1588-2008 v2 timestamping - delivers deterministic network synchronization for industrial automation and time-sensitive networking (TSN) edge nodes. |
| Package | TFBGA100 (9 × 9 × 0.7 mm, SOT926-1) - compact footprint suitable for space-constrained industrial gateways and smart sensors. |
| GPIO | 49 configurable digital I/O pins with programmable pull-up/down, open-drain, and edge/level interrupt capability - provides direct interfacing to sensors, actuators, and legacy industrial buses. |
Pinout & Package
Package: TFBGA100 (Plastic thin fine-pitch ball grid array; 100 balls; body 9 × 9 × 0.7 mm; SOT926-1).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0_0 | GPIO0[0] / SSP1_MISO / ENET_RXD1 | Primary GPIO with fallback to Ethernet receive data or SPI slave input - enables flexible board routing and protocol redundancy. |
| P1_15 | GPIO0[2] / ENET_RXD0 / U2_TXD | Shared Ethernet RX and USART2 TX pin - allows concurrent use only in non-overlapping modes; requires careful signal scheduling in RMII mode. |
| P1_16 | GPIO0[3] / ENET_CRS / ENET_RX_DV | Carrier Sense and Receive Data Valid multiplexing - essential for MII interface compliance and collision detection in legacy Ethernet systems. |
| P1_18 | GPIO0[13] / ENET_TXD0 / CAN1_TD | Transmit data line shared with CAN1 transmitter - supports dual-network coexistence but mandates isolation when both interfaces operate simultaneously. |
| P2_3 | SGPIO12 / I2C1_SDA / U3_TXD | Configurable serial interface pin supporting I2C data, USART3 transmit, or general-purpose SGPIO - simplifies peripheral expansion with software-defined pin roles. |
Key Features
| Feature | Design Value |
|---|---|
| State Configurable Timer (SCTimer/PWM) | Hardware-state-machine-based timer enabling complex PWM waveforms (e.g., dead-time insertion, phase-shifted outputs) without CPU overhead - critical for multi-phase motor control. |
| Global Input Multiplexer Array (GIMA) | Dynamic event routing between ADC triggers, timer captures, and SCTimer inputs - eliminates software polling and reduces interrupt latency in sensor-fusion applications. |
| ARM Cortex-M4 with FPU & MPU | Floating-point unit accelerates DSP algorithms (e.g., FFT, PID tuning); Memory Protection Unit enforces secure partitioning between firmware modules and RTOS tasks. |
| Dual Cortex-M0 subsystems | One coprocessor handles background peripheral management (e.g., SPI polling), freeing the M4 for real-time control; second M0 manages SGPIO for scalable I/O expansion. |
| IEEE 1588-2008 v2 support | Hardware timestamping engine in Ethernet MAC enables sub-microsecond synchronization accuracy - meets requirements for industrial PLCs and distributed motion control networks. |
Applications
| Industrial Motor Control | Smart Energy Gateway |
|---|---|
Use Scenario: Closed-loop control of 3-phase BLDC motors in HVAC compressors and industrial pumps using field-oriented control (FOC). IC Role / Device Role / Timing Role: LPC4370FET100K serves as the real-time controller executing FOC algorithms on the Cortex-M4 core while offloading commutation timing and current sensing trigger generation to the SCTimer/PWM and ADCHS. Use Value: 80 MSps ADC sampling synchronizes with PWM edges to capture precise current waveforms; dual M0 cores manage encoder feedback and CAN bus diagnostics concurrently. | Use Scenario: Aggregation and secure communication of metering data from multiple e-metering endpoints via Ethernet and USB host-connected modems. IC Role / Device Role / Timing Role: LPC4370FET100K acts as the gateway's application processor, running Linux-compatible middleware on Cortex-M4 and delegating USB modem enumeration and packet forwarding to a dedicated Cortex-M0 subsystem. Use Value: IEEE 1588 timestamping ensures synchronized data logging across distributed meters; 282 kB SRAM buffers encrypted payloads before TLS transmission. |
| RFID Reader Controller | Programmable Logic Controller (PLC) I/O Module |
Use Scenario: High-speed UHF RFID tag interrogation in warehouse logistics systems requiring simultaneous multi-antenna switching and anti-collision protocols. IC Role / Device Role / Timing Role: LPC4370FET100K functions as the baseband processor, generating precise RF modulation waveforms via SCTimer/PWM and decoding backscatter signals using the 12-bit ADCHS at 80 MSps. Use Value: GIMA routes ADC samples directly to DMA buffers while triggering timer-based antenna switching - achieving <10 µs response latency between tag detection and actuator command. | Use Scenario: Modular I/O expansion for DIN-rail mounted PLCs, accepting analog inputs (4–20 mA), digital I/O, and fieldbus interfaces (CAN, RS-485). IC Role / Device Role / Timing Role: LPC4370FET100K operates as the intelligent I/O processor, managing isolated analog front-ends via ADC triggers and driving isolated digital outputs using GPIO-controlled optocouplers. Use Value: 49 GPIO pins support mixed-signal I/O configuration; C_CAN controllers enable native integration into existing CANopen networks without external protocol translators. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC4357FET100 | Same TFBGA100 package and dual-core M4/M0 architecture, but reduced SRAM (264 kB vs. 282 kB) and no 12-bit ADCHS - lacks 80 MSps sampling capability. | Suitable for cost-sensitive motor control where 10-bit ADC suffices and high-speed current sensing is not required. | Select LPC4357FET100 only if ADCHS and extra 18 kB SRAM are unnecessary; verify SCTimer/PWM feature parity in target firmware. |
| LPC4337FET100 | Lower CPU max frequency (204 MHz same), but only one Cortex-M0 core and no Ethernet MAC - missing IEEE 1588 and RMII/MII interfaces. | Applicable in USB-centric embedded audio or isolated sensor hubs without network connectivity requirements. | Choose LPC4337FET100 when Ethernet and dual-M0 offload are not needed; confirm USB1 ULPI interface availability matches design needs. |
Compared with LPC4357FET100 and LPC4337FET100, the LPC4370FET100K uniquely delivers full Ethernet + IEEE 1588, 80 MSps ADCHS, and dual-Cortex-M0 subsystems in the TFBGA100 footprint - making it the only option among these three for time-synchronized industrial gateways requiring high-speed analog acquisition and deterministic networking.
Availability
LPC4370FET100K is available at Aetrix Electronics and suitable for industrial motor control, smart energy gateways, RFID reader systems, and programmable logic controller I/O modules requiring stable component supply and long-term production continuity.
Supply support for LPC4370FET100K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in ARM-based microcontrollers and edge processing.
The LPC4370FET100K belongs to NXP's LPC4300 series - a family designed for high-performance embedded control requiring heterogeneous processing, deterministic I/O, and integrated networking, targeting industrial automation and smart infrastructure.
FAQ
What is the maximum operating frequency of the LPC4370FET100K?
The LPC4370FET100K operates at a maximum CPU frequency of 204 MHz on both its ARM Cortex-M4 and dual ARM Cortex-M0 cores. This frequency is achieved using the internal PLLs fed by the 12 MHz IRC oscillator or an external crystal (1–25 MHz). The device maintains this performance across its specified industrial temperature range (-40°C to +105°C) with appropriate voltage regulation (2.2 V to 3.6 V).
Does the LPC4370FET100K include an Ethernet MAC with IEEE 1588 support?
Yes, the LPC4370FET100K integrates a 10/100T Ethernet MAC with full RMII and MII interface support, DMA acceleration, and hardware-based IEEE 1588-2008 v2 timestamping. This enables precise time synchronization for industrial automation applications - a feature confirmed in the official NXP datasheet Rev. 2.4 and retained in the TFBGA100 package variant.
How many ADC channels does the LPC4370FET100K support, and what are their specifications?
The LPC4370FET100K includes one 12-bit high-speed ADC (ADCHS) with 6 channels and a maximum sampling rate of 80 MSps. It does not include the 10-bit ADC0/ADC1 blocks (16 channels total), which are exclusive to the LBGA256 package. All ADCHS channels support DMA and hardware trigger inputs routed via GIMA for deterministic sampling.
What is the GPIO count and key I/O capabilities of the LPC4370FET100K?
The LPC4370FET100K provides 49 general-purpose I/O pins in its TFBGA100 package. These support configurable pull-up/pull-down resistors, open-drain mode, edge- and level-sensitive interrupts, and group-interrupt pattern matching. GPIO registers reside on the AHB bus for low-latency access, and all GPIO ports support DMA transfers for efficient data movement.
Is the LPC4370FET100K pin-compatible with other LPC43xx TFBGA100 variants like LPC4357FET100?
Yes, the LPC4370FET100K is pin-compatible with other LPC43xx devices in the TFBGA100 package (e.g., LPC4357FET100, LPC4337FET100), sharing identical ball mapping, power, ground, and reset pin locations. However, functional differences exist - such as Ethernet, ADCHS, and C_CAN availability - so PCB layout reuse requires verification of signal routing against the specific variant's peripheral enablement table.
LPC4370FET100K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 100-TFBGA
- Series:
- LPC43xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4/M0/M0
- Core Size:
- 32-Bit Tri-Core
- Speed:
- 204MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, IrDA, SD, SPI, SSC, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, PWM, WDT
- Number of I/O:
- 49
- Program Memory Size:
- -
- Program Memory Type:
- ROMless
- EEPROM Size:
- -
- RAM Size:
- 282K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.2V ~ 3.6V
- Data Converters:
- A/D 3x12b SAR; D/A 1x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC4370FET100K FAQ
1.How can I place an order for LPC4370FET100K through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC4370FET100K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC4370FET100K reliable?
The price and inventory of LPC4370FET100K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC4370FET100K is usually 5 days.
3.What payment methods are accepted for LPC4370FET100K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC4370FET100K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC4370FET100K?
LPC4370FET100K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC4370FET100K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC4370FET100K?
For technical support, including LPC4370FET100K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC4370FET100K requirements.
6.How does Aetrix verify that LPC4370FET100K is sourced from the original manufacturer or authorized distributors?
All LPC4370FET100K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC4370FET100K meets industry standards.
7.What is the process for return or replacement of LPC4370FET100K?
All LPC4370FET100K units undergo pre-shipment inspection (PSI). If there is an issue with LPC4370FET100K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC4370FET100K part is unused and in its original packaging.
Return procedure for LPC4370FET100K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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