NXP Semiconductors LPC43S70FET100E
- Part No.:
- LPC43S70FET100E
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 100-TFBGA
- Datasheet:
-
LPC43S70FET100E.pdf
- Description:
- IC MCU 32BIT ROMLESS 100TFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC43S70FET100E from NXP Semiconductors is a dual-core ARM Cortex-M4/M0 microcontroller for industrial and embedded control applications, featuring 282 kB SRAM, dual high-speed USB 2.0 interfaces (one with on-chip HS PHY, one with ULPI), 10/100T Ethernet MAC with IEEE 1588 support, and an 80 MS/s 12-bit high-speed ADC. It operates at up to 204 MHz and integrates AES encryption, SCTimer/PWM, and SGPIO for real-time peripheral offload.
For engineers reviewing the LPC43S70FET100E datasheet, LPC43S70FET100E pinout, LPC43S70FET100E application, or LPC43S70FET100E equivalent, key selection considerations include its TFBGA100 package (49 GPIOs), absence of LCD and second USB PHY, presence of EMC and 3-channel 12-bit ADC, and dual-core deterministic partitioning between M4 and M0 subsystems.
Technical Context
The LPC43S70FET100E implements a heterogeneous dual-core architecture: the main ARM Cortex-M4F core handles compute-intensive tasks with hardware FPU and MPU, while a dedicated ARM Cortex-M0 coprocessor manages SPI/SGPIO peripherals via an isolated AHB matrix with 2 kB + 16 kB local SRAM. A second Cortex-M0 subsystem is absent in this variant per Table 2.
Its clock system uses three PLLs - one for CPU (up to 204 MHz), one dedicated to USB0, and one configurable for audio - fed by a 1–25 MHz crystal or 12 MHz ±1% IRC oscillator. Power management includes four low-power modes, RTC domain with battery backup, and brownout detection with four thresholds.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M4F @ 204 MHz with hardware FPU, MPU, and NVIC; supports DSP/SIMD instructions and speculative branching. |
| Secondary Core | Single ARM Cortex-M0 coprocessor @ 204 MHz for peripheral offload (SPI/SGPIO); no second M0 subsystem in TFBGA100 variant. |
| Memory | 282 kB total SRAM (264 kB main AHB + 18 kB M0 subsystem); 64 kB ROM with boot code and drivers; 256-bit OTP for AES keys. |
| Analog Peripherals | One 12-bit high-speed ADC (ADCHS) with 80 MS/s sampling rate and DMA; no 10-bit ADCs or DAC (not available in TFBGA100). |
| Digital Interfaces | 10/100T Ethernet MAC with RMII/MII and IEEE 1588 timestamping; two HS USB 2.0 ports (USB0 with on-chip HS PHY, USB1 with ULPI only); EMC supporting SDRAM/NOR/SRAM. |
| Security & Timing | AES engine with DMA and ROM-based API for boot image/data encryption; three independent PLLs; RTC with 256 B battery-backed registers and alarm timer. |
| Package & I/O | TFBGA100 (9 × 9 × 0.7 mm); 49 GPIO pins with configurable pull-up/down and open-drain; no LCD controller or second USB PHY. |
Pinout & Package
Package: TFBGA100 (SOT926-1), plastic thin fine-pitch ball grid array with 100 balls, body size 9 mm × 9 mm × 0.7 mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0_0 (G2) | GPIO / SSP1_MISO / ENET_RXD1 | Multi-function digital I/O; primary role as Ethernet RX data line 1 in RMII/MII mode - critical for PHY interface timing alignment. |
| P1_15 (K8) | GPIO / ENET_RXD0 / T0_MAT1 | Ethernet receive data line 0; match output for Timer 0 - enables synchronized PWM generation alongside network reception. |
| P1_16 (H9) | GPIO / ENET_CRS / ENET_RX_DV | Carrier Sense and Receive Data Valid signals - required for RMII/MII frame boundary detection and collision handling. |
| P1_18 (J10) | GPIO / ENET_TXD0 / CAN1_RD | Ethernet transmit data line 0; also serves as CAN1 receiver input - allows shared pin for dual-protocol designs with careful signal isolation. |
| P1_19 (K9) | ENET_TX_CLK / CLKOUT / I2S1_TX_SCK | Configurable clock output: Ethernet reference clock (RMII) or I2S master clock - enables synchronous audio or precise network timing without external oscillator. |
| P2_0 (G10) | GPIO / USB0_PPWR / ENET_MDC | USB VBUS drive control (active-HIGH) and Ethernet MIIM clock - supports integrated power switching and PHY configuration over same pin. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-core deterministic partitioning | M4F core handles application logic and real-time control; dedicated M0 coprocessor isolates SPI/SGPIO traffic - eliminates bus contention and guarantees peripheral response latency. |
| IEEE 1588-2008 v2 support | Hardware timestamping in Ethernet MAC enables sub-microsecond time synchronization for industrial PLCs and motion controllers without software overhead. |
| 80 MS/s 12-bit ADC (ADCHS) | High-speed sampling enables closed-loop motor control with >10 kHz current loop bandwidth and real-time FFT analysis on M4F core. |
| Three independent PLLs | Dedicated USB PLL ensures jitter-free high-speed USB operation; audio PLL supports bit-clock generation for I2S audio codecs without external clock sources. |
| AES engine with ROM API | Secure boot and runtime data encryption using DMA-accelerated AES-128/256 - key storage in OTP prevents extraction; no software crypto library required. |
Applications
| Industrial Ethernet Gateway | Motor Control Drive |
|---|---|
Use Scenario: Protocol translation between Modbus TCP and CANopen in factory automation networks. IC Role / Device Role / Timing Role: LPC43S70FET100E acts as real-time bridge controller with Ethernet MAC and C_CAN; M4F executes protocol stacks while M0 handles CAN message framing. Use Value: IEEE 1588 timestamping synchronizes distributed I/O modules; EMC interface connects to external flash for firmware updates; 49 GPIOs route discrete I/O and status LEDs. | Use Scenario: Field-oriented control (FOC) of 3-phase PMSM motors in HVAC compressors. IC Role / Device Role / Timing Role: LPC43S70FET100E provides PWM generation via SCTimer, current sensing via 80 MS/s ADCHS, and position feedback via QEI (enabled in TFBGA100 per block diagram). Use Value: Hardware FPU accelerates Clarke/Park transforms; 204 MHz M4F sustains 20 kHz PWM update rate; AES secures firmware updates over USB or Ethernet. |
| Smart Energy Meter | RFID Reader Controller |
Use Scenario: High-accuracy e-metering with harmonic analysis and tamper detection. IC Role / Device Role / Timing Role: LPC43S70FET100E acquires voltage/current waveforms via ADCHS, computes RMS/harmonics on M4F, and communicates via USB/Ethernet. Use Value: 80 MS/s sampling captures >40th harmonics per IEC 61000-4-7; AES encrypts consumption data; RTC with battery backup maintains time during mains failure. | Use Scenario: Multi-protocol RFID reader (ISO14443A/B, ISO15693) with secure credential validation. IC Role / Device Role / Timing Role: LPC43S70FET100E manages RF front-end via SPI, performs cryptographic authentication using AES engine, and interfaces to host via USB/UART. Use Value: Dedicated M0 coprocessor handles ISO14443 timing-critical framing; USB0 with on-chip PHY enables HID-class reader enumeration; 282 kB SRAM buffers tag data streams. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core ARM microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC4357FET100 | No AES engine; no USB0 on-chip HS PHY; identical TFBGA100 package and 282 kB SRAM. | Suitable for cost-sensitive industrial control where cryptographic boot integrity is not required. | Select LPC4357FET100 if AES and USB0 HS PHY are unnecessary; verify USB1 ULPI PHY compatibility matches design. |
| LPC43S50FET100 | Single Cortex-M4 core only; no M0 coprocessor; 264 kB SRAM; same TFBGA100 package and peripheral set except missing C_CAN and reduced GPIO count. | Applicable for simpler real-time control tasks without peripheral offload requirements. | Choose LPC43S50FET100 when dual-core complexity is unnecessary and AES is retained; confirm absence of M0 does not impact real-time latency budgets. |
Compared with LPC43S70FET100E, LPC4357FET100 removes security and USB PHY features for lower cost, while LPC43S50FET100 eliminates the M0 coprocessor to reduce software complexity - both retain Ethernet, USB1 ULPI, and ADCHS but require revalidation of real-time partitioning and secure boot workflows.
Availability
LPC43S70FET100E is available at Aetrix Electronics and suitable for industrial automation, smart metering, and embedded audio applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for LPC43S70FET100E includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The LPC43S series targets high-performance embedded control with dual-core determinism, hardware security, and rich analog/digital peripheral integration - designed specifically for industrial gateways, motor drives, and secure edge nodes.
FAQ
What is the maximum operating frequency of the LPC43S70FET100E?
The LPC43S70FET100E operates at a maximum CPU frequency of 204 MHz on both its ARM Cortex-M4F and ARM Cortex-M0 cores. This is achieved using an internal PLL driven by either a 1–25 MHz crystal oscillator or the 12 MHz ±1% internal RC oscillator. The frequency is confirmed in Section 1 and Table 2 of the official NXP datasheet Rev. 1.3.
Does the LPC43S70FET100E include a hardware floating-point unit?
Yes, the LPC43S70FET100E integrates a hardware floating-point unit (FPU) within its ARM Cortex-M4F core. This enables single-cycle floating-point operations essential for real-time signal processing, motor control algorithms, and FFT computation. The FPU is explicitly stated in the General Description and Features sections of the NXP datasheet.
How many ADC channels does the LPC43S70FET100E support, and what is their resolution and speed?
The LPC43S70FET100E includes one 12-bit high-speed ADC (ADCHS) with 6 channels and a maximum sampling rate of 80 MSamples/s. It does not include the 10-bit ADC0/ADC1 or DAC, which are exclusive to the LBGA256 package per Table 2. This configuration is verified in the "Ordering information" and "Analog peripherals" sections of the datasheet.
Is the LCD controller available on the LPC43S70FET100E?
No, the LCD controller is not available on the LPC43S70FET100E. According to Table 2 in the NXP datasheet, LCD functionality is only supported on the LBGA256 package variant (LPC43S70FET256). The TFBGA100 package (LPC43S70FET100) omits this peripheral entirely, as confirmed in the "Ordering options" summary.
What security features are implemented in the LPC43S70FET100E?
The LPC43S70FET100E includes a dedicated AES encryption/decryption engine with DMA support, programmable via a ROM-based API. It also provides two banks (256-bit total) of One-Time Programmable memory for secure AES key storage - one bank can hold an encrypted key for boot image decryption. These features are documented in Sections 2 and 5 of the NXP datasheet.
LPC43S70FET100E Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 100-TFBGA
- Series:
- LPC43xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4/M0
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 204MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, IrDA, Microwire, MMC/SD, SPI, SSI, SSP, UART/USART, USB, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, WDT
- Number of I/O:
- 49
- Program Memory Size:
- -
- Program Memory Type:
- ROMless
- EEPROM Size:
- -
- RAM Size:
- 282K x 8
- Voltage - Supply (Vcc/Vdd):
- 2.2V ~ 3.6V
- Data Converters:
- A/D 16x10b, 6x12b; D/A 1x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC43S70FET100E FAQ
1.How can I place an order for LPC43S70FET100E through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC43S70FET100E on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC43S70FET100E reliable?
The price and inventory of LPC43S70FET100E are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC43S70FET100E is usually 5 days.
3.What payment methods are accepted for LPC43S70FET100E?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC43S70FET100E transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC43S70FET100E?
LPC43S70FET100E orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC43S70FET100E order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC43S70FET100E?
For technical support, including LPC43S70FET100E datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC43S70FET100E requirements.
6.How does Aetrix verify that LPC43S70FET100E is sourced from the original manufacturer or authorized distributors?
All LPC43S70FET100E products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC43S70FET100E meets industry standards.
7.What is the process for return or replacement of LPC43S70FET100E?
All LPC43S70FET100E units undergo pre-shipment inspection (PSI). If there is an issue with LPC43S70FET100E, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC43S70FET100E part is unused and in its original packaging.
Return procedure for LPC43S70FET100E:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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