NXP Semiconductors LPC54113J128BD64QL
- Part No.:
- LPC54113J128BD64QL
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
LPC54113J128BD64QL.pdf
- Description:
- IC MCU 32BIT 128KB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LPC54113J128BD64QL from NXP Semiconductors is a dual-core ARM Cortex-M4/M0+ microcontroller in LQFP64 package, featuring 128 KB flash, 96 KB SRAM (32 KB SRAMX + 64 KB SRAM0), 12-bit 5.0 Msamples/sec ADC with 12 input channels, crystal-less USB 2.0 full-speed device interface, and DMIC subsystem for PDM microphone processing - deployed in industrial sensor hubs and low-power audio edge nodes.
For engineers reviewing the LPC54113J128BD64QL datasheet, LPC54113J128BD64QL pinout, LPC54113J128BD64QL application, or LPC54113J128BD64QL equivalent, key selection criteria include dual-core real-time partitioning capability, USB crystal-less operation for BOM cost reduction, integrated temperature sensor with ADC, Flexcomm configurable serial interfaces, and -40 °C to +105 °C extended temperature rating.
Technical Context
The LPC54113J128BD64QL implements tightly coupled dual ARM cores: Cortex-M4 (150 MHz, FPU, MPU, NVIC) for signal processing and real-time control, and Cortex-M0+ (150 MHz, single-cycle I/O) for low-power peripheral management and offload tasks. Both cores share memory map via multilayer AHB matrix and communicate via mailbox registers.
Its clock system integrates a 12 MHz internal FRO trimmed to ±1 % accuracy, System PLL for CPU scaling, 32.768 kHz RTC oscillator, and watchdog oscillator - enabling precise timing across sleep/deep-sleep modes and supporting wake-up from USB, USART, SPI, or I2C slave activity without external crystals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: ARM Cortex-M4 @ 150 MHz (FPU, MPU) + Cortex-M0+ @ 150 MHz (single-cycle I/O, code-compatible) |
| Memory | 128 KB on-chip flash; 96 KB SRAM (32 KB SRAMX + 64 KB SRAM0); no SRAM1/SRAM2 allocation per ordering table |
| Analog Peripherals | 12-bit ADC with 12 input channels, 5.0 MS/s sample rate, two independent conversion sequences, and integrated temperature sensor |
| Digital Audio | DMIC subsystem with dual-channel PDM interface, hardware voice activity detection, decimators, and I2S streaming capability |
| USB Interface | USB 2.0 full-speed device controller with on-chip PHY and crystal-less operation using software library (TN00031) |
| Serial Interfaces | Eight Flexcomm peripherals (FC0–FC7), each configurable as USART/SPI/I2C; FC6/FC7 support I2S; fractional baud-rate generator shared across interfaces |
| Package & Temp | LQFP64 (10 × 10 × 1.4 mm); operating temperature range −40 °C to +105 °C; 128-bit unique serial number |
Pinout & Package
LQFP64 package: plastic low profile quad flat package, 64 leads, body size 10 × 10 × 1.4 mm (SOT314-2), lead pitch 0.5 mm, RoHS-compliant, moisture sensitivity level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PIO0_0 (Pin 31) | GPIO / FC0_RXD_SDA_MOSI | Primary USART0 RX or I2C0 SDA; boot mode selection with PIO0_4 and PIO1_6 |
| SWCLK/PIO0_16 (Pin 52) | JTAG/SWD Clock | Default Serial Wire Debug clock after reset; also supports Flexcomm3/6 functions |
| SWDIO/PIO0_17 (Pin 53) | JTAG/SWD Data I/O | Default Serial Wire Debug bidirectional data line; enables debug access without JTAG pins |
| USB_DP / USB_DM (Pins 5, 6) | USB 2.0 Full-Speed Differential Pair | Crystal-less USB device interface; requires no external 12 MHz crystal or oscillator |
| PIO0_29/ADC0_0 (Pin 11) | ADC Input Channel 0 | Analog input for 12-bit ADC; DIGIMODE=0 in IOCON enables analog function |
| RESET (Pin 64) | Active-Low Reset Input | Asynchronous reset with Power-On Reset (POR) and Brown-Out Detect (BOD) integration |
Key Features
| Feature | Design Value |
|---|---|
| Dual-Core Real-Time Partitioning | Independent M4 and M0+ execution domains enable deterministic control (M4) + low-power peripheral orchestration (M0+), reducing inter-core contention |
| Crystal-Less USB Operation | Eliminates external 12 MHz crystal and associated load capacitors, lowering BOM cost and PCB area in USB device applications |
| Configurable Flexcomm Interfaces | Eight software-selectable serial peripherals (USART/SPI/I2C/I2S) with shared fractional baud-rate generator and FIFOs for mixed-protocol designs |
| Integrated DMIC Subsystem | Dual PDM microphone inputs with hardware decimation, 16-entry FIFO, DC locking, and optional voice activity detection - bypasses CPU for audio preprocessing |
| Extended Temperature Range | Rated for −40 °C to +105 °C operation, qualified for industrial motor control, HVAC sensors, and automotive cabin modules |
Applications
| Industrial Sensor Hub | Smart Audio Edge Node |
|---|---|
Use Scenario: Multi-sensor data aggregation (temperature, vibration, humidity) in factory-floor condition monitoring systems with local preprocessing and wireless uplink. IC Role / Device Role / Timing Role: LPC54113J128BD64QL serves as main controller running M4 for FFT-based vibration analysis and M0+ for sensor polling, ADC sampling, and USB/CDC firmware updates. Use Value: On-chip 5.0 MS/s ADC and temperature sensor eliminate external signal conditioning; dual-core isolation ensures real-time response to alarm thresholds without firmware stalls. | Use Scenario: Voice-controlled industrial HMI with far-field PDM microphone array, local wake-word detection, and USB audio streaming to host PC. IC Role / Device Role / Timing Role: LPC54113J128BD64QL hosts DMIC subsystem for PDM-to-PCM conversion and voice activity detection, while M4 runs lightweight neural wake-word model and USB audio class driver. Use Value: Hardware-accelerated PDM decimation and FIFO reduce M4 loading by >70 % vs. software-only implementation; crystal-less USB simplifies compliance testing. |
| USB-C Enabled Test Fixture | Low-Power RTU for Remote Monitoring |
Use Scenario: Portable field calibration tool connecting to test instruments via USB-C and communicating with legacy RS-485 devices using isolated UART. IC Role / Device Role / Timing Role: LPC54113J128BD64QL acts as USB-C CDC bridge with dual Flexcomm interfaces: one as USB CDC ACM, another as isolated RS-485 transceiver controller. Use Value: Eight Flexcomm units allow simultaneous USB, RS-485, and SPI flash programming without multiplexing; 128 KB flash accommodates dual-firmware images for field updates. | Use Scenario: Battery-powered remote telemetry unit collecting analog sensor data (pressure, current) and transmitting over LoRaWAN with periodic USB maintenance port access. IC Role / Device Role / Timing Role: LPC54113J128BD64QL operates in deep-sleep mode between samples, waking via RTC alarm or USB enumeration event; M0+ handles ADC triggers and DMA transfers. Use Value: Micro-tick timer and WWDT enable sub-millisecond wake-up latency; 1.62–3.6 V supply range supports direct LiSOCl₂ battery operation without buck-boost regulator. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core ARM microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC54114J256BD64 | 256 KB flash, 192 KB total SRAM (64+64+32+32), includes SRAM1/SRAM2; same LQFP64 package and pinout | Supports larger firmware images, dual-bank OTA updates, and additional DMA buffers for high-throughput audio streaming | Select when firmware size exceeds 128 KB or when SRAMX/SRAM1/SRAM2 partitioning is required for cache-coherent DMA operations |
| LPC54606J512ET100 | ARM Cortex-M4 only (no M0+), 512 KB flash, 200 KB SRAM, 100-pin TFBGA; adds Ethernet MAC and SDIO | Targeted at networked gateway applications requiring TCP/IP stack and local storage; lacks DMIC subsystem and crystal-less USB | Select for Ethernet-connected edge gateways where dual-core partitioning is unnecessary but protocol stack headroom is critical |
Compared with LPC54114J256BD64 and LPC54606J512ET100, the LPC54113J128BD64QL delivers optimal cost-performance balance for compact, battery-aware audio and sensor edge nodes - retaining dual-core flexibility and crystal-less USB while minimizing flash/SRAM overhead.
Availability
LPC54113J128BD64QL is available at Aetrix Electronics and suitable for industrial sensor hubs, smart audio edge nodes, USB-C test fixtures, and low-power RTUs requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LPC54113J128BD64QL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, IoT, mobile, and communication infrastructure markets.
The LPC5411x product line targets resource-constrained, power-sensitive edge applications requiring real-time responsiveness, integrated analog/audio peripherals, and robust security - with LPC54113J128BD64QL optimized for cost-driven dual-core deployments.
FAQ
What is the maximum operating frequency of the LPC54113J128BD64QL's CPU cores?
The LPC54113J128BD64QL features two ARM cores both rated for up to 150 MHz operation: the Cortex-M4 core includes FPU and MPU, while the Cortex-M0+ core provides energy-efficient peripheral management. Both cores derive clock from the same system source and maintain synchronization via the AHB matrix and mailbox registers. This dual-frequency capability is confirmed in Section 2.1 of the Rev. 2.6 datasheet.
Does the LPC54113J128BD64QL support crystal-less USB operation?
Yes, the LPC54113J128BD64QL integrates a USB 2.0 full-speed device controller with on-chip PHY and supports crystal-less operation in device mode using NXP's software library (documented in Technical Note TN00031). This eliminates the need for an external 12 MHz crystal, reducing BOM count and PCB footprint - a verified feature explicitly listed in the General Description and Features sections of the datasheet.
How much SRAM is allocated in the LPC54113J128BD64QL, and how is it distributed?
The LPC54113J128BD64QL contains 96 KB of total SRAM, allocated as 32 KB SRAMX (on I&D buses) and 64 KB SRAM0 (contiguous main SRAM), with no SRAM1 or SRAM2 enabled per Table 2 (Ordering Options). This configuration is distinct from higher-memory variants like LPC54114J256BD64 and is validated in the LPC5411x datasheet Rev. 2.6, page 5.
Which pins on the LPC54113J128BD64QL support analog input for the 12-bit ADC?
The LPC54113J128BD64QL supports ADC input on 12 dedicated pins: PIO0_29 through PIO0_31, PIO1_0 through PIO1_5, and PIO1_12 through PIO1_15 - all marked with "ADC0_x" in Table 4 (Pin Description). Each requires DIGIMODE=0 in its IOCON register to enable analog function, and all connect to the same 12-bit, 5.0 MS/s ADC block as specified in Section 2.7 (Analog Peripherals).
What is the operating temperature range and package type of the LPC54113J128BD64QL?
The LPC54113J128BD64QL is packaged in LQFP64 (SOT314-2) with dimensions 10 × 10 × 1.4 mm and is rated for operation from −40 °C to +105 °C. This extended temperature grade is explicitly stated in Section 2.13 (Operating Temperature Range) and confirmed in Table 1 (Ordering Information) of the Rev. 2.6 datasheet.
LPC54113J128BD64QL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 64-LQFP
- Series:
- LPC54100
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4
- Core Size:
- 32-Bit Single-Core
- Speed:
- 100MHz
- Connectivity:
- I2C, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, PWM, WDT
- Number of I/O:
- 48
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 96K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.62V ~ 3.6V
- Data Converters:
- A/D 12x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC54113J128BD64QL FAQ
1.How can I place an order for LPC54113J128BD64QL through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC54113J128BD64QL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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The price and inventory of LPC54113J128BD64QL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC54113J128BD64QL is usually 5 days.
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For technical support, including LPC54113J128BD64QL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC54113J128BD64QL requirements.
6.How does Aetrix verify that LPC54113J128BD64QL is sourced from the original manufacturer or authorized distributors?
All LPC54113J128BD64QL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC54113J128BD64QL meets industry standards.
7.What is the process for return or replacement of LPC54113J128BD64QL?
All LPC54113J128BD64QL units undergo pre-shipment inspection (PSI). If there is an issue with LPC54113J128BD64QL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC54113J128BD64QL part is unused and in its original packaging.
Return procedure for LPC54113J128BD64QL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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