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NXP Semiconductors LPC54113J256UK49Z

Part No.:
LPC54113J256UK49Z
Manufacturer:
NXP Semiconductors
Category:
Microcontrollers
Package:
49-UFBGA, WLCSP
Datasheet:
AetrixLPC54113J256UK49Z.pdf
Description:
IC MCU 32BIT 256KB FLASH 49WLCSP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:4,153

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Product details

Overview

LPC54113J256UK49Z from NXP Semiconductors is a dual-core ARM Cortex-M4/M0+ microcontroller for low-power embedded applications, featuring 256 KB flash, 192 KB SRAM, crystal-less USB 2.0 full-speed device interface, 12-bit 5.0 MS/s ADC, and integrated DMIC subsystem with PDM microphone support. It operates across −40 °C to +105 °C and targets voice-enabled edge nodes, industrial sensor hubs, and USB-connected IoT endpoints.

For engineers reviewing the LPC54113J256UK49Z datasheet, LPC54113J256UK49Z pinout, LPC54113J256UK49Z application, or LPC54113J256UK49Z equivalent, key selection considerations include dual-core real-time partitioning, WLCSP49 package constraints, crystal-less USB timing compliance, DMIC subsystem resource allocation, and Flexcomm interface multiplexing flexibility.

Technical Context

The LPC54113J256UK49Z integrates two independent 32-bit processors: the Cortex-M4 (with FPU and MPU) and Cortex-M0+ (code- and tool-compatible), both running up to 150 MHz from a shared clock source. Its memory subsystem includes 256 KB on-chip flash with page erase, 192 KB distributed SRAM (SRAMX/SRAM0/SRAM1/SRAM2), and ROM-based USB drivers supporting HID/CDC/MSC/DFU.

Peripherals are organized around an AHB matrix and APB bridges, with eight Flexcomm interfaces (each configurable as USART/SPI/I2C, two with I2S), a dedicated DMIC subsystem with hardware voice activity detection, and a 24-bit multi-rate timer (MRT) for deterministic interrupt scheduling. Power management includes programmable PMU, deep power-down mode, and wake-up via USB, USART, SPI, or I2C slave activity.

Key Specifications

ParameterValue and Actual Design Meaning
CPU CoresDual ARM Cortex-M4 (150 MHz, FPU/MPU) + Cortex-M0+ (150 MHz, single-cycle I/O)
Memory256 KB flash (256-byte page erase); 192 KB SRAM (32 KB SRAMX + 64 KB ×2 SRAM0/SRAM1 + 32 KB SRAM2)
Analog12-bit ADC with 12 channels, 5.0 MS/s sample rate, dual conversion sequences, internal temperature sensor
Digital AudioDMIC subsystem: dual-channel PDM input, hardware decimation, 16-entry FIFO, optional DC locking, VAD, I2S streaming
USB InterfaceFull-speed (12 Mbps) device controller with on-chip PHY and crystal-less operation using software library (TN00031)
Serial PeripheralsEight Flexcomm interfaces (FC0–FC7): each configurable as USART/SPI/I2C; FC6/FC7 add I2S; fractional baud-rate generator shared
PackageWLCSP49 (7×7 bumps, 3.436 × 3.436 × 0.525 mm, 0.4 mm pitch)

Pinout & Package

WLCSP49 package: wafer-level chip-scale, 49-bump array (7×7), 0.4 mm pitch, body size 3.436 × 3.436 × 0.525 mm. Bump A1 is pin #1 index area.

Pin/TerminalCircuit RoleDesign Meaning
A1PIO0_23 / TMSGeneral-purpose I/O; default TMS in JTAG boundary scan; FC1 I2C SCL in ISP mode
B1PIO1_1 / ADC0_4ADC input channel 4; SWO trace output; FC5 SPI SSEL2; FC4 USART TXD
C1PIO0_30 / ADC0_1ADC input channel 1; FC1 USART TXD; SCT0 PWM output 3
D1VSSDigital ground reference for core logic and I/O banks
E1PIO0_26GPIO with FC4 CTS/SDA/SSEL0 function; CTimer0 capture input 3
F1PIO0_24GPIO with FC1 I2C SDA in ISP mode; CTimer0 capture input 1
G1VDDCore power supply (1.62–3.6 V); decoupled per bump group
A2PIO1_4 / ADC0_7ADC input channel 7; PDM1_CLK output; FC7 USART RTS; SCT0 PWM output 7
B2PIO1_2 / ADC0_5ADC input channel 5; MCLK I/O for I2S/PDM; FC7 SPI SSEL3
C2PIO0_31 / ADC0_2ADC input channel 2; PDM0_CLK output; FC2 CTS/SDA/SSEL0; ISP boot trigger
D2VSSAAnalog ground, isolated for ADC/temperature sensor reference stability
E2PIO0_25GPIO with FC4/FC6 CTS/SDA/SSEL0; CTimer0 capture input 2
F2PIO0_23GPIO with FC1 I2C SCL in ISP mode; CTimer0 capture input 0
G2PIO0_22GPIO with CLKIN input; FC0 RXD/SDA/MOSI; CTimer3 match output 3
A3PIO1_5 / ADC0_8ADC input channel 8; PDM1_DATA input; FC3 TXD/SCL/MISO
B3PIO1_3 / ADC0_6ADC input channel 6; FC7 SPI SSEL2; SCT0 PWM output 6; USB_UP_LED indicator
C3PIO1_0 / ADC0_3ADC input channel 3; PDM0_DATA input; FC2 RTS/SCL/SSEL1
D3PIO0_29 / ADC0_0ADC input channel 0; FC1 RXD/SDA/MOSI; SCT0 PWM output 2
E3PIO0_21GPIO with CLKOUT; FC0 TXD/SCL/MISO; CTimer3 match output 0
F3PIO0_20 / TMSGPIO with TMS in boundary scan; FC5 RXD/SDA/MOSI; CTimer3 capture input 0
G3PIO0_19 / TDIGPIO with TDI in boundary scan; FC5 SCK; SCT0 PWM output 1
A4SWDIO / PIO0_17Serial Wire Debug I/O (default after boot); FC3 SSEL3; CTimer3 match output 2
B4SWCLK / PIO0_16Serial Wire Clock (default after boot); FC3 SSEL2; CTimer3 match output 1
C4PIO0_15 / TDOGPIO with TDO in boundary scan; FC3 RTS/SCL/SSEL1; CTimer2 match output 2
D4VDDAAnalog power supply (1.62–3.6 V), separate from digital VDD for ADC noise immunity
E4VREFPPositive reference voltage input for ADC (tied to VDDA or external precision source)
F4VREFNNegative reference voltage input for ADC (tied to VSSA or external source)
G4PIO0_18 / TRSTGPIO with TRST in boundary scan; FC5 TXD/SCL/MISO; SCT0 PWM output 0
A5PIO0_13GPIO with FC3 TXD/SCL/MISO in ISP mode; SCT0 PWM output 4; CTimer2 match output 0
B5PIO0_12GPIO with FC3 RXD/SDA/MOSI in ISP mode; CTimer2 match output 3
C5PIO0_11GPIO with FC3 SCK in ISP mode; FC6 RXD/SDA/MOSI/DATA; CTimer2 match output 1
D5USB_DMUSB 2.0 full-speed differential data minus line; internal termination enabled in crystal-less mode
E5USB_DPUSB 2.0 full-speed differential data plus line; internal termination enabled in crystal-less mode
F5RESETActive-low reset input; supports Power-On Reset (POR) and Brown-Out Detect (BOD) assertion
G5VSSDigital ground; multiple VSS bumps ensure low-impedance return path for high-speed signals
A6PIO0_0GPIO with FC0 RXD/SDA/MOSI in ISP mode; CTimer0 capture input 0; SCT0 PWM output 3
B6PIO0_1GPIO with FC0 TXD/SCL/MISO in ISP mode; CTimer0 capture input 1; SCT0 PWM output 1
C6PIO0_5GPIO with FC6 RXD/SDA/MOSI/DATA; SCT0 PWM output 6; CTimer0 match output 0
D6PIO0_6GPIO with FC6 TXD/SCL/MISO/WS; CTimer0 match output 1; UTICK_CAP0 input
E6PIO0_7GPIO with FC6 SCK; SCT0 PWM output 0; CTimer0 match output 2
F6PIO0_14 / TCKGPIO with TCK in boundary scan; FC3 CTS/SDA/SSEL0; SCT0 PWM output 5
G6PIO0_15 / TDOGPIO with TDO in boundary scan; FC3 RTS/SCL/SSEL1; CTimer2 match output 2
A7RTCXIN32.768 kHz crystal input for RTC oscillator; supports low-power timekeeping in deep power-down
B7RTCXOUT32.768 kHz crystal output for RTC oscillator; drives external crystal load capacitance
C7PIO0_4GPIO with FC0 SCK in ISP mode; FC3 SSEL2; CTimer0 capture input 2; boot source select
D7PIO0_6GPIO with FC6 TXD/SCL/MISO/WS; CTimer0 match output 1; UTICK_CAP0 input
E7PIO0_9GPIO with FC2 TXD/SCL/MISO; SCT0 PWM output 2; CTimer3 capture input 0
F7PIO0_12GPIO with FC3 RXD/SDA/MOSI in ISP mode; CTimer2 match output 3
G7PIO0_13GPIO with FC3 TXD/SCL/MISO in ISP mode; SCT0 PWM output 4; CTimer2 match output 0

Key Features

FeatureDesign Value
Dual-core asymmetric processingOffloads real-time audio preprocessing (M0+) from application logic (M4), enabling deterministic latency and reduced firmware complexity
Crystal-less USB 2.0 FSEliminates external 12 MHz crystal and associated capacitors, reducing BOM cost and PCB area while maintaining ±0.25 % USB timing tolerance
Integrated DMIC subsystemHardware-accelerated PDM-to-PCM conversion with decimation, FIFO buffering, and voice activity detection-no CPU cycles required for raw microphone ingestion
Flexible Flexcomm interfacesEight software-configurable serial peripherals allow dynamic reassignment of USART/SPI/I2C/I2S functions without hardware changes or pin remapping
Multi-domain power managementProgrammable PMU enables independent clock gating, voltage scaling, and sleep mode entry per peripheral cluster, extending battery life in portable devices
Robust analog subsystem12-bit ADC with 5.0 MS/s throughput, 12-channel mux, dual conversion sequences, and integrated temperature sensor enable high-fidelity sensor fusion without external signal conditioning

Applications

Voice-Controlled Edge NodeIndustrial Sensor Hub

Use Scenario: Compact smart speaker endpoint with far-field PDM microphones, local wake-word detection, and USB-C audio streaming to host PC.

IC Role / Device Role / Timing Role: Primary MCU executing dual-core firmware: M0+ handles PDM sampling, decimation, and VAD; M4 runs neural inference and USB CDC audio stack.

Use Value: Crystal-less USB eliminates timing component; DMIC subsystem reduces M0+ CPU load by >70 % vs. bit-banged PDM; WLCSP49 enables <8 mm² PCB footprint.

Use Scenario: DIN-rail mounted environmental monitor aggregating temperature, humidity, and vibration data from multiple sensors, transmitting via USB to SCADA system.

IC Role / Device Role / Timing Role: Central acquisition controller managing 12-channel ADC sampling, I2C sensor reads, RTC timestamping, and USB bulk transfers at 100 Hz update rate.

Use Value: 192 KB SRAM buffers 10+ seconds of sensor data; 5.0 MS/s ADC oversamples for noise rejection; −40 °C to +105 °C rating ensures reliability in uncontrolled enclosures.

USB-C Connected Medical DeviceLow-Power IoT Gateway

Use Scenario: Portable ECG patch with analog front-end, real-time QRS detection, and USB-powered firmware updates and data export.

IC Role / Device Role / Timing Role: Safety-critical signal processor: M4 runs FDA-compliant QRS algorithm and USB DFU bootloader; M0+ manages ADC triggers and GPIO safety interlocks.

Use Value: Dual-core isolation prevents USB stack faults from compromising medical algorithms; MPUs enforce memory boundaries; crystal-less USB simplifies regulatory EMC testing.

Use Scenario: Battery-powered LoRaWAN gateway collecting BLE sensor data, performing local aggregation, and uploading summaries via USB to cloud gateway.

IC Role / Device Role / Timing Role: Power-optimized coordinator: M0+ wakes periodically to scan BLE, M4 processes payloads and schedules USB transfers only during charging events.

Use Value: Deep power-down mode draws <2 µA; Micro-Tick Timer enables sub-millisecond wake intervals; 256 KB flash stores dual-image bootloader for field updates.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core ARM microcontroller applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
LPC54114J256UK49ZSame package and core configuration, but adds USB High-Speed (HS) capability and second USB portRequired for applications needing simultaneous FS and HS USB connectivity or dual-device enumerationSelect when USB bandwidth exceeds 12 Mbps or dual-port topology is mandatory
LPC55S16JBD64KSingle Cortex-M33 core (150 MHz) with TrustZone, 256 KB flash, 192 KB SRAM, no M0+ coprocessor, LQFP64 packageSuitable for security-critical applications requiring hardware root-of-trust, but lacks asymmetric audio preprocessing offloadSelect when secure boot, cryptographic acceleration, or larger I/O count (64-pin) outweighs need for dual-core audio pipeline

Compared with LPC54114J256UK49Z, the LPC54113J256UK49Z omits USB HS and second port-reducing cost and power-but retains identical dual-core audio processing capability; versus LPC55S16JBD64K, it trades TrustZone security for deterministic real-time partitioning between M4 and M0+ cores in a smaller WLCSP footprint.

Availability

LPC54113J256UK49Z is available at Aetrix Electronics and suitable for voice-controlled edge nodes, industrial sensor hubs, and USB-C connected medical devices requiring stable component supply, long-term lifecycle support, and wafer-level packaging for space-constrained designs.

Supply support for LPC54113J256UK49Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.

The LPC5411x product line delivers dual-core ARM microcontrollers optimized for ultra-low-power, audio-centric embedded systems-designed to simplify voice interface integration, reduce external component count, and accelerate time-to-market for intelligent edge devices.

FAQ

What is the maximum operating frequency of the LPC54113J256UK49Z?

The LPC54113J256UK49Z supports a maximum CPU frequency of 150 MHz for both the ARM Cortex-M4 and Cortex-M0+ cores. This frequency is achieved using the system PLL driven by the internal 12 MHz Free Running Oscillator (FRO), eliminating the need for an external high-frequency crystal while maintaining timing accuracy within ±1 % over voltage and temperature.

Does the LPC54113J256UK49Z support crystal-less USB operation?

Yes, the LPC54113J256UK49Z supports crystal-less USB 2.0 full-speed device operation using its internal FRO and software library (documented in Technical Note TN00031). This eliminates the need for an external 12 MHz crystal and associated load capacitors, reducing BOM cost and PCB area while meeting USB timing tolerance requirements.

How many ADC channels does the LPC54113J256UK49Z have, and what is its maximum sample rate?

The LPC54113J256UK49Z integrates a 12-bit ADC with 12 input channels and supports a maximum sample rate of 5.0 million samples per second. It provides two independent conversion sequences and connects to an on-chip temperature sensor, enabling high-throughput sensor fusion without external ADC components.

What package type is used for the LPC54113J256UK49Z?

The LPC54113J256UK49Z uses a WLCSP49 (Wafer-Level Chip-Scale Package) with 49 bumps arranged in a 7×7 array, measuring 3.436 × 3.436 × 0.525 mm and featuring a 0.4 mm bump pitch. This ultra-compact package is optimized for space-constrained portable and wearable applications.

Can the LPC54113J256UK49Z operate across extended temperature ranges?

Yes, the LPC54113J256UK49Z is rated for operation from −40 °C to +105 °C, making it suitable for industrial, automotive, and outdoor environments where thermal robustness is critical. Its internal oscillators-including the 12 MHz FRO trimmed to ±1 % accuracy-are specified across this full range.

LPC54113J256UK49Z Specifications

Product attributes
Attribute value
Manufacturer:
NXP Semiconductors
Package/Case:
49-UFBGA, WLCSP
Series:
LPC54100
Packaging:
Tape & Reel (TR)
Product Status:
Active
Programmable:
Not Verified
Core Processor:
ARM® Cortex®-M4
Core Size:
32-Bit Single-Core
Speed:
100MHz
Connectivity:
I2C, SPI, UART/USART, USB
Peripherals:
Brown-out Detect/Reset, DMA, I2S, POR, PWM, WDT
Number of I/O:
39
Program Memory Size:
256KB (256K x 8)
Program Memory Type:
FLASH
EEPROM Size:
-
RAM Size:
192K x 8
Voltage - Supply (Vcc/Vdd):
1.62V ~ 3.6V
Data Converters:
A/D 12x12b
Oscillator Type:
Internal
Operating Temperature:
-40°C ~ 105°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:

LPC54113J256UK49Z FAQ

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6.How does Aetrix verify that LPC54113J256UK49Z is sourced from the original manufacturer or authorized distributors?

All LPC54113J256UK49Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC54113J256UK49Z meets industry standards.

7.What is the process for return or replacement of LPC54113J256UK49Z?

All LPC54113J256UK49Z units undergo pre-shipment inspection (PSI). If there is an issue with LPC54113J256UK49Z, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LPC54113J256UK49Z part is unused and in its original packaging.

Return procedure for LPC54113J256UK49Z:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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