NXP Semiconductors LPC5502JHI48J

Overview

LPC5502JHI48 from NXP Semiconductors is a 32-bit ARM Cortex-M33 microcontroller designed for secure, low-power embedded control applications. It operates at up to 96 MHz, integrates 64 KB flash and 48 KB SRAM, includes CAN 2.0 (not CAN FD), and supports TrustZone-based isolation for firmware protection in industrial sensor nodes and smart actuators.

For engineers reviewing the LPC5502JHI48 datasheet, LPC5502JHI48 pinout, LPC5502JHI48 application, or LPC5502JHI48 equivalent, key selection criteria include its HVQFN48 package with 30 GPIOs, PRINCE-enabled flash encryption, 16-bit 2.0 Msamples/sec ADC with 7 channels, and absence of CASPER crypto co-processor or PUF-distinguishing it from LPC55S0x variants.

Technical Context

The LPC5502JHI48 implements ARMv8-M architecture with TrustZone security extensions and an integrated FPU, enabling hardware-isolated secure and non-secure execution environments. Its clock system combines a 96 MHz internal FRO, dual crystal oscillators (32 MHz and 32.768 kHz), and PLLs to drive CPU and peripheral domains independently.

Peripheral integration centers on seven Flexcomm interfaces (configurable as UART/I²C/SPI/I²S), a dedicated CAN 2.0 controller, SCTimer/PWM with 10 outputs, and two DMA controllers supporting concurrent transfers across ADC, GPIO, and serial peripherals-optimized for deterministic real-time control without external co-processors.

Key Specifications

Pinout & Package

HVQFN48 package: 48-terminal, thermally enhanced, leadless plastic package with exposed thermal pad (to be connected to VSS). Pitch: 0.4 mm. Body size: 7 mm × 7 mm × 0.85 mm.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Compared with LPC5502JHI48, LPC5504JHI48 offers double the flash and SRAM for scalable firmware, while LPC55S02JHI48 adds cryptographic hardware for secure identity management-neither is pin-compatible with CAN FD variants, and all three share identical HVQFN48 thermal and layout constraints.

Availability

LPC5502JHI48 is available at Aetrix Electronics and suitable for industrial sensor nodes, smart actuator controllers, secure gateway modules, and energy metering subsystems requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for LPC5502JHI48 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with headquarters in Eindhoven, Netherlands.

The LPC5500 series targets cost-optimized, security-aware microcontrollers for resource-constrained edge devices-emphasizing PRINCE encryption, CAN 2.0, and robust analog peripherals without premium crypto accelerators.

FAQ

What is the maximum operating frequency of the LPC5502JHI48?

The LPC5502JHI48 operates at a maximum CPU frequency of 96 MHz using its internal 96 MHz Free Running Oscillator (FRO), which is trimmed to ±1% accuracy over 0 °C to 85 °C. This frequency is maintained across the full 1.8 V–3.6 V supply range without requiring external crystals for core timing, though optional 32 MHz and 32.768 kHz crystals support higher-precision peripheral clocking.

Does the LPC5502JHI48 support CAN FD or only classical CAN?

The LPC5502JHI48 supports only CAN 2.0 (Classical CAN) at up to 1 Mbps-not CAN FD. This is confirmed in Table 2 of the datasheet, where "CAN FD" is marked "-" for all LPC550x variants including LPC5502JHI48, while LPC55S0x variants explicitly list "CAN FD". The CAN module uses dedicated DMA and supports standard frame formats, error handling, and loopback testing.

How many ADC channels does the LPC5502JHI48 provide, and what is their resolution?

The LPC5502JHI48 integrates a single 16-bit successive-approximation ADC with 7 input channels (as specified for HVQFN48 in Table 2), supporting both single-ended and differential configurations. It achieves 2.0 Msamples/sec aggregate throughput with simultaneous sampling capability on paired differential inputs-enabling synchronized voltage/current acquisition for metrology applications.

Is the CASPER crypto co-processor included in the LPC5502JHI48?

No, the CASPER crypto co-processor is not present in the LPC5502JHI48. Table 2 explicitly lists "CASPER" as "-" for all LPC550x variants, distinguishing them from LPC55S0x parts (e.g., LPC55S02JHI48) which include CASPER for hardware-accelerated ECC operations. The LPC5502JHI48 retains AES, SHA2, and TRNG via the Hash-AES engine but lacks dedicated asymmetric crypto acceleration.

What package type and pin count does the LPC5502JHI48 use?

The LPC5502JHI48 uses the HVQFN48 package: a 48-terminal, thermally enhanced, leadless quad flat no-lead package measuring 7 mm × 7 mm × 0.85 mm with a 0.4 mm pitch and exposed thermal pad. This package provides 30 GPIOs and is optimized for compact, high-density PCB layouts in industrial and automotive applications requiring efficient heat dissipation.