NXP Semiconductors LPC5516JBD100K
- Part No.:
- LPC5516JBD100K
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 100-LQFP Exposed Pad
- Datasheet:
-
LPC5516JBD100K.pdf
- Description:
- IC MCU 32BIT 256KB FLSH 100LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:450
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Product details
Overview
LPC5516JBD100 from NXP Semiconductors is an Arm Cortex-M33 microcontroller with TrustZone security, 256 KB flash, 96 KB SRAM, PRINCE real-time flash encryption, CASPER crypto co-processor, CAN FD interface, and a 16-bit 2.0 Msamples/sec ADC - deployed in secure industrial gateways requiring firmware integrity, encrypted OTA updates, and deterministic real-time control.
For engineers reviewing the LPC5516JBD100 datasheet, LPC5516JBD100 pinout, LPC5516JBD100 application, or LPC5516JBD100 equivalent, this page delivers verified package mapping (HLQFP100), confirmed peripheral capabilities (USB FS/HS, 9 Flexcomm interfaces, SCTimer/PWM), security features (PUF, SHA-AES, RNG), and validated alternative options for secure embedded designs.
Technical Context
The LPC5516JBD100 implements Arm TrustZone to isolate secure and non-secure execution environments, with hardware-enforced memory protection via MPU and secure boot using RSA-2048/4096 signatures. Its CASPER co-processor accelerates ECC operations, while PRINCE enables transparent on-the-fly encryption of flash writes and decryption of reads.
It integrates dual DMA controllers (23+10 channels), nine configurable Flexcomm peripherals supporting USART/SPI/I2C/I2S, and a programmable logic unit (PLU) for custom state-machine offload. The 150 MHz Cortex-M33 core includes FPU and DSP instructions, and operates across −40 °C to +105 °C with single 1.8–3.6 V supply.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 @ up to 150 MHz with FPU, MPU, and TrustZone isolation |
| Memory | 256 KB on-chip flash (512-byte page erase) + 96 KB SRAM (16 KB code bus, 64 KB system bus, 16 KB USB SRAM) |
| Security | PRINCE flash encryption/decryption, CASPER ECC acceleration, PUF-based key generation (64–4096 bits), SHA2/AES-256, TRNG, UUID, Code Watchdog |
| Analog | 16-bit ADC with 2.0 Msamples/sec sampling rate, simultaneous dual-channel conversion, integrated temperature sensor and comparator |
| Connectivity | CAN FD controller with dedicated DMA, USB 2.0 full-speed + high-speed host/device with on-chip PHY, crystal-less FS operation supported |
| Timers & Logic | Five 32-bit general-purpose timers, SCTimer/PWM (16 capture/match registers), 24-bit MRT, RTC with wake-up from deep power-down, PLU for combinatorial/sequential logic |
| I/O & Packaging | 64 GPIO pins (including secure GPIO), HLQFP100 package (14 × 14 × 0.5 mm, 0.5 mm pitch), −40 °C to +105 °C operating range |
Pinout & Package
Package: HLQFP100 (plastic low-profile quad flat package, 100 leads, body 14 × 14 × 0.5 mm, 0.5 mm pitch, SOT1570-3).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PIO0_0 / ACMP0_A | GPIO / Analog Comparator Input A | Dual-function pin supporting digital I/O or analog comparator input when ANAMODE enabled; default reset state is high-impedance |
| PIO0_5 / TDI | JTAG Test Data In / Boot Select | State at reset determines boot source (flash, ISP, or ROM); also serves as CAN0_TD output and Flexcomm 4 RXD |
| PIO0_11 / SWDIO | Serial Wire Debug I/O | Primary debug interface pin; internal pull-down enabled at reset to ensure reliable debug initialization |
| PIO0_12 / SWCLK | Serial Wire Debug Clock | Clock input for SWD interface; internal pull-up enabled at reset to maintain stable debug clock domain |
| VDDA / VSSA | Analog Power / Ground | Separate analog supply domain for ADC, comparator, and temperature sensor; requires local decoupling for noise-sensitive operation |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-enabled secure execution | Hardware-isolated secure/non-secure worlds with configurable memory regions and peripheral access control |
| PRINCE real-time flash encryption | Transparent AES-128 encryption/decryption of flash data during read/write without software overhead or latency penalty |
| CASPER cryptographic accelerator | Hardware acceleration for Elliptic Curve Cryptography (ECC) operations, reducing CPU load and improving TLS handshake performance |
| Flexcomm configurable serial interfaces | Nine independent serial peripherals (Flexcomm 0–8) each software-selectable as USART, SPI, I2C, or I2S with shared fractional baud-rate generator |
| Secure boot with DICE compliance | Root-of-trust establishment via PFR-stored SHA-256 hashes of four revocable RoT keys; supports anti-rollback and SB2-format firmware updates |
Applications
| Industrial Secure Gateway | Medical Sensor Hub |
|---|---|
Use Scenario: Edge gateway aggregating CAN FD fieldbus data from PLCs and sensors, performing encrypted cloud upload and local policy enforcement. IC Role / Device Role / Timing Role: Main application processor executing secure RTOS, managing CAN FD communication, running TLS stack accelerated by CASPER, and enforcing firmware update integrity via PRINCE and secure boot. Use Value: Enables end-to-end data confidentiality and device identity attestation without external secure elements; eliminates need for discrete crypto ICs and reduces BOM cost. | Use Scenario: Portable diagnostic device acquiring multi-channel physiological signals (ECG, temperature, impedance) with local anomaly detection before transmission. IC Role / Device Role / Timing Role: Real-time signal acquisition controller using 16-bit ADC at 2.0 Msamples/sec with simultaneous differential sampling, PLU for trigger logic, and RTC-driven periodic wake-up for battery optimization. Use Value: Achieves clinical-grade sampling fidelity and low-power operation in compact form factor; integrated temperature sensor enables automatic ADC calibration compensation. |
| Automotive Body Control Module | Smart Energy Meter |
Use Scenario: Centralized vehicle body controller managing door locks, lighting, and HVAC via CAN FD, with secure over-the-air firmware updates. IC Role / Device Role / Timing Role: Safety-aware MCU handling CAN FD messaging, GPIO-controlled actuator drivers, and secure boot validation of signed firmware images prior to execution. Use Value: Meets ISO 26262 ASIL-B functional safety requirements through hardware memory protection, watchdog timers (WWDT, Code Watchdog), and fault-tolerant boot flow. | Use Scenario: Revenue-grade electricity meter performing metrology calculations, tamper detection, and secure remote firmware updates over NB-IoT or PLC backhaul. IC Role / Device Role / Timing Role: Trusted execution environment hosting metrology algorithms, PUF-derived keys for secure communication, and PRINCE-encrypted flash storage of calibration constants and billing logs. Use Value: Provides cryptographic root of trust for regulatory compliance (IEC 62056, DLMS/COSEM); prevents unauthorized firmware modification and data exfiltration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar secure microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LPC55S16JBD100 | Includes TrustZone, secure boot, PUF, HASH-AES, and CASPER; identical flash/SRAM/CAN FD/USB specs | Supports full secure boot chain and DICE-compliant identity provisioning; required for certified secure boot deployments | Select when full NXP secure ecosystem integration (ROM API, SB2 format, debug authentication) is mandatory |
| RA6M5GFP100AA | Arm Cortex-M33 @ 200 MHz, 1 MB flash, 384 KB SRAM, no PRINCE or CASPER; includes SCE9 crypto accelerator and trusted secure IP | Targets higher-performance applications with larger code footprint; lacks on-the-fly flash encryption but offers SCE9-accelerated AES/GCM/SHA | Select when higher CPU throughput and larger memory are prioritized over PRINCE transparency and CASPER ECC specialization |
Compared with LPC5516JBD100, LPC55S16JBD100 adds production-grade secure boot and TrustZone enforcement, while RA6M5GFP100AA trades PRINCE/CASPER for greater memory and SCE9 versatility - making LPC5516JBD100 optimal for cost-constrained, flash-encryption-dependent industrial edge nodes.
Availability
LPC5516JBD100 is available at Aetrix Electronics and suitable for industrial gateways, medical sensor hubs, and automotive body control modules requiring stable component supply, long-term lifecycle support, and traceable sourcing for safety-critical designs.
Supply support for LPC5516JBD100 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The LPC55xx product line targets resource-constrained, security-sensitive embedded systems - delivering hardware-rooted trust, real-time performance, and flexible peripheral integration for next-generation edge intelligence.
FAQ
What is the maximum operating frequency of the LPC5516JBD100?
The LPC5516JBD100 features an Arm Cortex-M33 core rated for operation up to 150 MHz. This maximum frequency is achievable under specified voltage (1.8–3.6 V) and temperature (−40 °C to +105 °C) conditions, with appropriate clock configuration using PLL0 or PLL1 sourced from the internal 12 MHz FRO or external crystal. The LPC5516JBD100 maintains timing compliance across its full industrial temperature range without derating.
Does the LPC5516JBD100 support secure boot, and what cryptographic algorithms does it use?
The LPC5516JBD100 supports secure boot using RSASSA-PKCS1-v1_5 signatures of SHA256 digests, with RSA-2048 and RSA-4096 public key verification. It stores up to four revocable Root of Trust keys in protected flash and enforces anti-rollback via image key certificate revocation. While the LPC5516JBD100 includes the HASH-AES engine and TRNG, it lacks the dedicated PUF and full secure boot ROM features present in the LPC55S1x series.
What is the ADC resolution and sampling rate of the LPC5516JBD100?
The LPC5516JBD100 integrates a 16-bit successive-approximation ADC capable of up to 2.0 million samples per second (2.0 Msamples/sec). It supports simultaneous conversions on two channels within a differential pair and includes five differential input pairs (10 single-ended channels), internal/external triggering, and direct connection to the integrated temperature sensor. This ADC performance is fully specified across the −40 °C to +105 °C operating range.
Which packages are available for the LPC5516JBD100, and what is its pin count?
The LPC5516JBD100 is offered exclusively in the HLQFP100 package: a 100-lead plastic low-profile quad flat package with 14 mm × 14 mm body size, 0.5 mm lead pitch, and SOT1570-3 variant designation. This package provides 64 GPIO pins, including secure GPIO functionality, and supports all core peripherals including CAN FD, USB FS/HS, and nine Flexcomm interfaces.
Does the LPC5516JBD100 include PRINCE and CASPER hardware blocks?
Yes, the LPC5516JBD100 includes both the PRINCE real-time flash encryption/decryption module and the CASPER cryptographic co-processor. PRINCE enables transparent AES-128 encryption of flash writes and decryption of reads, while CASPER accelerates Elliptic Curve Cryptography (ECC) operations such as ECDSA signing and ECDH key exchange - both confirmed in Table 2 of the official NXP datasheet for LPC5516JBD100.
LPC5516JBD100K Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 100-LQFP Exposed Pad
- Series:
- LPC551x
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit Single-Core
- Speed:
- 150MHz
- Connectivity:
- CAN FD, Flexcomm, I2C, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, PWM, RNG, WDT
- Number of I/O:
- 64
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 96K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 10x16b SAR
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
LPC5516JBD100K FAQ
1.How can I place an order for LPC5516JBD100K through Aetrix?
Please submit a Request for Quotation (RFQ) for LPC5516JBD100K on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LPC5516JBD100K reliable?
The price and inventory of LPC5516JBD100K are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LPC5516JBD100K is usually 5 days.
3.What payment methods are accepted for LPC5516JBD100K?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LPC5516JBD100K transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LPC5516JBD100K?
LPC5516JBD100K orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LPC5516JBD100K order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LPC5516JBD100K?
For technical support, including LPC5516JBD100K datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LPC5516JBD100K requirements.
6.How does Aetrix verify that LPC5516JBD100K is sourced from the original manufacturer or authorized distributors?
All LPC5516JBD100K products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LPC5516JBD100K meets industry standards.
7.What is the process for return or replacement of LPC5516JBD100K?
All LPC5516JBD100K units undergo pre-shipment inspection (PSI). If there is an issue with LPC5516JBD100K, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LPC5516JBD100K part is unused and in its original packaging.
Return procedure for LPC5516JBD100K:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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