NXP Semiconductors LPC5516JEV59Y

Overview

LPC5516JEV59Y from NXP Semiconductors is a 32-bit Arm Cortex-M33 microcontroller designed for secure embedded applications requiring CAN FD, high-speed USB, and hardware-accelerated cryptography. It delivers up to 150 MHz operation, 256 KB on-chip flash, 96 KB SRAM (including 16 KB USB SRAM), PRINCE real-time flash encryption, and CASPER crypto co-processor support for ECC acceleration - deployed in industrial gateways and automotive body control modules.

For engineers reviewing the LPC5516JEV59Y datasheet, LPC5516JEV59Y pinout, LPC5516JEV59Y application, or LPC5516JEV59Y equivalent, key selection considerations include its VFBGA59 package (4 × 4 mm, 0.4 mm pitch), 37 GPIOs with secure I/O capability, TrustZone® isolation, PUF-based key generation, and absence of Secure Boot/TrustZone/PUF/CASPER/PRINCE features compared to LPC55S1x variants - confirming it as a cost-optimized, non-secure derivative within the LPC551x family.

Technical Context

The LPC5516JEV59Y implements an Arm Cortex-M33 core without TrustZone, FPU, or MPU - distinguishing it from LPC55S1x siblings. Its clock system integrates dual FROs (96 MHz and 32 kHz), PLLs, and crystal oscillators (12–32 MHz and 32.768 kHz), enabling flexible timing for CAN FD (up to 5 Mbps) and high-speed USB (480 Mbps) operation.

Digital peripherals include five 32-bit general-purpose timers, one SCTimer/PWM with 8 inputs/10 outputs, PLU for logic customization, and nine Flexcomm interfaces configurable as USART/SPI/I2C/I2S - all supported by DMA0 (23 channels) and DMA1 (10 channels). Analog resources comprise a 16-bit 2.0 Msamples/sec ADC with simultaneous differential conversion, comparator, and integrated temperature sensor.

Key Specifications

Pinout & Package

VFBGA59 package: 59-ball thin fine-pitch ball grid array, 4 mm × 4 mm body, 0.4 mm pitch, 0.4 mm height - optimized for automated assembly and thermal performance in dense PCB layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Compared with LPC5516JEV59Y, LPC55S16JEV59 adds mandatory security IP but increases bill-of-materials cost and design complexity; LPC5514JEV59 trades memory for lower unit price while retaining identical peripheral functionality and package compatibility - making both viable alternatives depending on security and memory requirements.

Availability

LPC5516JEV59Y is available at Aetrix Electronics and suitable for industrial gateways, automotive body control units, and portable medical devices requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for LPC5516JEV59Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with over 50 years of embedded systems expertise.

The LPC551x product line targets cost-optimized, non-secure embedded control applications - delivering high-performance Arm Cortex-M33 compute, rich analog/digital peripherals, and industrial-grade reliability without security IP overhead.

FAQ

Does LPC5516JEV59Y support Secure Boot or TrustZone® technology?

No, LPC5516JEV59Y does not include Secure Boot, TrustZone®, PUF, CASPER, or PRINCE hardware blocks - these features are exclusive to the LPC55S1x series. The LPC5516JEV59Y is a functionally identical but security-disabled variant, confirmed in Table 2 of the datasheet. Engineers selecting LPC5516JEV59Y must implement software-based security measures if required, as the LPC5516JEV59Y provides no hardware root-of-trust capabilities.

What is the maximum operating frequency and memory configuration of LPC5516JEV59Y?

LPC5516JEV59Y operates at up to 150 MHz and integrates 256 KB of on-chip flash memory and 96 KB of SRAM - structured as 16 KB on the Code Bus, 64 KB contiguous on the System Bus, and 16 KB dedicated USB SRAM. This configuration supports complex real-time tasks, dual-bank firmware updates, and high-bandwidth USB data buffering without external memory.

Which USB modes does LPC5516JEV59Y support, and does it require an external crystal?

LPC5516JEV59Y supports high-speed (480 Mbps) USB host and device operation with an integrated PHY. In device mode, it enables crystal-less operation using the internal 96 MHz FRO and software library TN00065 - eliminating the need for an external 12 MHz crystal. Host mode requires external clocking via crystal or oscillator for full-speed and high-speed compliance.

How many GPIO pins does LPC5516JEV59Y provide, and what advanced I/O features are available?

LPC5516JEV59Y provides 37 GPIO pins in its VFBGA59 package. Each supports multiple functions via IOCON registers, including secure GPIO capability, pin interrupts (PINT), grouped interrupts (GINT), and up to 16 configurable I/O modes. Eight GPIOs can serve as pin interrupts with rising/falling/both-edge sensitivity, and two GINTs allow logical AND/OR combinations of input states for efficient event aggregation.

What analog peripherals are integrated into LPC5516JEV59Y, and what are their key performance metrics?

LPC5516JEV59Y integrates a 16-bit ADC with 2.0 Msamples/sec sampling rate, supporting simultaneous conversions on differential channel pairs; a five-input analog comparator with internal/external reference selection; and an integrated temperature sensor routed to the ADC. These peripherals enable high-fidelity signal acquisition for motor control, power monitoring, and environmental sensing without external signal conditioning.