NXP Semiconductors LPC5516JEV98K

Overview

LPC5516JEV98K from NXP Semiconductors is an Arm Cortex-M33 microcontroller with TrustZone security, 256 KB flash, 96 KB SRAM, PRINCE real-time flash encryption, CASPER crypto co-processor, and CAN FD interface-designed for secure industrial control and IoT edge nodes requiring cryptographic integrity and low-power operation.

For engineers reviewing the LPC5516JEV98K datasheet, LPC5516JEV98K pinout, LPC5516JEV98K application, or LPC5516JEV98K equivalent, this page delivers verified specifications, VFBGA98 package mapping, secure boot architecture, analog/digital peripheral configuration, and validated alternative options for industrial firmware development and certified device deployment.

Technical Context

The LPC5516JEV98K implements Arm TrustZone to isolate secure and non-secure execution environments, with hardware-enforced memory protection via MPU and secure boot using RSA-2048/4096 signatures validated against up to four revocable Root of Trust keys stored in protected flash. Its PRINCE module enables transparent AES-256 encryption/decryption of flash reads and writes without software overhead.

CASPER accelerates ECC operations for key exchange and digital signatures, while the dual DMA controllers (23+10 channels) coordinate high-throughput transfers between the 16-bit 2.0 Msamples/sec ADC, USB HS/FS PHY, CAN FD controller, and nine Flexcomm interfaces-each configurable as USART, SPI, I2C, or I2S with FIFO and fractional baud-rate generation.

Key Specifications

Pinout & Package

VFBGA98 package: 7 mm × 7 mm body, 0.5 mm ball pitch, 98 I/O balls arranged in 10 × 10 grid with corner balls omitted; supports 64 GPIOs, including 8 pin-interrupt-capable inputs and two GPIO group interrupts (GINT).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Compared with LPC5516JEV98K, LPC55S16JEV98 adds certified secure boot and hardware root-of-trust capabilities, while LPC5514JEV98 reduces memory and omits all security accelerators-making LPC5516JEV98K the optimal balance of security, performance, and peripheral integration for mid-tier secure embedded designs.

Availability

LPC5516JEV98K is available at Aetrix Electronics and suitable for industrial automation, secure IoT gateways, and automotive body electronics requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for LPC5516JEV98K includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with core expertise in Arm-based microcontrollers and trusted execution environments.

The LPC551x product line targets cost-optimized secure embedded applications-delivering TrustZone-enabled Cortex-M33 performance with hardware-accelerated cryptography and flexible peripheral routing for resource-constrained edge devices.

FAQ

What security features does the LPC5516JEV98K support?

The LPC5516JEV98K supports Arm TrustZone for memory isolation, PRINCE for real-time flash encryption, CASPER for ECC acceleration, PUF for silicon-unique key generation, SHA2-AES for secure boot verification, and Code Watchdog for runtime code flow integrity. It lacks RSA acceleration and full TBSA compliance-features present in the LPC55S16JEV98 variant-but retains secure boot with RSA-2048/4096 signature validation and DICE-compliant device identity via UUID.

Does the LPC5516JEV98K include TrustZone technology?

Yes, the LPC5516JEV98K includes Arm TrustZone technology to enforce hardware-isolated secure and non-secure execution environments. This enables separation of sensitive operations (e.g., key management, secure boot verification) from general application code. However, unlike the LPC55S16JEV98, it does not implement the full NXP Secure Boot certification stack (TBSA) or include the PUF controller and CASPER crypto co-processor-making TrustZone the sole hardware security foundation in LPC5516JEV98K.

What is the maximum ADC sampling rate of the LPC5516JEV98K?

The LPC5516JEV98K integrates a 16-bit analog-to-digital converter capable of simultaneous conversions at up to 2.0 million samples per second (2.0 Msamples/sec). This rate applies to differential channel pairs (e.g., ADC0_0/ADC0_1), with five differential or ten single-ended input channels. The ADC supports internal and external triggering, programmable gain, and direct DMA transfer to SRAM-enabling high-fidelity sensor acquisition in motor control and medical monitoring applications.

Which packages are available for the LPC5516JEV98K?

The LPC5516JEV98K is exclusively offered in the VFBGA98 package: a thin fine-pitch ball grid array with 98 solder balls, 7 mm × 7 mm body size, and 0.5 mm pitch. This matches the marking "JEV98" in the part number and is distinct from HLQFP100 and HTQFP64 variants. The VFBGA98 supports 64 GPIOs, includes dedicated balls for USB DP/DM, CAN FD TX/RX, and power/ground distribution optimized for EMI reduction in high-speed digital systems.

Does the LPC5516JEV98K support CAN FD communication?

Yes, the LPC5516JEV98K includes a dedicated CAN FD module compliant with ISO 11898-1, supporting data rates up to 5 Mbps in FD mode and legacy CAN 2.0 at 1 Mbps. It features a dedicated DMA controller for zero-CPU-overhead message handling, configurable bit timing, flexible message filtering, and error confinement-making it suitable for automotive body networks and industrial fieldbus applications requiring deterministic latency and increased payload bandwidth.